📄 dcf_drv.c
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n32SweepRate = n32SweepRate / n32Tmp; /* (KHz/s * 2 ^12) / (Fs / 2^8) */
n32SweepRate = n32SweepRate * 1000; /* KHz/s => Hz/s */
n32SweepRate = n32SweepRate / n32Tmp; /* (Hz/s * 2 ^20) / (Fs / 2^8) */
/* 0x60[7:0] */
gDemReg[ST0_RID_CRL_0].value = n32SweepRate & 0xFF;
u8RegData = gDemReg[ST0_RID_CRL_0].value;
bRetVal = DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_0].addr, 1, &u8RegData, DCF_DEMOD_I2C);
if(bRetVal == False)
return(False);
/* 0x69[7:4] */
gDemReg[ST0_RID_CRL_9].value &= 0x0F;
gDemReg[ST0_RID_CRL_9].value |= ((n32SweepRate >> 4) & 0xF0);
u8RegData = gDemReg[ST0_RID_CRL_9].value;
bRetVal = DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_9].addr, 1, &u8RegData, DCF_DEMOD_I2C);
if(bRetVal == False)
return(False);
return(True);
}
/*****************************************************************************/
/* FUNCTION: DCF_DRIVER_Set_Freq_Offset */
/* */
/* PARAMETERS: pNim - pointer to DCF_NIM struct. */
/* uSweep - sweep value */
/* */
/* DESCRIPTION: The function sets sweep value to CRL_0 and CRL_9 */
/* */
/* RETURNS: True if successful, False if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
bool DCF_DRIVER_Set_Freq_Offset(DCF_NIM *pNim, long n32CarrierOffset)
{
long n32Tmp;
long n32FreqOffset;
unsigned char u8RegData;
bool bRetVal;
/* sanity check */
if(pNim == NULL)
return(False);
/* set carrier offset rate: freq_offset * (2^28) * 1000 / Fs; [Fs = symbol rate] */
n32Tmp = (pNim->symbol_rate_ideal >> 8); /* Fs / 2^8 */
/* calculate sweep value */
if(!n32Tmp)
return(False);
/* nIPhaseValue should be not greater than 0. */
n32FreqOffset = pNim->freq_offset;
n32FreqOffset = n32FreqOffset << 20; /* 2^20 */
n32FreqOffset = n32FreqOffset / n32Tmp; // (KHz * 2^20) / (Fs / 2^8)
n32FreqOffset = n32FreqOffset * 1000; // KHz ==> Hz
if(n32FreqOffset < 0)
n32FreqOffset = n32FreqOffset + 0x10000000; // if (iIPhaseValue < 0)
n32FreqOffset = (n32FreqOffset & 0x0FFFFFFF);
/*debug_out(TL_ALWAYS, "ST: carrier_offset=%X\n", n32Tmp);*/
/* 0x66[7:0] */
gDemReg[ST0_RID_CRL_6].value = (n32FreqOffset & 0xFF);
u8RegData = gDemReg[ST0_RID_CRL_6].value;
bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_6].addr, 1, &u8RegData, DCF_DEMOD_I2C);
if(bRetVal == False)
return(False);
/* 0x67[7:0] */
gDemReg[ST0_RID_CRL_7].value = ((n32FreqOffset >> 8) & 0xFF);
u8RegData = gDemReg[ST0_RID_CRL_7].value;
bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_7].addr, 1, &u8RegData, DCF_DEMOD_I2C);
if(bRetVal == False)
return(False);
/* 0x68[7:0] */
gDemReg[ST0_RID_CRL_8].value = ((n32FreqOffset >> 16) & 0xFF);
u8RegData = gDemReg[ST0_RID_CRL_8].value;
bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_8].addr, 1, &u8RegData, DCF_DEMOD_I2C);
if(bRetVal == False)
return(False);
/* 0x69[3:0] */
gDemReg[ST0_RID_CRL_9].value &= 0xF0;
gDemReg[ST0_RID_CRL_9].value |= ((n32FreqOffset >> 24) & 0x0F);
u8RegData = gDemReg[ST0_RID_CRL_9].value;
bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_9].addr, 1, &u8RegData, DCF_DEMOD_I2C);
return(bRetVal);
}
/*****************************************************************************/
/* FUNCTION: DCF_DRIVER_Get_WBAGC_Lock */
/* */
/* PARAMETERS: pNim - pointer to DCF_NIM struct. */
/* pLocked - the pointer to the WBAGC locked status. */
/* */
/* DESCRIPTION: The function gets the WBAGC lock status */
/* by reading the bit wagc_acq of the WBAGC_3 register. */
/* */
/* RETURNS: True if successful, False if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
bool DCF_DRIVER_Get_WBAGC_Lock(DCF_NIM *pNim, bool *pLocked)
{
unsigned char u8RegData;
bool bRetVal;
/* sanity check */
if(pNim == NULL)
return(False);
/* read the WBAGC_3 register and check the WBAGC wagc_acq bit. */
bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_WBAGC_3].addr, 1, &u8RegData, DCF_DEMOD_I2C);
if(u8RegData & 0x08)
*pLocked = True;
else
*pLocked = False;
return (True);
}
/*****************************************************************************/
/* FUNCTION: DCF_DRIVER_Get_ChipID */
/* */
/* PARAMETERS: pNim - pointer to DCF_NIM struct. */
/* pu8Data - the pointer to the data of version information. */
/* */
/* DESCRIPTION: The function get the STV0297 chip version information */
/* by reading the VERSION bits of CTRL_0 register. */
/* */
/* RETURNS: True if successful, False if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
bool DCF_DRIVER_Get_ChipID(DCF_NIM *pNim, unsigned char *pu8Data)
{
bool bRetVal;
/* sanity check */
if(pNim == NULL)
return(False);
/* 0x80[6:4] */
bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_CTRL_0].addr, 1, pu8Data, DCF_DEMOD_I2C);
if(bRetVal == False)
return(False);
/* get the chip version information */
gDemReg[ST0_RID_CTRL_0].value = *pu8Data;
*pu8Data = (gDemReg[ST0_RID_CTRL_0].value >> 4) & 0x07;
return(True);
}
/*****************************************************************************/
/* FUNCTION: DCF_DRIVER_Set_BERT */
/* */
/* PARAMETERS: pNim - pointer to DCF_NIM struct. */
/* */
/* DESCRIPTION: The function sets the working mode of the integrated BERT. */
/* */
/* RETURNS: True if successful, False if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
bool DCF_DRIVER_Set_BERT(DCF_NIM *pNim, DCF_ERRSRC errsrc, DCF_ERRMODE errmode, unsigned char nbyte)
{
unsigned char u8nbyte;
/* sanity check */
if(pNim == NULL)
return(False);
pNim->err_src = (DCF_ERRSRC)(errsrc);
pNim->err_mode = (DCF_ERRMODE)(errmode);
pNim->nbyte = nbyte;
/* set the divisor of ber */
u8nbyte = pNim->nbyte;
u8nbyte = (u8nbyte << 1) + 12;
pNim->ber.divisor = (1 << u8nbyte);
/* clear the waiting flag */
pNim->bert_wait = 0;
return(True);
}
/*****************************************************************************/
/* FUNCTION: DCF_DRIVER_Start_BERT */
/* */
/* PARAMETERS: pNim - pointer to DCF_NIM struct. */
/* */
/* DESCRIPTION: The function starts the integrated BERT with the specified */
/* mode by programming the bits of BERT_0 register. */
/* */
/* RETURNS: True if successful, False if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
bool DCF_DRIVER_Start_BERT (DCF_NIM *pNim)
{
unsigned char u8RegData = 0x00;
bool bRetVal;
/* sanity check */
if(pNim == NULL)
return(False);
/* get error source */
u8RegData = pNim->err_src;
u8RegData |= pNim->err_mode;
u8RegData |= pNim->nbyte;
/* BERT mode */
gDemReg[ST0_RID_BERT_0].value = u8RegData & 0x1F;
/* BERT start bit */
gDemReg[ST0_RID_BERT_0].value = gDemReg[ST0_RID_BERT_0].value | 0x80;
/* set BERT mode and start BERT */
u8RegData = gDemReg[ST0_RID_BERT_0].value;
bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_BERT_0].addr, 1, &u8RegData, DCF_DEMOD_I2C);
return (bRetVal);
}
/*****************************************************************************/
/* FUNCTION: DCF_DRIVER_Get_Bert_Status */
/* */
/* PARAMETERS: pNim - pointer to DCF_NIM struct. */
/* */
/* DESCRIPTION: The function gets the status of the integrated BER tester */
/* by reading the bits of BERT_0 register. */
/* */
/* RETURNS: True if successful, False if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
bool DCF_DRIVER_Get_Bert_Status(DCF_NIM *pNim, unsigned char *pu8Data)
{
bool bRetVal;
/* sanity check */
if(pNim == NULL)
return(False);
/* read the WBAGC_3 register and check the WBAGC wagc_acq bit. */
bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_BERT_0].addr, 1, pu8Data, DCF_DEMOD_I2C);
gDemReg[ST0_RID_BERT_0].value = *pu8Data;
return(True);
}
/*****************************************************************************/
/* FUNCTION: DCF_DRIVER_Get_BER_Error */
/* */
/* PARAMETERS: pNim - pointer to DCF_NIM struct. */
/* */
/* DESCRIPTION: The function gets 16-bit internal byte/bit error counter */
/* by reading BERT_1 / BERT_2 registers. */
/* */
/* This result is the raw bit/byte error count and includes */
/* any error falling within the R-S redundancy bytes. */
/* */
/* RETURNS: True if successful, False if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
bool DCF_DRIVER_Get_BER_Error(DCF_NIM *pNim)
{
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