dcf_str.h

机顶盒解调芯片DCF8722驱动

/****************************************************************************/
/*                   CONEXANT PROPRIETARY AND CONFIDENTIAL                  */
/*                   Conexant Systems Inc. (c) 2007 - 2012                  */
/*                             Shanghai, CHINA                              */
/*                           All Rights Reserved                            */
/****************************************************************************/
/*
 * Filename:      DCF_STR.H
 *
 * Description:   The file defines enum type parameters
 * Author:        Gavin Zhang
 *
 ****************************************************************************/
/* $Header: dcf_str.h, 1, 2007-10-8 13:36:53, Yong Huang$
 * $Id: dcf_str.h,v 1.0, 2007-10-08 05:36:53Z, Yong Huang$
 ****************************************************************************/
#ifndef DCF_STR_H
#define DCF_STR_H

#include "dcf_enum.h"
#include "dcf_defs.h"

typedef struct DCF_CHANOBJ{                  /* Channel object structure passed via ChangeChannel() */    
   DCF_ANNEX           annex;
   unsigned long       frequency;
   unsigned long       symbrate;
   DCF_MOD_TYPE        modulation;
   DCF_SPECINV         spectrum;
   unsigned long       auto_spectrum;    
   unsigned char       ucSDPMin;             /* RFAGC Min Threshold */
   unsigned char       ucSDPMax;             /* RFAGC Max Threshold */
}DCF_CHANOBJ;


/*******************************************************************************************************/
/* DCF_CMPLXNO */
/*******************************************************************************************************/
typedef struct _DCF_CMPLXNO                  /* represents a floating-type number within driver */
{                                            /* without using floating pt numbers. For example, */
   signed long      dividen;                 /* Example usage: */
   unsigned long    divisor;                 /* 0:0 = 0;  1:0 = Div 0 Err;  1:1 = 1;  -1:1 = -1  */
}DCF_CMPLXNO;                                /* double d = ((double)DCF_CMPLXNO.integer / (double)DCF_CMPLXNO.divider); */                                  

typedef struct _DCF_TUA6020                  /* TUA 6020 hardware configurations & hardware information */
{
   unsigned long   tuner_handle;             /* slave address of TUA6020 */
   unsigned long   tuner_xtal;               /* external clock input, 4MHz */
   unsigned char   tuner_chipid;             /* chip version information */
   unsigned long   tuner_interm_freq;        /* tuner output IF in KHz: 36000 */
   unsigned long   tuner_bw;                 /* tuner bandwidth in  Hz: 8000000 */
   unsigned char   tuner_shadow[4];          /* data format for tuner i2c control */
   unsigned long   tuner_ref_freq;           /* tuner reference frequency */
   unsigned long   tuner_IF_step;            /* tuner output IF in step */
   unsigned char   tuner_charge_pump;        /* tuner charge pump current option */
   unsigned long   tuner_freq;               /* the signal frequency to tune */
}DCF_TUA;

/*******************************************************************************************************/
/* DCF_ACTIVE_TUNER */
/* Union of all tuners supported.*/
/* Will always hold the active tuner information.*/
/*******************************************************************************************************/
typedef union dcf_tuner_union                /* storage holding shared memory block for various tuner chips */
{
   DCF_TUA         tua6020;                  /* infenion tuner */
}DCF_ACTIVE_TUNER;
            
typedef struct _DCF_NIM
{
   DCF_DEMOD          demod_type;            /* type of demod: (see enum DEMOD) */
	
   /* STV0297 Hardware Configurations & Hardware Information */
   unsigned long      demod_handle;          /* slave address of sv0297 */
   unsigned long      demod_xtal;            /* external clock input, 28800000 Hz */
   unsigned char      demod_chipid;          /* chip version information */
   
   /* DCF8722's Tuner Hardware Configurations & Hardware Information */
   DCF_TUNER          tuner_type;            /* tuner type: Rosie, Judy,.... */
   bool               exit_acquring;         /* force to exit the current acquiring */
   unsigned long      freq_ideal;            /* Ideal frequency, Hz */
   unsigned long      pll_frequency;         /* tuned-to (attempted to) frequency */
   unsigned long      symbol_rate_ideal;     /* last symbol-rate setting read/written to demod, sps */
   unsigned long      symbol_rate;           /* last symbol-rate setting read/written to demod */
   bool               isAutoQAMMode;
   DCF_MOD_TYPE       mod_type;              /* QAM size */
   DCF_SPECINV        spec_inv;              /* spectrum inversion option */
   unsigned long      auto_spec_inv;         /* flag whether inverts spectrum automatically */
   DCF_ANNEX          annex;                 /* 1 - ANNEX_A / 2 - ANNEX_B     */

   /* configuration concerning frequency shift */  
   long               sweep_rate;            /* Sweep Rate (in KHz/s)   */
   long               freq_offset;           /* Carrier Offset (in KHz) */
   long               init_demod_offset;     /* */
   unsigned char      scan_direction;        /* scan direction */
   
   DCF_NIM_STATE      cur_state;             /* state of demodulator */
   DCF_NIM_STATE      pre_state;             /* state of demodulator */

   DCF_ACTIVE_TUNER   tuner;                 /* active tuner */
   
   unsigned char      ITUJ83;                /* ITU-J83A mode or ITU-J83C mode */
   
   /* signal strength */
   unsigned char      wbagc_locked;          /* the WBAGC lock status */
   int                agc2_sd;               /* 10-bit value agc2sd */
   unsigned char      signal_strength;       /* signal strength 0-255 */
   
   /* integrated BER tester */
   unsigned char      bert_status;           /* integrated BERT status byte */
   unsigned char      bert_wait;             /* integrated BERT is not ready if "1" */
   DCF_ERRSRC         err_src;               /* integrated BERT error source bit/byte */
   DCF_ERRMODE        err_mode;              /* integrated BERT error mode */
   unsigned char      nbyte;                 /* the number of data bytes during which bit/byte errors are to be detected*/
   DCF_CMPLXNO        ber;                   /* ber.dividen is BER count, BER.divisor is 2^(2*nbyte + 12) */
   
   /* C/N */
   long               cne_mean;              /* the C/N estimator mean */
   long               cne_offset;
   long               cne;                   /* the C/N estimator */
   
   /* reed-solomn descrambler sync detector */
   unsigned short     rs_raw_blk;            /* the number of blocks to be handled in RS */
   unsigned short     rs_corrected_blk;      /* the number of corrected blocks */
   unsigned short     rs_uncorrected_blk;    /* the number of uncorrected blocks */  
   
   /* bus access handle */
   DCF_BUS_WRITE      BusWrite;              /* ser.bus write() function (pointer to)  */
   DCF_BUS_READ       BusRead;               /* ser.bus read() function (pointer to) */
   
   /* pointer to user-defined wait function to be invoked, */
   bool               (*wait)(int mscount);  /* the default HAMARO_DRIVER_wait() function is used) */
}DCF_NIM;

/***************************/
/*   REGISTER STRUCTURE    */
/***************************/
typedef struct _DCF_REGISTER
{
   unsigned char index;                      /* index of register struct         */
   unsigned char addr;                       /* the register address             */
   unsigned char value;                      /* the current value                */
   unsigned char wflag;                      /* the flag of write: 0 - read only */
   unsigned char start;                      /* the initialization value         */
   unsigned char store;                      /* the stored value for reloading   */
   unsigned char resv1;                      /* reserved (as a index)            */
   unsigned char resv2;                      /* reserved (as a reset value       */
   unsigned char resv3;                      /* reserved.                        */
   char          name[DCF_REG_NAME_LEN];     /* the register name                */
}DCF_REGISTER;

/*******************************************************************************************************/
/* DCF_MPEG_OUT */
/*******************************************************************************************************/
typedef struct _DCF_TS_OUT
{
  DCF_TS_OUTMODE      TsOutMode;             /* Setting for 0xC0[2] (TSDataWidth) */
  DCF_TS_CLKPAR       TsClkPar;              /* Setting for 0xC0[4] (TSClkPar) */
  DCF_TS_CLKGATTING   TsClkGatting;          /* Setting for 0xC0[3] (TSClkGatting) */
  DCF_TS_TEI          TsTei;                 /* Setting for 0xC0[1] (TsTei) */   
}DCF_TS_OUT;

/*******************************************************************************************************/
/*******************************************************************************************************/
/*******************************************************************************************************/
#endif  /* #ifndef DCF_STR_H */