📄 stv0297.c
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case ST0_QAM128:
ui8QAM = (ui8QAM << 4) & 0x70;
gDemReg[ST0_RID_EQU_0].value = gDemReg[ST0_RID_EQU_0].value & 0x8F;
gDemReg[ST0_RID_EQU_0].value = gDemReg[ST0_RID_EQU_0].value | ui8QAM;
st0_set_a_reg( i2cAddr, ST0_RID_EQU_0);
gDemReg[ST0_RID_EQU_1].value = 0x58;
st0_set_a_reg( i2cAddr, ST0_RID_EQU_1);
break;
case ST0_QAM256:
ui8QAM = (ui8QAM << 4) & 0x70;
gDemReg[ST0_RID_EQU_0].value = gDemReg[ST0_RID_EQU_0].value & 0x8F;
gDemReg[ST0_RID_EQU_0].value = gDemReg[ST0_RID_EQU_0].value | ui8QAM;
st0_set_a_reg( i2cAddr, ST0_RID_EQU_0);
gDemReg[ST0_RID_EQU_1].value = 0x69;
st0_set_a_reg( i2cAddr, ST0_RID_EQU_1);
break;
case ST0_QAM_AUTO:
default:
/* set the MODE_SELECT bits of EQU_0 register to 000b */
gDemReg[ST0_RID_EQU_0].value = gDemReg[ST0_RID_EQU_0].value & 0x8F;
st0_set_a_reg( i2cAddr, ST0_RID_EQU_0);
/* set the CTRL_9 register for the auto-detect QAM mode
*
* the AUTO_QAMMODE_SEL bit = 1b
* the AUTOCONSTEL_TIMER bit = 0111b
* the AUTOSTOP_CONSTEL bit = 1b
* the AUTOCONSTEL_ON bit = 1b
*/
gDemReg[ST0_RID_CTRL_9].value = 0xBE;
st0_set_a_reg( i2cAddr, ST0_RID_CTRL_9);
break;
}
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_get_qam_size */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* pData - the pointer to the return data. */
/* */
/* DESCRIPTION: The function gets the QAM mode */
/* by reading the MODE_SELECT bits of EQU_0 register. */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
DEM_RETURN st0_get_qam_size (u_int8 i2cAddr, u_int8 *pData)
{
st0_get_a_reg( i2cAddr, ST0_RID_EQU_0);
*pData = ((gDemReg[ST0_RID_EQU_0].value & 0x70) >> 4);
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_get_noise_accumulator */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* pData - the pointer to the return data. */
/* */
/* DESCRIPTION: The function gets the 16-bit noise estimation accumulator */
/* by reading the EQU_7 & EQU_8 registers. */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
DEM_RETURN st0_get_noise_accumulator (u_int8 i2cAddr, u_int16 *pData)
{
u_int16 ui16Temp;
st0_get_a_reg( i2cAddr, ST0_RID_EQU_7);
st0_get_a_reg( i2cAddr, ST0_RID_EQU_8);
ui16Temp = ((u_int16)(gDemReg[ST0_RID_EQU_8].value) << 8);
ui16Temp += (u_int16)(gDemReg[ST0_RID_EQU_7].value);
*pData = ui16Temp;
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_disable_initdem */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* */
/* DESCRIPTION: The function disables the initial quadrature demodulator */
/* by programming the IN_DEMOD_ON bit of INITDEM_5 register. */
/* */
/* It is performed using a simpler sequencer which always */
/* requires F(CLKEXT) = 0.8 * F(IF). */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
DEM_RETURN st0_disable_initdem (u_int8 i2cAddr)
{
gDemReg[ST0_RID_INITDEM_5].value = 0x08;
st0_set_a_reg( i2cAddr, ST0_RID_INITDEM_5);
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_wbagc_init */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* */
/* DESCRIPTION: The function initialize the WBAGC module */
/* by programming the WBAGC_n registers. */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
DEM_RETURN st0_wbagc_init (u_int8 i2cAddr)
{
/* 1: freeze the WBAGC loop */
gDemReg[ST0_RID_WBAGC_3].value = gDemReg[ST0_RID_WBAGC_3].value & 0xEF;
st0_set_a_reg( i2cAddr, ST0_RID_WBAGC_3);
/* 2: reset the WBAGC function, the bit is self-clearing. */
gDemReg[ST0_RID_WBAGC_3].value = gDemReg[ST0_RID_WBAGC_3].value | 0x40;
st0_set_a_reg( i2cAddr, ST0_RID_WBAGC_3);
/* 3: clear the WBAGC lock status */
gDemReg[ST0_RID_WBAGC_3].value = gDemReg[ST0_RID_WBAGC_3].value & 0xF7;
st0_set_a_reg( i2cAddr, ST0_RID_WBAGC_3);
/* 4: initialize the WBAGC agc2sd & acq_thresh.
* the default value should be agc2sd = 0x9D. acq_thresh = 0xC
*/
gDemReg[ST0_RID_WBAGC_1].value = gDemReg[ST0_RID_WBAGC_1].start;
gDemReg[ST0_RID_WBAGC_2].value = gDemReg[ST0_RID_WBAGC_2].start;
st0_set_a_reg( i2cAddr, ST0_RID_WBAGC_1);
st0_set_a_reg( i2cAddr, ST0_RID_WBAGC_2);
/* 5: unfreeze the AGC2 & the AGC1 */
gDemReg[ST0_RID_DELAGC_6].value = 0x80;
st0_set_a_reg( i2cAddr, ST0_RID_DELAGC_6);
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_wbagc_get_acq */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* pData - the pointer to the return data. */
/* */
/* DESCRIPTION: The function gets the WBAGC lock status */
/* by reading the bit wagc_acq of the WBAGC_3 register. */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
DEM_RETURN st0_wbagc_get_acq (u_int8 i2cAddr, u_int8 *pData)
{
/* read the WBAGC_3 register and check the WBAGC wagc_acq bit. */
st0_get_a_reg( i2cAddr, ST0_RID_WBAGC_3);
if (((gDemReg[ST0_RID_WBAGC_3].value) & 0x08) == 0x08)
{
*pData = (u_int8)(ST0_WBAGC_LOCKED);
}
else
{
*pData = (u_int8)(ST0_WBAGC_UNLOCKED);
}
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_wbagc_get_agc2sd */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* pData - the pointer to the return data. */
/* */
/* DESCRIPTION: The function gets the 10-bit WBAGC agc2sd value */
/* by reading the WBAGC_1 and WBAGC_2 register. */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
DEM_RETURN st0_wbagc_get_agc2sd (u_int8 i2cAddr, u_int16 *pData)
{
u_int16 uTemp;
st0_get_a_reg( i2cAddr, ST0_RID_WBAGC_1);
st0_get_a_reg( i2cAddr, ST0_RID_WBAGC_2);
uTemp = (u_int16)(gDemReg[ST0_RID_WBAGC_1].value);
uTemp += (((u_int16)(gDemReg[ST0_RID_WBAGC_2].value) & 0x0003) << 8);
*pData = uTemp;
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_stl_init */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* */
/* DESCRIPTION: The function initialize the symbol timing recovery loop */
/* by programming the STLOOP_n registers. */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
/* CONTEXT: Must be called from a non-interrupt context. */
/* */
/*****************************************************************************/
DEM_RETURN st0_stl_init (u_int8 i2cAddr)
{
/* phase clear, and freeze all blocks that work at symbol rate. */
gDemReg[ST0_RID_STLOOP_10].value = gDemReg[ST0_RID_STLOOP_10].value | 0x20;
st0_set_a_reg( i2cAddr, ST0_RID_STLOOP_10);
/* STL integral path clear */
gDemReg[ST0_RID_STLOOP_11].value = gDemReg[ST0_RID_STLOOP_11].value | 0x02;
st0_set_a_reg( i2cAddr, ST0_RID_STLOOP_11);
/* STL integral path clear release, and disable STL integral path,
* STL integral path will be enable only after the WBAGC lock
*/
gDemReg[ST0_RID_STLOOP_11].value = gDemReg[ST0_RID_STLOOP_11].value & 0xFC;
st0_set_a_reg( i2cAddr, ST0_RID_STLOOP_11);
/* disable STL direct path */
gDemReg[ST0_RID_STLOOP_10].value = gDemReg[ST0_RID_STLOOP_10].value & 0xBF;
st0_set_a_reg( i2cAddr, ST0_RID_STLOOP_10);
return (DEM_OK);
}
DEM_RETURN st0_stl_freeze (u_int8 i2cAddr)
{
/* phase clear, and freeze all blocks that work at symbol rate. */
gDemReg[ST0_RID_STLOOP_10].value = gDemReg[ST0_RID_STLOOP_10].value | 0x20;
st0_set_a_reg( i2cAddr, ST0_RID_STLOOP_10);
return (DEM_OK);
}
/*****************************************************************************/
/* FUNCTION: st0_stl_unfreeze */
/* */
/* PARAMETERS: i2cAddr - the i2c address for accessing STV0297 registers. */
/* */
/* DESCRIPTION: The function unfreeze all blocks that work at symbol rate */
/* by programming the PHASE_CLR of the STLOOP_10 register. */
/* */
/* RETURNS: DEM_OK if successful, DEM_ERROR if unsuccessful. */
/* */
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