dcf_api.c

机顶盒解调芯片DCF8722驱动

   dcf_set_crl_timeout(pNim, &n32LMS2TimeOut, &n32FECTimeOut);
   
   /* soft reset */
   DCF_DRIVER_SW_Reset(pNim);

   /* reset deinterleaver */
   DCF_DRIVER_DI_SW_Reset(pNim);
   
   /* Reload Registers */
   DCF_DRIVER_Init_Regs(pNim);

   /* setting of the initial demodulator */
   dcf_demod_setting(pNim);
   
   /* WB AGC setting */
   /* AGC2 & AGC1 value save: 0x30[7:0] */
   bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_DELAGC_0].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);
   n32AGC2Max = u8RegData;

   /* 0x31[7:0] */	
   bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_DELAGC_1].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);
   n32AGC2Min = u8RegData;

   /* 0x32[7:0] */
   bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_DELAGC_2].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);
   n32AGC1Max = u8RegData;

   /* 0x33[7:0] */
   bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_DELAGC_3].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);
   n32AGC1Min = u8RegData;

   /* 0x35[7:0] */      
   bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_DELAGC_5].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);
   n32AGC2Threshold = u8RegData;

   /* 0x40[7:0] */     
   /* AGC ref is memorized */
   bRetVal = DCF_RegRead(pNim, gDemReg[ST0_RID_WBAGC_0].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);
   n32WBAGC_Iref = u8RegData;  

   DCF_DRIVER_Set_WAGC(pNim);
   
   /* Wide Band AGC agc2sd initialisation : 25%-range */
   /* set 0x41[7:0]=0 */
   gDemReg[ST0_RID_WBAGC_1].value = 0x00;
   u8RegData = gDemReg[ST0_RID_WBAGC_1].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_WBAGC_1].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False); 
   
   /* 0x42[1:0]=1*/
   gDemReg[ST0_RID_WBAGC_2].value &= 0xFC;
   gDemReg[ST0_RID_WBAGC_2].value |= 0x01;
   u8RegData = gDemReg[ST0_RID_WBAGC_2].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_WBAGC_2].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False); 

   /* Wide Band AGC2 nofreeze and Wide Band AGC1 nofreeze */
   /* 0x36[6:5]=0, 0x36[4:3]=0 */
   gDemReg[ST0_RID_DELAGC_6].value &= 0x87;
   u8RegData = gDemReg[ST0_RID_DELAGC_6].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_DELAGC_6].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);

   /* PMF AGC setting */   
   DCF_DRIVER_Set_PMFAGC(pNim);

   /* Symbol Timing Loop (STL) setting */   
   DCF_DRIVER_Set_STL(pNim);
   
   /* set dampling factor */
   dcf_set_dampling_factor(pNim);   
   
   /* carrier Recovery Loop (STL) setting */
   DCF_DRIVER_Set_CRL(pNim);

   /* Equalizer setting */   
   DCF_DRIVER_Set_EQ(pNim);

   /* clear lms1, lms2 */
   /* 0x82[3]=0 */ 
   gDemReg[ST0_RID_CTRL_2].value &= 0xF7;
   u8RegData = gDemReg[ST0_RID_CTRL_2].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CTRL_2].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);   
   
   /* FEC clear */
   DCF_DRIVER_Clr_FEC(pNim);
   
   /* Parameters setting */
   DCF_DRIVER_Set_Modulation(pNim);
   DCF_DRIVER_Symb_In(pNim, &(pNim->symbol_rate));
   DCF_DRIVER_Set_Symbol_Rate(pNim, pNim->symbol_rate);
   
   DCF_DRIVER_Set_Sweep_Rate(pNim, pNim->sweep_rate);
   DCF_DRIVER_Set_Freq_Offset(pNim, pNim->freq_offset);
   
   /* set spectrum inversion 0x83[3] */
   DCF_DRIVER_Set_SPEC_INV(pNim, pNim->spec_inv);
   
   /* Acquisition sequence */   
   /* corner detector on */
   /* 0x88[3]=1 */
   gDemReg[ST0_RID_CTRL_8].value |= 0x08;
   u8RegData = gDemReg[ST0_RID_CTRL_8].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CTRL_8].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);  
   
   /* phase clear release */
   /* 0x5A[5]=0 */
   gDemReg[ST0_RID_STLOOP_10].value &= 0xDF;
   u8RegData = gDemReg[ST0_RID_STLOOP_10].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_STLOOP_10].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False); 
   
   /* Wide Band AGC enable */
   /* 0x43[4]=1 */
   gDemReg[ST0_RID_WBAGC_3].value |= 0x10;
   u8RegData = gDemReg[ST0_RID_WBAGC_3].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_WBAGC_3].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False); 
   
   /* Wide Band AGC acquisition test */
   n32DataSearchTime = 0;
   n32TimeOut = n32DataSearchTime + 30; /* 30 ms time-out */
   bEndOfSearch = False;
   while(!bEndOfSearch)
   {
      bLocked = False;
      (pNim->wait)(DCF_DEMOD_WAIT_TIME);
      n32DataSearchTime += DCF_DEMOD_WAIT_TIME;
      DCF_DRIVER_Get_WBAGC_Lock(pNim, &bLocked);

      /* will check WBAGC lock status 6 times at most */
      if((bLocked == True)||(n32DataSearchTime > n32TimeOut))
      {
         bEndOfSearch = True;
      }
   }
   if(bLocked == False)
   {
      return(False);
   }

   n32AGC2SD = 256;
   DCF_DRIVER_WBAGC_Get_Agc2Sd(pNim, &n32Tmp);
   n32TimeOut = n32DataSearchTime + 30; /* 30 ms time-out */
   while((n32DataSearchTime < n32TimeOut ) && (n32Tmp-n32AGC2SD > 100))
   {
      (pNim->wait)(DCF_DEMOD_WAIT_TIME);
      n32DataSearchTime += DCF_DEMOD_WAIT_TIME;
      n32AGC2SD = n32Tmp;
      DCF_DRIVER_WBAGC_Get_Agc2Sd(pNim, &n32Tmp);
   }
   if(n32Tmp > DCF_DEMOD_AGC2_MAX_LEVEL)
   {
      /* The AGC value is very low; maybe there is no signal.
         In order to check if there is or not signal, the reference is decreased */
      n32AGC2SD = 2000 ;
      
      /* set 0x40[7:0] to 10 */
      gDemReg[ST0_RID_WBAGC_0].value = 0x0A;
      u8RegData = gDemReg[ST0_RID_WBAGC_0].value;
      bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_WBAGC_0].addr, 1, &u8RegData, DCF_DEMOD_I2C);
      if(bRetVal == False)
         return(False); 
         
      n32TimeOut = n32DataSearchTime + 30; /* 30 ms time-out */
      while((n32DataSearchTime < n32TimeOut ) && (n32Tmp > DCF_DEMOD_AGC2_MAX_LEVEL))
      {
         (pNim->wait)(DCF_DEMOD_WAIT_TIME) ;
         n32DataSearchTime += DCF_DEMOD_WAIT_TIME;
         n32AGC2SD = n32Tmp;
         DCF_DRIVER_WBAGC_Get_Agc2Sd(pNim, &(n32Tmp));
      }

      /* the initial AGC ref is reloaded */
      /* 0x40[7:0] */
      gDemReg[ST0_RID_WBAGC_0].value = n32WBAGC_Iref;
      u8RegData = gDemReg[ST0_RID_WBAGC_0].value;
      bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_WBAGC_0].addr, 1, &u8RegData, DCF_DEMOD_I2C);
      if(bRetVal == False)
         return(False);

      /* handle timeout */
      if(n32Tmp > DCF_DEMOD_AGC2_MAX_LEVEL)
      {
         return(False);
      }
   }

   /* Sweep enable */
   /* 0x6A[0]=1 */
   gDemReg[ST0_RID_CRL_10].value |= 0x01;
   u8RegData = gDemReg[ST0_RID_CRL_10].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_10].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);  

   /* PMF AGC unlock forcing is disabled.*/
   /* 0x71[7]=0 */
   gDemReg[ST0_RID_PMFAGC_1].value &= 0x7F;
   u8RegData = gDemReg[ST0_RID_PMFAGC_1].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_PMFAGC_1].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);
 
   /* Waiting for a LMS2 tracking indication or a time-out; several continuing
      tracking indicators are requested to decide LMS2 convergence */
   bEndOfSearch = False;
   n32TimeOut = n32DataSearchTime + n32LMS2TimeOut ;
   while(!bEndOfSearch)
   {
      (pNim->wait)(DCF_DEMOD_WAIT_TIME) ;
      n32DataSearchTime += DCF_DEMOD_WAIT_TIME;
      /* Get 0x82[3] */
      DCF_DRIVER_Get_EQU_LMS2(pNim, &bLocked);

      if((bLocked == True) || (n32DataSearchTime > n32TimeOut))
      {
         bEndOfSearch = True;
      }
   }

   /* if can not get 2 consecutive locks, end this search */
   if(bLocked == False)
   {
      return(False);
   }
  
   /* LMS2 was found : sweep is disabled */
   /* 0x6A[0]=0 */
   gDemReg[ST0_RID_CRL_10].value &= 0xFE;
   u8RegData = gDemReg[ST0_RID_CRL_10].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CRL_10].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False); 

   /* corner detector off */
   /* 0x88[3]=0 */
   gDemReg[ST0_RID_CTRL_8].value &= 0xF7;
   u8RegData = gDemReg[ST0_RID_CTRL_8].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_CTRL_8].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False); 
   
   n32LockCounter = 0;
   bEndOfSearch    = False;
   n32TimeOut = n32DataSearchTime + 100;

   while(!bEndOfSearch)
   {
      (pNim->wait)(DCF_DEMOD_WAIT_TIME);
      n32DataSearchTime += DCF_DEMOD_WAIT_TIME;
      
      /* GET 0x82[3] */
      DCF_DRIVER_Get_EQU_LMS2(pNim, &bLocked);
      
      if(bLocked == 1)
      {
         n32LockCounter += 1;
      }
      else
      {
         n32LockCounter = 0;
      }
      if((n32LockCounter >= DCF_DEMOD_TRACKING_LOCK) || (n32DataSearchTime > n32TimeOut))
      {
         bEndOfSearch = True;
      }
   }

   /* if EQU LMS2 is unlocked, end search */
   if(n32LockCounter != DCF_DEMOD_TRACKING_LOCK)
      return(False);

   /* waiting for a FEC tracking indication or a time-out */
   bEndOfSearch = False;
   n32TimeOut = n32DataSearchTime + n32FECTimeOut;

  
   while(!bEndOfSearch)
   {
      bLocked = False;
      /* 0xDF[7] */
      dcf_get_lockstatus(pNim, &bLocked);	  
	  
      if((bLocked == True)||(n32DataSearchTime > n32TimeOut))
      {
         bEndOfSearch = True;
      }
      (pNim->wait)(DCF_DEMOD_WAIT_TIME);
      n32DataSearchTime += DCF_DEMOD_WAIT_TIME;
   }
   
   if(bLocked == 0)
   {
      return(False);
   }

   /* direct path enabled only after AGC lock : this gives more chances to lock after a signal loss */
   /* 0x5A[6]=0 */
   gDemReg[ST0_RID_STLOOP_10].value &= 0xBF;
   u8RegData = gDemReg[ST0_RID_STLOOP_10].value;
   bRetVal= DCF_RegWrite(pNim, gDemReg[ST0_RID_STLOOP_10].addr, 1, &u8RegData, DCF_DEMOD_I2C);
   if(bRetVal == False)
      return(False);

   return(True);
}

/*****************************************************************************/
/*  FUNCTION:    dcf_carrier_search                                          */
/*                                                                           */
/*  PARAMETERS:  pNim - pointer to DCF_NIM struct.                           */
/*               pTsOutFormat - pointer to OUTFORMAT struct                  */
/*                                                                           */
/*  DESCRIPTION: The function re-initializes THOMSON Cable Front-End DCF8722 */
/*                                                                           */
/*  RETURNS:     True if successful, False if unsuccessful.                  */
/*                                                                           */
/*  CONTEXT:     Must be called from a non-interrupt context.                */
/*                                                                           */
/*****************************************************************************/
bool dcf_carrier_search(DCF_NIM *pNim)
{
   long            n32CarrierOffset;
   long            n32RangeOffset;
   long            n32SweepRate;
   long            n32InitDemodOffset;
   bool            bInitDemod;
   unsigned char   u8RegData;
   bool            bRetVal;
   bool            bDataFound;
   
   /* get info from context */
   bRetVal = False;
   bInitDemod = False;
   n32InitDemodOffset = 0;

   /* clear blcok counters */
   DCF_DRIVER_Stop_Blk_Counter(pNim);
   
   /* test input parameters */
   if(((pNim->sweep_rate > 0)&&(pNim->freq_offset > 0)) ||
      ((pNim->sweep_rate < 0)&&(pNim->freq_offset < 0)))
   {
      return(False) ;
   }

   if(pNim->sweep_