📄 dcf_reg.c
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/****************************************************************************/
/* CONEXANT PROPRIETARY AND CONFIDENTIAL */
/* Conexant Systems Inc. (c) 2007 - 2012 */
/* Shanghai, CHINA */
/* All Rights Reserved */
/****************************************************************************/
/*
* Filename: DCF_REG.C
*
* Description: The file defines communication approach to DEMOD
*
* Author: Gavin Zhang
*
****************************************************************************/
/* $Header: dcf_reg.C, 1, 2007-10-8 13:36:53, Yong Huang$
* $Id: dcf_reg.C,v 1.0, 2007-10-08 05:36:53Z, Yong Huang$
****************************************************************************/
/***************************/
/* Header Files */
/***************************/
#include "dcf.h"
#include "kal.h"
#include "retcodes.h"
extern sem_id_t gsemDCFRegRW;
/**********************************************************/
/* Global Variable */
/**********************************************************/
/* REG.MAP (reg.map -- register map) Register descriptions */
#if defined(TOWER_CABLE_TUNER) && (TOWER_CABLE_TUNER==YES)
/***************************/
/* FOR Tower Tuner */
/***************************/
DCF_REGISTER gDemReg[DCF_REG_NUM] =
{ /* index addr value wflag start store resv1 resv2 resv3 name[] */
/* EQUALIZER - CONSTELLATION QUALITY ESTIMATOR */
{ ST0_RID_EQU_0, 0x00, 0x00, 0x01, 0x4b, 0x00, 0x00, 0x09, 0x00, "EQU_0" },
{ ST0_RID_EQU_1, 0x01, 0x00, 0x01, 0x58, 0x00, 0x01, 0x69, 0x00, "EQU_1" },
{ ST0_RID_EQU_3, 0x03, 0x00, 0x01, 0x00, 0x00, 0x02, 0x00, 0x00, "EQU_3" },
{ ST0_RID_EQU_4, 0x04, 0x00, 0x00, 0x01, 0x00, 0x03, 0x00, 0x00, "EQU_4" },
{ ST0_RID_EQU_7, 0x07, 0x00, 0x00, 0x07, 0x00, 0x04, 0x00, 0x00, "EQU_7" },
{ ST0_RID_EQU_8, 0x08, 0x00, 0x00, 0x1c, 0x00, 0x05, 0x00, 0x00, "EQU_8" },
/* QUADRATURE DEMODULATOR */
{ ST0_RID_INITDEM_0, 0x20, 0x00, 0x01, 0x00, 0x00, 0x06, 0x00, 0x00, "INITDEM_0" },
{ ST0_RID_INITDEM_1, 0x21, 0x00, 0x01, 0x40, 0x00, 0x07, 0x00, 0x00, "INITDEM_1" },
{ ST0_RID_INITDEM_2, 0x22, 0x00, 0x01, 0x0A, 0x00, 0x08, 0x00, 0x00, "INITDEM_2" },
{ ST0_RID_INITDEM_3, 0x23, 0x00, 0x01, 0x00, 0x00, 0x09, 0x00, 0x00, "INITDEM_3" },
{ ST0_RID_INITDEM_4, 0x24, 0x00, 0x01, 0x40, 0x00, 0x0A, 0x40, 0x00, "INITDEM_4" },
{ ST0_RID_INITDEM_5, 0x25, 0x00, 0x01, 0x08, 0x00, 0x0B, 0x08, 0x00, "INITDEM_5" },
/* ANALOG AGCS - A/D OVERFLOW MONITOR */
{ ST0_RID_DELAGC_0, 0x30, 0x00, 0x01, 0xFF, 0x00, 0x0C, 0x00, 0x00, "DELAGC_0" },
{ ST0_RID_DELAGC_1, 0x31, 0x00, 0x01, 0x5C, 0x00, 0x0D, 0x00, 0x00, "DELAGC_1" },
{ ST0_RID_DELAGC_2, 0x32, 0x00, 0x01, 0xFF, 0x00, 0x0E, 0x00, 0x00, "DELAGC_2" },
{ ST0_RID_DELAGC_3, 0x33, 0x00, 0x01, 0x00, 0x00, 0x0F, 0x00, 0x00, "DELAGC_3" },
{ ST0_RID_DELAGC_4, 0x34, 0x00, 0x01, 0x32, 0x00, 0x10, 0x00, 0x00, "DELAGC_4" },
{ ST0_RID_DELAGC_5, 0x35, 0x00, 0x01, 0x5C, 0x00, 0x11, 0x00, 0x00, "DELAGC_5" }, /* 0x7F */
{ ST0_RID_DELAGC_6, 0x36, 0x00, 0x01, 0x80, 0x00, 0x12, 0x00, 0x00, "DELAGC_6" },
{ ST0_RID_DELAGC_7, 0x37, 0x00, 0x01, 0x30, 0x00, 0x13, 0x00, 0x00, "DELAGC_7" }, /* 0x20 */
{ ST0_RID_DELAGC_8, 0x38, 0x00, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, "DELAGC_8" },
{ ST0_RID_WBAGC_0, 0x40, 0x00, 0x01, 0x1B, 0x00, 0x15, 0x00, 0x00, "WBAGC_0" },
{ ST0_RID_WBAGC_1, 0x41, 0x00, 0x01, 0x9D, 0x00, 0x16, 0x00, 0x00, "WBAGC_1" },
{ ST0_RID_WBAGC_2, 0x42, 0x00, 0x01, 0x30, 0x00, 0x17, 0x02, 0x00, "WBAGC_2" }, /* 0x29 */
{ ST0_RID_WBAGC_3, 0x43, 0x00, 0x01, 0x18, 0x00, 0x18, 0x20, 0x00, "WBAGC_3" }, /* 0x20 */
{ ST0_RID_WBAGC_4, 0x44, 0x00, 0x01, 0x58, 0x00, 0x19, 0x00, 0x00, "WBAGC_4" },
{ ST0_RID_WBAGC_5, 0x45, 0x00, 0x01, 0x00, 0x00, 0x1A, 0x00, 0x00, "WBAGC_5" },
{ ST0_RID_WBAGC_6, 0x46, 0x00, 0x01, 0x00, 0x00, 0x1B, 0x00, 0x00, "WBAGC_6" },
{ ST0_RID_WBAGC_9, 0x49, 0x00, 0x01, 0x02, 0x00, 0x1C, 0x00, 0x00, "WBAGC_9" },
{ ST0_RID_WBAGC_10, 0x4A, 0x00, 0x01, 0x33, 0x00, 0x1D, 0x00, 0x00, "WBAGC_10" },
{ ST0_RID_WBAGC_11, 0x4B, 0x00, 0x01, 0xFF, 0x00, 0x1E, 0x00, 0x00, "WBAGC_11" },
/* SYMBOL TIMING RECOVERY LOOP */
{ ST0_RID_STLOOP_2, 0x52, 0x00, 0x01, 0x30, 0x00, 0x1F, 0x00, 0x00, "STLOOP_2" },
{ ST0_RID_STLOOP_3, 0x53, 0x00, 0x01, 0x08, 0x00, 0x20, 0x00, 0x00, "STLOOP_3" }, /* 0x13 */
{ ST0_RID_STLOOP_5, 0x55, 0x00, 0x01, 0x50, 0x00, 0x21, 0x00, 0x00, "STLOOP_5" },
{ ST0_RID_STLOOP_6, 0x56, 0x00, 0x01, 0xBB, 0x00, 0x22, 0x00, 0x00, "STLOOP_6" },
{ ST0_RID_STLOOP_7, 0x57, 0x00, 0x01, 0x18, 0x00, 0x23, 0x00, 0x00, "STLOOP_7" },
{ ST0_RID_STLOOP_8, 0x58, 0x00, 0x01, 0x3D, 0x00, 0x24, 0x00, 0x00, "STLOOP_8" },
{ ST0_RID_STLOOP_9, 0x59, 0x00, 0x01, 0x08, 0x00, 0x25, 0x00, 0x00, "STLOOP_9" }, /* 0x08 */
{ ST0_RID_STLOOP_10, 0x5A, 0x00, 0x01, 0x1E, 0x00, 0x26, 0x00, 0x00, "STLOOP_10" }, /* 0x1E */
{ ST0_RID_STLOOP_11, 0x5B, 0x00, 0x01, 0x04, 0x00, 0x27, 0x00, 0x00, "STLOOP_11" }, /* 0x34 */
/* CARRIER RECOVERY LOOP */
{ ST0_RID_CRL_0, 0x60, 0x00, 0x01, 0x13, 0x00, 0x28, 0x00, 0x00, "CRL_0" },
{ ST0_RID_CRL_1, 0x61, 0x00, 0x01, 0x39, 0x00, 0x29, 0x00, 0x00, "CRL_1" },
{ ST0_RID_CRL_2, 0x62, 0x00, 0x01, 0x06, 0x00, 0x2A, 0x06, 0x00, "CRL_2" },
{ ST0_RID_CRL_3, 0x63, 0x00, 0x01, 0x00, 0x00, 0x2B, 0x00, 0x00, "CRL_3" },
{ ST0_RID_CRL_4, 0x64, 0x00, 0x01, 0x00, 0x00, 0x2C, 0x00, 0x00, "CRL_4" },
{ ST0_RID_CRL_5, 0x65, 0x00, 0x01, 0x00, 0x00, 0x2D, 0x00, 0x00, "CRL_5" },
{ ST0_RID_CRL_6, 0x66, 0x00, 0x01, 0x9E, 0x00, 0x2E, 0x00, 0x00, "CRL_6" },
{ ST0_RID_CRL_7, 0x67, 0x00, 0x01, 0xC4, 0x00, 0x2F, 0x00, 0x00, "CRL_7" },
{ ST0_RID_CRL_8, 0x68, 0x00, 0x01, 0x01, 0x00, 0x30, 0x00, 0x00, "CRL_8" },
{ ST0_RID_CRL_9, 0x69, 0x00, 0x01, 0x00, 0x00, 0x31, 0x00, 0x00, "CRL_9" },
{ ST0_RID_CRL_10, 0x6A, 0x00, 0x01, 0x02, 0x00, 0x32, 0x00, 0x00, "CRL_10" },
{ ST0_RID_CRL_11, 0x6B, 0x00, 0x01, 0x0F, 0x00, 0x33, 0x00, 0x00, "CRL_11" },
/* POST-FILTER DIGITAL AGC */
{ ST0_RID_PMFAGC_0, 0x70, 0x00, 0x01, 0xFF, 0x00, 0x34, 0x00, 0x00, "PMFAGC_0" },
{ ST0_RID_PMFAGC_1, 0x71, 0x00, 0x01, 0x04, 0x00, 0x35, 0x00, 0x00, "PMFAGC_1" },
{ ST0_RID_PMFAGC_2, 0x72, 0x00, 0x01, 0x00, 0x00, 0x36, 0x00, 0x00, "PMFAGC_2" },
{ ST0_RID_PMFAGC_3, 0x73, 0x00, 0x01, 0x00, 0x00, 0x37, 0x00, 0x00, "PMFAGC_3" },
{ ST0_RID_PMFAGC_4, 0x74, 0x00, 0x01, 0x00, 0x00, 0x38, 0x0C, 0x00, "PMFAGC_4" },
/* CONFIGURATION AND CONTROL */
{ ST0_RID_CTRL_0, 0x80, 0x00, 0x01, 0x20, 0x00, 0x39, 0x00, 0x00, "CTRL_0" },
{ ST0_RID_CTRL_1, 0x81, 0x00, 0x01, 0x00, 0x00, 0x3A, 0x00, 0x00, "CTRL_1" },
{ ST0_RID_CTRL_2, 0x82, 0x00, 0x01, 0x00, 0x00, 0x3B, 0x00, 0x00, "CTRL_2" },
{ ST0_RID_CTRL_3, 0x83, 0x00, 0x01, 0x00, 0x00, 0x3C, 0x00, 0x00, "CTRL_3" },
{ ST0_RID_CTRL_4, 0x84, 0x00, 0x01, 0x2A, 0x00, 0x3D, 0x2A, 0x00, "CTRL_4" },
{ ST0_RID_CTRL_5, 0x85, 0x00, 0x01, 0x00, 0x00, 0x3E, 0x00, 0x00, "CTRL_5" },
{ ST0_RID_CTRL_6, 0x86, 0x00, 0x01, 0xC0, 0x00, 0x3F, 0x40, 0x00, "CTRL_6" },
{ ST0_RID_CTRL_7, 0x87, 0x00, 0x01, 0x6B, 0x00, 0x40, 0x83, 0x00, "CTRL_7" },
{ ST0_RID_CTRL_8, 0x88, 0x00, 0x01, 0x00, 0x00, 0x41, 0x00, 0x00, "CTRL_8" },
{ ST0_RID_CTRL_9, 0x89, 0x00, 0x01, 0x00, 0x00, 0x42, 0x00, 0x00, "CTRL_9" },
/* DEINTERLEAVER SYNC DETECTOR */
{ ST0_RID_DEINT_SYNC_0, 0x90, 0x00, 0x01, 0x02, 0x00, 0x43, 0x01, 0x00, "DEINT_SYNC_0" },
{ ST0_RID_DEINT_SYNC_1, 0x91, 0x00, 0x00, 0x04, 0x00, 0x44, 0x01, 0x00, "DEINT_SYNC_1" },
/* INTEGRATED BER TESTER */
{ ST0_RID_BERT_0, 0xA0, 0x00, 0x01, 0x85, 0x00, 0x45, 0x00, 0x00, "BERT_0" },
{ ST0_RID_BERT_1, 0xA1, 0x00, 0x00, 0x49, 0x00, 0x46, 0x00, 0x00, "BERT_1" },
{ ST0_RID_BERT_2, 0xA2, 0x00, 0x00, 0x1A, 0x00, 0x47, 0x00, 0x00, "BERT_2" },
/* DEINTERLEAVER: Interleaving depth is 12, cell depth is 17. */
{ ST0_RID_DEINT_0, 0xB0, 0x00, 0x01, 0x91, 0x00, 0x48, 0x91, 0x00, "DEINT_0" },
{ ST0_RID_DEINT_1, 0xB1, 0x00, 0x01, 0x0B, 0x00, 0x49, 0x0B, 0x00, "DEINT_1" },
/* OUTPUT FORMATTER */
{ ST0_RID_OUTFORMAT_0, 0xC0, 0x00, 0x01, 0x4B, 0x00, 0x4A, 0x53, 0x00, "OUTFORMAT_0" },
{ ST0_RID_OUTFORMAT_1, 0xC1, 0x00, 0x01, 0x00, 0x00, 0x4B, 0x10, 0x00, "OUTFORMAT_1" },
{ ST0_RID_OUTFORMAT_2, 0xC2, 0x00, 0x01, 0x24, 0x00, 0x4C, 0x24, 0x00, "OUTFORMAT_2" },
/* REED-SOLOMON DESCRAMBLER SYNC DETECTOR */
{ ST0_RID_RS_DESC_0, 0xD0, 0x00, 0x00, 0xF4, 0x00, 0x4D, 0x00, 0x00, "RS_DESC_0" },
{ ST0_RID_RS_DESC_1, 0xD1, 0x00, 0x00, 0x0E, 0x00, 0x4E, 0x00, 0x00, "RS_DESC_1" },
{ ST0_RID_RS_DESC_2, 0xD2, 0x00, 0x00, 0x25, 0x00, 0x4F, 0x00, 0x00, "RS_DESC_2" },
{ ST0_RID_RS_DESC_3, 0xD3, 0x00, 0x00, 0x3A, 0x00, 0x50, 0x00, 0x00, "RS_DESC_3" },
{ ST0_RID_RS_DESC_4, 0xD4, 0x00, 0x00, 0x00, 0x00, 0x51, 0x00, 0x00, "RS_DESC_4" },
{ ST0_RID_RS_DESC_5, 0xD5, 0x00, 0x00, 0x00, 0x00, 0x52, 0x00, 0x00, "RS_DESC_5" },
{ ST0_RID_RS_DESC_14, 0xDE, 0x00, 0x01, 0x00, 0x00, 0x53, 0x00, 0x00, "RS_DESC_14" },
{ ST0_RID_RS_DESC_15, 0xDF, 0x00, 0x01, 0x81, 0x00, 0x54, 0x00, 0x00, "RS_DESC_15" },
/* !!! Don't insert or delete these registers. !!! */
/* !!! Add new registers here. !!! */
/* addr value wflag start store resv1 resv2 resv3 name[] */
{ ST0_RID_EQU_2, 0x02, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, "EQU_2" }, /* reserved */
{ ST0_RID_EQU_5, 0x05, 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, "EQU_5" }, /* reserved */
{ ST0_RID_EQU_6, 0x06, 0x00, 0x00, 0x00, 0x00, 0x57, 0x00, 0x00, "EQU_6" }, /* reserved */
{ ST0_RID_DEINT_2, 0xB2, 0x00, 0x00, 0x00, 0x00, 0x58, 0x00, 0x00, "DEINT_2" }, /* reserved */
{ ST0_RID_DEINT_3, 0xB3, 0x00, 0x00, 0x00, 0x00, 0x59, 0x00, 0x00, "DEINT_3" } /* reserved */
};
#else /*#if defined(TOWER_CABLE_TUNER) && (TOWER_CABLE_TUNER==YES)*/
#if (NIM_DCF_VENDOR == CTT_THOMSON_NIM)
/***************************/
/* FOR SGS-THOMSON DCF8722 */
/***************************/
DCF_REGISTER gDemReg[DCF_REG_NUM] =
{/* index addr value wflag start store resv1 resv2 resv3 name[] */
/* EQUALIZER - CONSTELLATION QUALITY ESTIMATOR */
{ ST0_RID_EQU_0, 0x00, 0x00, 0x01, 0x48, 0x00, 0x00, 0x09, 0x00, "EQU_0" },
{ ST0_RID_EQU_1, 0x01, 0x00, 0x01, 0x58, 0x00, 0x01, 0x69, 0x00, "EQU_1" },
{ ST0_RID_EQU_3, 0x03, 0x00, 0x01, 0x00, 0x00, 0x02, 0x00, 0x00, "EQU_3" },
{ ST0_RID_EQU_4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, "EQU_4" },
{ ST0_RID_EQU_7, 0x07, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, "EQU_7" },
{ ST0_RID_EQU_8, 0x08, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, "EQU_8" },
/* QUADRATURE DEMODULATOR */
{ ST0_RID_INITDEM_0, 0x20, 0x00, 0x01, 0x00, 0x00, 0x06, 0x00, 0x00, "INITDEM_0" },
{ ST0_RID_INITDEM_1, 0x21, 0x00, 0x01, 0x40, 0x00, 0x07, 0x00, 0x00, "INITDEM_1" },
{ ST0_RID_INITDEM_2, 0x22, 0x00, 0x01, 0x0A, 0x00, 0x08, 0x00, 0x00, "INITDEM_2" },
{ ST0_RID_INITDEM_3, 0x23, 0x00, 0x01, 0x00, 0x00, 0x09, 0x00, 0x00, "INITDEM_3" },
{ ST0_RID_INITDEM_4, 0x24, 0x00, 0x01, 0x40, 0x00, 0x0A, 0x40, 0x00, "INITDEM_4" },
{ ST0_RID_INITDEM_5, 0x25, 0x00, 0x01, 0x08, 0x00, 0x0B, 0x08, 0x00, "INITDEM_5" },
/* ANALOG AGCS - A/D OVERFLOW MONITOR */
{ ST0_RID_DELAGC_0, 0x30, 0x00, 0x01, 0xFF, 0x00, 0x0C, 0x00, 0x00, "DELAGC_0" },
{ ST0_RID_DELAGC_1, 0x31, 0x00, 0x01, 0x63, 0x00, 0x0D, 0x00, 0x00, "DELAGC_1" },
{ ST0_RID_DELAGC_2, 0x32, 0x00, 0x01, 0xDF, 0x00, 0x0E, 0x00, 0x00, "DELAGC_2" },
{ ST0_RID_DELAGC_3, 0x33, 0x00, 0x01, 0x00, 0x00, 0x0F, 0x00, 0x00, "DELAGC_3" },
{ ST0_RID_DELAGC_4, 0x34, 0x00, 0x01, 0x32, 0x00, 0x10, 0x00, 0x00, "DELAGC_4" },
{ ST0_RID_DELAGC_5, 0x35, 0x00, 0x01, 0x5F, 0x00, 0x11, 0x00, 0x00, "DELAGC_5" },
{ ST0_RID_DELAGC_6, 0x36, 0x00, 0x01, 0x80, 0x00, 0x12, 0x00, 0x00, "DELAGC_6" },
{ ST0_RID_DELAGC_7, 0x37, 0x00, 0x01, 0x00, 0x00, 0x13, 0x00, 0x00, "DELAGC_7" },
{ ST0_RID_DELAGC_8, 0x38, 0x00, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, "DELAGC_8" },
{ ST0_RID_WBAGC_0, 0x40, 0x00, 0x01, 0x1B, 0x00, 0x15, 0x00, 0x00, "WBAGC_0" },
{ ST0_RID_WBAGC_1, 0x41, 0x00, 0x01, 0x9D, 0x00, 0x16, 0x00, 0x00, "WBAGC_1" },
{ ST0_RID_WBAGC_2, 0x42, 0x00, 0x01, 0x30, 0x00, 0x17, 0x02, 0x00, "WBAGC_2" },
{ ST0_RID_WBAGC_3, 0x43, 0x00, 0x01, 0x10, 0x00, 0x18, 0x20, 0x00, "WBAGC_3" },
{ ST0_RID_WBAGC_4, 0x44, 0x00, 0x01, 0x58, 0x00, 0x19, 0x00, 0x00, "WBAGC_4" },
{ ST0_RID_WBAGC_5, 0x45, 0x00, 0x01, 0x00, 0x00, 0x1A, 0x00, 0x00, "WBAGC_5" },
{ ST0_RID_WBAGC_6, 0x46, 0x00, 0x01, 0x00, 0x00, 0x1B, 0x00, 0x00, "WBAGC_6" },
{ ST0_RID_WBAGC_9, 0x49, 0x00, 0x01, 0x02, 0x00, 0x1C, 0x00, 0x00, "WBAGC_9" },
{ ST0_RID_WBAGC_10, 0x4A, 0x00, 0x01, 0xFF, 0x00, 0x1D, 0x00, 0x00, "WBAGC_10" },
{ ST0_RID_WBAGC_11, 0x4B, 0x00, 0x01, 0x7F, 0x00, 0x1E, 0x00, 0x00, "WBAGC_11" },
/* SYMBOL TIMING RECOVERY LOOP */
{ ST0_RID_STLOOP_2, 0x52, 0x00, 0x01, 0x30, 0x00, 0x1F, 0x00, 0x00, "STLOOP_2" },
{ ST0_RID_STLOOP_3, 0x53, 0x00, 0x01, 0x08, 0x00, 0x20, 0x00, 0x00, "STLOOP_3" },
{ ST0_RID_STLOOP_5, 0x55, 0x00, 0x01, 0x55, 0x00, 0x21, 0x00, 0x00, "STLOOP_5" },
{ ST0_RID_STLOOP_6, 0x56, 0x00, 0x01, 0x55, 0x00, 0x22, 0x00, 0x00, "STLOOP_6" },
{ ST0_RID_STLOOP_7, 0x57, 0x00, 0x01, 0x55, 0x00, 0x23, 0x00, 0x00, "STLOOP_7" },
{ ST0_RID_STLOOP_8, 0x58, 0x00, 0x01, 0x3D, 0x00, 0x24, 0x00, 0x00, "STLOOP_8" },
{ ST0_RID_STLOOP_9, 0x59, 0x00, 0x01, 0x08, 0x00, 0x25, 0x00, 0x00, "STLOOP_9" },
{ ST0_RID_STLOOP_10, 0x5A, 0x00, 0x01, 0x1E, 0x00, 0x26, 0x00, 0x00, "STLOOP_10" },
{ ST0_RID_STLOOP_11, 0x5B, 0x00, 0x01, 0x04, 0x00, 0x27, 0x00, 0x00, "STLOOP_11" }, /* 0x34 */
/* CARRIER RECOVERY LOOP */
{ ST0_RID_CRL_0, 0x60, 0x00, 0x01, 0x13, 0x00, 0x28, 0x00, 0x00, "CRL_0" },
{ ST0_RID_CRL_1, 0x61, 0x00, 0x01, 0x3A, 0x00, 0x29, 0x00, 0x00, "CRL_1" },
{ ST0_RID_CRL_2, 0x62, 0x00, 0x01, 0x06, 0x00, 0x2A, 0x06, 0x00, "CRL_2" },
{ ST0_RID_CRL_3, 0x63, 0x00, 0x01, 0x00, 0x00, 0x2B, 0x00, 0x00, "CRL_3" },
{ ST0_RID_CRL_4, 0x64, 0x00, 0x01, 0x00, 0x00, 0x2C, 0x00, 0x00, "CRL_4" },
{ ST0_RID_CRL_5, 0x65, 0x00, 0x01, 0x00, 0x00, 0x2D, 0x00, 0x00, "CRL_5" },
{ ST0_RID_CRL_6, 0x66, 0x00, 0x01, 0x9E, 0x00, 0x2E, 0x00, 0x00, "CRL_6" },
{ ST0_RID_CRL_7, 0x67, 0x00, 0x01, 0xC4, 0x00, 0x2F, 0x00, 0x00, "CRL_7" },
{ ST0_RID_CRL_8, 0x68, 0x00, 0x01, 0x01, 0x00, 0x30, 0x00, 0x00, "CRL_8" },
{ ST0_RID_CRL_9, 0x69, 0x00, 0x01, 0x00, 0x00, 0x31, 0x00, 0x00, "CRL_9" },
{ ST0_RID_CRL_10, 0x6A, 0x00, 0x01, 0x02, 0x00, 0x32, 0x00, 0x00, "CRL_10" },
{ ST0_RID_CRL_11, 0x6B, 0x00, 0x01, 0x0F, 0x00, 0x33, 0x00, 0x00, "CRL_11" },
/* POST-FILTER DIGITAL AGC */
{ ST0_RID_PMFAGC_0, 0x70, 0x00, 0x01, 0xFF, 0x00, 0x34, 0x00, 0x00, "PMFAGC_0" },
{ ST0_RID_PMFAGC_1, 0x71, 0x00, 0x01, 0x04, 0x00, 0x35, 0x00, 0x00, "PMFAGC_1" },
{ ST0_RID_PMFAGC_2, 0x72, 0x00, 0x01, 0x00, 0x00, 0x36, 0x00, 0x00, "PMFAGC_2" },
{ ST0_RID_PMFAGC_3, 0x73, 0x00, 0x01, 0x00, 0x00, 0x37, 0x00, 0x00, "PMFAGC_3" },
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