📄 sub.tan.rpt
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Timing Analyzer report for sub
Sun Jan 11 21:33:35 2009
Version 6.0 Build 178 04/27/2006 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. tpd
5. Timing Analyzer Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+-------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Worst-case tpd ; N/A ; None ; 11.522 ns ; a[1] ; c[3] ; -- ; -- ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EPM240T100C5 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Default hold multicycle ; Same As Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; Off ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+-----------------------------------------------------------+
; tpd ;
+-------+-------------------+-----------------+------+------+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
+-------+-------------------+-----------------+------+------+
; N/A ; None ; 11.522 ns ; a[1] ; c[3] ;
; N/A ; None ; 11.521 ns ; a[1] ; c[2] ;
; N/A ; None ; 11.517 ns ; a[1] ; c[4] ;
; N/A ; None ; 11.456 ns ; a[0] ; c[3] ;
; N/A ; None ; 11.455 ns ; a[0] ; c[2] ;
; N/A ; None ; 11.451 ns ; a[0] ; c[4] ;
; N/A ; None ; 11.266 ns ; b[1] ; c[3] ;
; N/A ; None ; 11.265 ns ; b[1] ; c[2] ;
; N/A ; None ; 11.261 ns ; b[1] ; c[4] ;
; N/A ; None ; 11.192 ns ; b[0] ; c[3] ;
; N/A ; None ; 11.191 ns ; b[0] ; c[2] ;
; N/A ; None ; 11.187 ns ; b[0] ; c[4] ;
; N/A ; None ; 11.101 ns ; a[1] ; c[7] ;
; N/A ; None ; 11.081 ns ; a[1] ; c[6] ;
; N/A ; None ; 11.075 ns ; a[1] ; c[5] ;
; N/A ; None ; 11.035 ns ; a[0] ; c[7] ;
; N/A ; None ; 11.015 ns ; a[0] ; c[6] ;
; N/A ; None ; 11.009 ns ; a[0] ; c[5] ;
; N/A ; None ; 10.941 ns ; a[2] ; c[3] ;
; N/A ; None ; 10.940 ns ; a[2] ; c[2] ;
; N/A ; None ; 10.936 ns ; a[2] ; c[4] ;
; N/A ; None ; 10.845 ns ; b[1] ; c[7] ;
; N/A ; None ; 10.825 ns ; b[1] ; c[6] ;
; N/A ; None ; 10.819 ns ; b[1] ; c[5] ;
; N/A ; None ; 10.771 ns ; b[0] ; c[7] ;
; N/A ; None ; 10.751 ns ; b[0] ; c[6] ;
; N/A ; None ; 10.745 ns ; b[0] ; c[5] ;
; N/A ; None ; 10.744 ns ; a[2] ; c[7] ;
; N/A ; None ; 10.733 ns ; b[2] ; c[3] ;
; N/A ; None ; 10.732 ns ; b[2] ; c[2] ;
; N/A ; None ; 10.728 ns ; b[2] ; c[4] ;
; N/A ; None ; 10.724 ns ; a[2] ; c[6] ;
; N/A ; None ; 10.718 ns ; a[2] ; c[5] ;
; N/A ; None ; 10.536 ns ; b[2] ; c[7] ;
; N/A ; None ; 10.516 ns ; b[2] ; c[6] ;
; N/A ; None ; 10.510 ns ; b[2] ; c[5] ;
; N/A ; None ; 10.429 ns ; a[1] ; c[1] ;
; N/A ; None ; 10.363 ns ; a[0] ; c[1] ;
; N/A ; None ; 10.173 ns ; b[1] ; c[1] ;
; N/A ; None ; 10.099 ns ; b[0] ; c[1] ;
; N/A ; None ; 9.945 ns ; a[3] ; c[3] ;
; N/A ; None ; 9.944 ns ; a[3] ; c[2] ;
; N/A ; None ; 9.940 ns ; a[3] ; c[4] ;
; N/A ; None ; 9.849 ns ; a[2] ; c[1] ;
; N/A ; None ; 9.748 ns ; a[3] ; c[7] ;
; N/A ; None ; 9.728 ns ; a[3] ; c[6] ;
; N/A ; None ; 9.722 ns ; a[3] ; c[5] ;
; N/A ; None ; 9.641 ns ; b[2] ; c[1] ;
; N/A ; None ; 9.387 ns ; b[3] ; c[3] ;
; N/A ; None ; 9.386 ns ; b[3] ; c[2] ;
; N/A ; None ; 9.382 ns ; b[3] ; c[4] ;
; N/A ; None ; 9.190 ns ; b[3] ; c[7] ;
; N/A ; None ; 9.170 ns ; b[3] ; c[6] ;
; N/A ; None ; 9.164 ns ; b[3] ; c[5] ;
; N/A ; None ; 8.853 ns ; a[3] ; c[1] ;
; N/A ; None ; 8.295 ns ; b[3] ; c[1] ;
+-------+-------------------+-----------------+------+------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
Info: Processing started: Sun Jan 11 21:33:34 2009
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off sub -c sub
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Info: Longest tpd from source pin "a[1]" to destination pin "c[3]" is 11.522 ns
Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_28; Fanout = 3; PIN Node = 'a[1]'
Info: 2: + IC(3.131 ns) + CELL(0.747 ns) = 5.010 ns; Loc. = LC_X6_Y4_N2; Fanout = 2; COMB Node = 'c_tmp[1]~11'
Info: 3: + IC(0.000 ns) + CELL(0.815 ns) = 5.825 ns; Loc. = LC_X6_Y4_N3; Fanout = 7; COMB Node = 'c_tmp[2]~12'
Info: 4: + IC(0.762 ns) + CELL(0.914 ns) = 7.501 ns; Loc. = LC_X6_Y4_N7; Fanout = 1; COMB Node = 'WideOr4~4'
Info: 5: + IC(1.699 ns) + CELL(2.322 ns) = 11.522 ns; Loc. = PIN_82; Fanout = 0; PIN Node = 'c[3]'
Info: Total cell delay = 5.930 ns ( 51.47 % )
Info: Total interconnect delay = 5.592 ns ( 48.53 % )
Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings
Info: Processing ended: Sun Jan 11 21:33:35 2009
Info: Elapsed time: 00:00:02
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