mlt.fit.rpt

一些Verilog学习程序B

; 97       ; 79         ; 2        ; RESERVED_INPUT ;        ;              ;         ; Column I/O ;                 ; no       ; Off          ;
; 98       ; 80         ; 2        ; RESERVED_INPUT ;        ;              ;         ; Column I/O ;                 ; no       ; Off          ;
; 99       ; 81         ; 2        ; RESERVED_INPUT ;        ;              ;         ; Column I/O ;                 ; no       ; Off          ;
; 100      ; 82         ; 2        ; RESERVED_INPUT ;        ;              ;         ; Column I/O ;                 ; no       ; Off          ;
+----------+------------+----------+----------------+--------+--------------+---------+------------+-----------------+----------+--------------+


+-------------------------------------------------------------+
; Output Pin Default Load For Reported TCO                    ;
+----------------------------+-------+------------------------+
; I/O Standard               ; Load  ; Termination Resistance ;
+----------------------------+-------+------------------------+
; LVTTL                      ; 10 pF ; Not Available          ;
; LVCMOS                     ; 10 pF ; Not Available          ;
; 2.5 V                      ; 10 pF ; Not Available          ;
; 1.8 V                      ; 10 pF ; Not Available          ;
; 1.5 V                      ; 10 pF ; Not Available          ;
; 3.3V Schmitt Trigger Input ; 10 pF ; Not Available          ;
; 2.5V Schmitt Trigger Input ; 10 pF ; Not Available          ;
+----------------------------+-------+------------------------+
Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                                                                                                                                                 ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; UFM Blocks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
; |mlt                       ; 7 (7)       ; 0            ; 0          ; 13   ; 0            ; 7 (7)        ; 0 (0)             ; 0 (0)            ; 0 (0)           ; 0 (0)      ; |mlt                ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+---------------------------------+
; Delay Chain Summary             ;
+------+----------+---------------+
; Name ; Pin Type ; Pad to Core 0 ;
+------+----------+---------------+
; b[0] ; Input    ; 0             ;
; b[1] ; Input    ; 0             ;
; a[1] ; Input    ; 0             ;
; a[0] ; Input    ; 0             ;
; c[0] ; Output   ; --            ;
; c[1] ; Output   ; --            ;
; c[2] ; Output   ; --            ;
; c[3] ; Output   ; --            ;
; c[4] ; Output   ; --            ;
; c[5] ; Output   ; --            ;
; c[6] ; Output   ; --            ;
; c[7] ; Output   ; --            ;
; en   ; Output   ; --            ;
+------+----------+---------------+


+---------------------------------+
; Non-Global High Fan-Out Signals ;
+--------------+------------------+
; Name         ; Fan-Out          ;
+--------------+------------------+
; a[0]         ; 7                ;
; a[1]         ; 7                ;
; b[1]         ; 7                ;
; b[0]         ; 7                ;
; WideOr5      ; 1                ;
; WideOr4~18   ; 1                ;
; WideOr6~49   ; 1                ;
; WideOr0~4    ; 1                ;
; Decoder0~187 ; 1                ;
; WideOr3~4    ; 1                ;
; Decoder0~186 ; 1                ;
+--------------+------------------+


+------------------------------------------------+
; Interconnect Usage Summary                     ;
+----------------------------+-------------------+
; Interconnect Resource Type ; Usage             ;
+----------------------------+-------------------+
; C4s                        ; 6 / 784 ( < 1 % ) ;
; Direct links               ; 0 / 888 ( 0 % )   ;
; Global clocks              ; 0 / 4 ( 0 % )     ;
; LAB clocks                 ; 0 / 32 ( 0 % )    ;
; LUT chains                 ; 0 / 216 ( 0 % )   ;
; Local interconnects        ; 8 / 888 ( < 1 % ) ;
; R4s                        ; 8 / 704 ( 1 % )   ;
+----------------------------+-------------------+


+--------------------------------------------------------------------------+
; LAB Logic Elements                                                       ;
+--------------------------------------------+-----------------------------+
; Number of Logic Elements  (Average = 3.50) ; Number of LABs  (Total = 2) ;
+--------------------------------------------+-----------------------------+
; 1                                          ; 0                           ;
; 2                                          ; 0                           ;
; 3                                          ; 1                           ;
; 4                                          ; 1                           ;
; 5                                          ; 0                           ;
; 6                                          ; 0                           ;
; 7                                          ; 0                           ;
; 8                                          ; 0                           ;
; 9                                          ; 0                           ;
; 10                                         ; 0                           ;
+--------------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Signals Sourced                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Signals Sourced  (Average = 3.50) ; Number of LABs  (Total = 2) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0                           ;
; 2                                           ; 0                           ;
; 3                                           ; 1                           ;
; 4                                           ; 1                           ;
+---------------------------------------------+-----------------------------+


+-------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                       ;
+-------------------------------------------------+-----------------------------+
; Number of Signals Sourced Out  (Average = 3.50) ; Number of LABs  (Total = 2) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 0                           ;
; 1                                               ; 0                           ;
; 2                                               ; 0                           ;
; 3                                               ; 1                           ;
; 4                                               ; 1                           ;
+-------------------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Distinct Inputs                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Distinct Inputs  (Average = 4.00) ; Number of LABs  (Total = 2) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0                           ;
; 2                                           ; 0                           ;
; 3                                           ; 0                           ;
; 4                                           ; 2                           ;
+---------------------------------------------+-----------------------------+


+--------------------------------------------------------------------+
; Fitter Device Options                                              ;
+----------------------------------------------+---------------------+
; Option                                       ; Setting             ;
+----------------------------------------------+---------------------+