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📄 44binit.s

📁 s3c44B0的一些基础实验代码
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# *******************************************************
# * NAME    : 44BINIT.S									*
# * Version : 10.April.2000								*
# * Description:										*
# *	C start up codes									*
# *	Configure memory, Initialize ISR ,stacks			*
# *	Initialize C-variables								*
# *	Fill zeros into zero-initialized C-variables		*
# *******************************************************

    .include "./include/option.a"
    .include "./include/memcfg.a"

#Memory Area
#GCS6    64M 16bit(8MB) DRAM/SDRAM(0xc000000-0xc7fffff)
#APP     RAM=0xc000000~0xc7effff 
#EV_boot RAM=0xc7f0000-0xc7ff000 // if EV_boot
#STACK	 =0xc7ffa00

#Interrupt Control
.equ 	INTPND,		0x01e00004
.equ 	INTMOD,		0x01e00008
.equ 	INTMSK,		0x01e0000c
.equ 	I_ISPR,		0x01e00020
.equ 	I_CMST,		0x01e0001c

#Watchdog timer
.equ 	WTCON,		0x01d30000

#Clock Controller
.equ 	PLLCON,		0x01d80000
.equ 	CLKCON,		0x01d80004
.equ 	LOCKTIME,	0x01d8000c
	
#Memory Controller
.equ 	REFRESH,	0x01c80024

#BDMA destination register
.equ 	BDIDES0,	0x1f80008
.equ 	BDIDES1,	0x1f80028

#Pre-defined constants
.equ 	USERMODE,	0x10
.equ 	FIQMODE,	0x11
.equ 	IRQMODE,	0x12
.equ 	SVCMODE,	0x13
.equ 	ABORTMODE,	0x17
.equ 	UNDEFMODE,	0x1b
.equ 	MODEMASK,	0x1f
.equ 	NOINT,		0xc0

    .macro HANDLER HandleLabel
    sub	    sp,sp,#4	    /* decrement sp(to store jump address) */							
    stmfd   sp!,{r0}	    /* PUSH the work register to stack(lr does't push because it return to original address) */
    ldr	    r0,=\HandleLabel /* load the address of HandleXXX to r0 */
    ldr	    r0,[r0]	    	/* load the contents(service routine start address) of HandleXXX */
    str	    r0,[sp,#4]	    /* store the contents(ISR) of HandleXXX to stack */
    ldmfd   sp!,{r0,pc}	    /* POP the work register and pc(jump to ISR) */
    .endm

    .extern       Image_RO_Limit      	/* End of ROM code (=start of ROM data) */
    .extern       Image_RW_Base       	/* Base of RAM to initialise */           
    .extern       Image_ZI_Base       	/* Base and limit of area */              
    .extern       Image_ZI_Limit      	/* to zero initialise */       

    .extern Main	/* The main entry of mon program */
    /* IMPORT Test */
    
    .text

    ENTRY:
    b ResetHandler		/* for debug            */
    b HandlerUndef      /* handlerUndef         */
    b HandlerSWI        /* SWI interrupt handler*/
    b HandlerPabort     /* handlerPAbort        */
    b HandlerDabort     /* handlerDAbort        */
    b .                 /* handlerReserved      */
    b HandlerIRQ
    b HandlerFIQ
	#***IMPORTANT NOTE***
	#If the H/W vectored interrutp mode is enabled, The above two instructions should
	#be changed like below, to work-around with H/W bug of S3C44B0X interrupt controller. 
	# b HandlerIRQ  ->  subs pc,lr,#4
	# b HandlerIRQ  ->  subs pc,lr,#4

VECTOR_BRANCH:
    ldr pc,=HandleEINT0    /*mGA    H/W interrupt vector table  */
    ldr pc,=HandleEINT1    /*	                              	*/	
    ldr pc,=HandleEINT2    /*                                   */  
    ldr pc,=HandleEINT3    /*                                   */  
    ldr pc,=HandleEINT4567 /*                                   */  
    ldr pc,=HandleTICK	   /*mGA                                */   
    b .                                                          
    b .                                                         
    ldr pc,=HandleZDMA0    /*mGB                                */  
    ldr pc,=HandleZDMA1    /*                                   */  
    ldr pc,=HandleBDMA0    /*                                   */  
    ldr pc,=HandleBDMA1    /*                                   */  
    ldr pc,=HandleWDT	   /*                                   */   
    ldr pc,=HandleUERR01   /*mGB                                */  
    b .                                                          
    b .                                                          
    ldr pc,=HandleTIMER0   /*mGC                                */  
    ldr pc,=HandleTIMER1   /*                                   */  
    ldr pc,=HandleTIMER2   /*                                   */  
    ldr pc,=HandleTIMER3   /*                                   */  
    ldr pc,=HandleTIMER4   /*                                   */  
    ldr pc,=HandleTIMER5   /*mGC                                */  
    b .                                                          
    b .                                                          
    ldr pc,=HandleURXD0    /*mGD                                */  
    ldr pc,=HandleURXD1    /*                                   */  
    ldr pc,=HandleIIC	   /*                                   */   
    ldr pc,=HandleSIO	   /*                                   */   
    ldr pc,=HandleUTXD0    /*                                   */  
    ldr pc,=HandleUTXD1    /*mGD                                */  
    b .                                                          
    b .                                                          
    ldr pc,=HandleRTC	   /*mGKA                               */   
    b .					   /*                     		        */
    b .					   /*                     		        */
    b .					   /*                     		        */
    b .					   /*                     		        */
    b .					   /*mGKA                 				*/
    b .                                                          
    b .                                                          
    ldr pc,=HandleADC	   /*mGKB                               */  
    b .					   /*                     		        */
    b .					   /*                     		        */
    b .					   /*                     		        */
    b .					   /*                     		        */
    b .					   /*mGKB                 		        */
    b .                                                          
    b .                                                          
@0xe0=EnterPWDN                                                 
    ldr pc,=EnterPWDN

    .ltorg	

HandlerFIQ:	HANDLER HandleFIQ
HandlerIRQ:	HANDLER HandleIRQ
HandlerUndef:	HANDLER HandleUndef
HandlerSWI:	HANDLER HandleSWI
HandlerDabort:	HANDLER HandleDabort
HandlerPabort:	HANDLER HandlePabort

HandlerADC:	HANDLER HandleADC
HandlerRTC:	HANDLER HandleRTC
HandlerUTXD1:	HANDLER HandleUTXD1
HandlerUTXD0:	HANDLER HandleUTXD0
HandlerSIO:	HANDLER HandleSIO
HandlerIIC:	HANDLER HandleIIC
HandlerURXD1:	HANDLER HandleURXD1
HandlerURXD0:	HANDLER HandleURXD0
HandlerTIMER5:	HANDLER HandleTIMER5
HandlerTIMER4:	HANDLER HandleTIMER4
HandlerTIMER3:	HANDLER HandleTIMER3
HandlerTIMER2:	HANDLER HandleTIMER2
HandlerTIMER1:	HANDLER HandleTIMER1
HandlerTIMER0:	HANDLER HandleTIMER0
HandlerUERR01:	HANDLER HandleUERR01
HandlerWDT:	HANDLER HandleWDT
HandlerBDMA1:	HANDLER HandleBDMA1
HandlerBDMA0:	HANDLER HandleBDMA0
HandlerZDMA1:	HANDLER HandleZDMA1
HandlerZDMA0:	HANDLER HandleZDMA0
HandlerTICK:	HANDLER HandleTICK
HandlerEINT4567:	HANDLER HandleEINT4567
HandlerEINT3:	HANDLER HandleEINT3
HandlerEINT2:	HANDLER HandleEINT2
HandlerEINT1:	HANDLER HandleEINT1
HandlerEINT0:	HANDLER HandleEINT0


#One of the following two routines can be used for non-vectored interrupt.

IsrIRQ:				/* using I_ISPR register. */
    sub	    sp,sp,#4       	/* reserved for PC	  */
    stmfd   sp!,{r8-r9}   

	#IMPORTANT CAUTION
	#if I_ISPC isn't used properly, I_ISPR can be 0 in this routine.

    ldr	    r9,=I_ISPR
    ldr	    r9,[r9]

	cmp		r9, #0x0			/* If the IDLE mode work-around is used, 	*/
							/* r9 may be 0 sometimes.			*/
	beq		l2

    mov	    r8,#0x0
l0:
    movs    r9,r9,lsr #1
    bcs	    l1
    add	    r8,r8,#4
    b	    l0

l1:
    ldr	    r9,=HandleADC
    add	    r9,r9,r8
    ldr	    r9,[r9]
    str	    r9,[sp,#8]
    ldmfd   sp!,{r8-r9,pc}

l2:
	ldmfd	sp!,{r8-r9}
	add		sp,sp,#4
	subs	pc,lr,#4

#****************************************************
#*	START											*
#****************************************************
ResetHandler:
    ldr	    r0,=WTCON	    	/* watch dog disable*/
    ldr	    r1,=0x0 		
    str	    r1,[r0]

    ldr	    r0,=INTMSK
    ldr	    r1,=0x07ffffff  	/* all interrupt disable */
    str	    r1,[r0]

    #****************************************************
    #*	Set clock control registers						*
    #****************************************************
    ldr	r0,=LOCKTIME
    ldr	r1,=0xfff
    str	r1,[r0]

.if PLLONSTART
	ldr	r0,=PLLCON				/* temporary setting of PLL */

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