📄 atadrv.h
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/* ataDrv.h - ATA/IDE (LOCAL and PCMCIA) disk controller header */
/* Copyright 1984-2002 Wind River Systems, Inc. */
/*
modification history
--------------------
01h,29apr02,pmr SPR 76487: changed ataDrv() arg configType from BOOL to int.
01g,09nov01,jac SPR#67795, added definitions for ATAPI CDROM extensions.
01f,30oct97,db added macro ATA_SWAP for big endian targets. changed some
elements in ATA_CTRL from short to UINT32.
01e,10dec97,ms added usrAtaConfig prototype and ataResources import
01e,01nov96,hdn added support for PCMCIA
01d,25sep96,hdn added support for ATA-2
01c,18mar96,hdn added ataShowInit().
01b,01mar96,hdn cleaned up.
01a,02mar95,hdn written based on ideDrv.h.
*/
#ifndef __INCpcataDrvh
#define __INCpcataDrvh
#ifdef __cplusplus
extern "C"
{
#endif
#ifndef _ASMLANGUAGE
#include "dosFsLib.h"
#include "blkIo.h"
#include "wdLib.h"
#include "private/semLibP.h"
#include "drv/pcmcia/pccardLib.h"
#include "capi/bestcomm_api.h"
IMPORT ATA_RESOURCE ataResources[];
/* define swap macro for little/big endian machines */
#if _BYTE_ORDER == _BIG_ENDIAN
# define ATA_SWAP(x) LONGSWAP(x)
#else
# define ATA_SWAP(x) (x)
#endif
#define ATA_DEBUG 1
#define IDE_LOCAL 0 /* ctrl type: LOCAL(IDE) */
#define ATA_PCMCIA 1 /* ctrl type: PCMCIA */
#define ATA_MAX_CTRLS 1 /* max number of ATA controller */
#define ATA_MAX_DRIVES 2 /* max number of ATA drives */
typedef struct ataParams
{
short config; /* general configuration */
short cylinders; /* number of cylinders */
short removcyl; /* number of removable cylinders */
short heads; /* number of heads */
short bytesTrack; /* number of unformatted bytes/track */
short bytesSec; /* number of unformatted bytes/sector */
short sectors; /* number of sectors/track */
short bytesGap; /* minimum bytes in intersector gap */
short bytesSync; /* minimum bytes in sync field */
short vendstat; /* number of words of vendor status */
char serial[20]; /* controller serial number */
short type; /* controller type */
short size; /* sector buffer size, in sectors */
short bytesEcc; /* ecc bytes appended */
char rev[8]; /* firmware revision */
char model[40]; /* model name */
short multiSecs; /* RW multiple support. bits 7-0 ia max secs */
short reserved48; /* reserved */
short capabilities; /* capabilities */
short reserved50; /* reserved */
short pioMode; /* PIO data transfer cycle timing mode */
short dmaMode; /* single word DMA data transfer cycle timing */
short valid; /* field validity */
short currentCylinders; /* number of current logical cylinders */
short currentHeads; /* number of current logical heads */
short currentSectors; /* number of current logical sectors / track */
short capacity0; /* current capacity in sectors */
short capacity1; /* current capacity in sectors */
short multiSet; /* multiple sector setting */
short sectors0; /* total number of user addressable sectors */
short sectors1; /* total number of user addressable sectors */
short singleDma; /* [62]single word DMA transfer */
short multiDma; /* [63]multi word DMA transfer */
short advancedPio; /* [64]flow control PIO transfer modes supported */
short cycletimeDma; /* minimum multiword DMA transfer cycle time */
short cycletimeMulti; /* recommended multiword DMA cycle time */
short cycletimePioNoIordy; /* min PIO transfer cycle time wo flow ctl */
short cycletimePioIordy; /* min PIO transfer cycle time w IORDY */
short reserved69; /* reserved */
short reserved70; /* reserved */
/* ATAPI */
short pktCmdRelTime; /* [71]Typical Time for Release after Packet */
short servCmdRelTime; /* [72]Typical Time for Release after SERVICE */
#if 0
short majorRevNum; /* [73] Major Revision Number (0|FFFF if no) */
short minorVersNum; /* [74] Minor Version Number (0|FFFF if no) */
#else
short reserved73[2];
#endif
short queuedepth; /* [75] 4-0 Maximum queue depth – 1*/
short reserved76[4]; /* 76-79 reserved */
short majorversNum; /* Major version number
0000h or FFFFh = device does not report version F 15 Reserved
F 14 Reserved for ATA/ATAPI-14
F 13 Reserved for ATA/ATAPI-13
F 12 Reserved for ATA/ATAPI-12
F 11 Reserved for ATA/ATAPI-11
F 10 Reserved for ATA/ATAPI-10
F 9 Reserved for ATA/ATAPI-9
F 8 Reserved for ATA/ATAPI-8
F 7 Reserved for ATA/ATAPI-7
F 6 1 = supports ATA/ATAPI-6
F 5 1 = supports ATA/ATAPI-5
F 4 1 = supports ATA/ATAPI-4
F 3 1 = supports ATA-3
X 2 Obsolete
X 1 Obsolete
F 0 Reserved*/
short minorVersNum; /* Minor version number
0000h or FFFFh = device does not report version
0001h-FFFEh = see 3.16.41*/
short commandSetSup1; /* [82] Command set supported*/
short commandSetSup2;
short commandSetExt; /* Command set/feature supported extension*/
short commandSetEnable1; /* Command set/feature enabled. */
short commandSetEnable2;
short commandSetDefault; /* Command set/feature default */
short ultraDmaMode; /* [88] F 15-14 Reserved
V 13 1 = Ultra DMA mode 5 is selected
0 = Ultra DMA mode 5 is not selected
V 12 1 = Ultra DMA mode 4 is selected
0 = Ultra DMA mode 4 is not selected
V 11 1 = Ultra DMA mode 3 is selected
0 = Ultra DMA mode 3 is not selected
V 10 1 = Ultra DMA mode 2 is selected
0 = Ultra DMA mode 2 is not selected
V 9 1 = Ultra DMA mode 1 is selected
0 = Ultra DMA mode 1 is not selected
V 8 1 = Ultra DMA mode 0 is selected
0 = Ultra DMA mode 0 is not selected
F 7-6 Reserved
F 5 1 = Ultra DMA mode 5 and below are supported
F 4 1 = Ultra DMA mode 4 and below are supported
F 3 1 = Ultra DMA mode 3 and below are supported
F 2 1 = Ultra DMA mode 2 and below are supported
F 1 1 = Ultra DMA mode 1 and below are supported
F 0 1 = Ultra DMA mode 0 is supported*/
short reserved89[39]; /* reserved */
short vendor[32]; /* vendor specific */
short reserved160[96]; /* reserved */
} ATA_PARAM;
typedef enum /* ATAPI */
{
NON_DATA, /* non data command */
OUT_DATA,
IN_DATA
} t_data_dir;
/* Device types */
#define ATA_TYPE_NONE 0x00 /* device is faulty or not present */
#define ATA_TYPE_ATA 0x01 /* ATA device */
#define ATA_TYPE_ATAPI 0x02 /* ATAPI device */
#define ATA_TYPE_INIT 255 /* device must be identified */
/* Device states */
#define ATA_DEV_OK 0 /* device is OK */
#define ATA_DEV_NONE 1 /* device absent or does not respond */
#define ATA_DEV_DIAG_F 2 /* device diagnostic failed */
#define ATA_DEV_PREAD_F 3 /* read device parameters failed */
#define ATA_DEV_MED_CH 4 /* medium have been changed */
#define ATA_DEV_NO_BLKDEV 5 /* No block device available */
#define ATA_DEV_INIT 255 /* uninitialized device */
typedef struct ataDev
{
BLK_DEV blkDev; /* must be here */
int ctrl; /* ctrl no. 0 - 1 */
int drive; /* drive no. 0 - 1 */
int blkOffset; /* sector offset */
int nBlocks; /* number of sectors */
char * pBuf; /* Current position in an user buffer */
char * pBufEnd; /* End of user buffer */
t_data_dir direction; /* Transfer direction */
int transCount; /* Number of transfer cycles */
int errNum; /* Error description message number */
/* ATAPI Registers contents */
uint8_t intReason; /* Interrupt Reason Register */
uint8_t status; /* Status Register */
uint16_t transSize; /* Byte Count Register */
} ATA_DEV;
typedef struct ataDrive
{
ATA_PARAM param; /* geometry parameter */
short okMulti; /* MULTI: TRUE if supported */
short okIordy; /* IORDY: TRUE if supported */
short okDma; /* DMA: TRUE if supported */
short okLba; /* LBA: TRUE if supported */
short multiSecs; /* supported max sectors for multiple RW */
short pioMode; /* supported max PIO mode */
short singleDmaMode; /* supported max single word DMA mode */
short multiDmaMode; /* supported max multi word DMA mode */
short ultraDmaMode; /* supported max ultra word DMA mode */
short rwMode; /* RW mode: PIO[0,1,2,3,4] or DMA[0,1,2] */
short rwBits; /* RW bits: 16 or 32 */
short rwPio; /* RW PIO unit: single or multi sector */
short rwDma; /* RW DMA unit: single or multi word */
uint8_t state; /* device state */
uint8_t diagCode; /* diagnostic code */
uint8_t type; /* device type */
STATUS (*Reset) /* pointer to reset function */
(
int ctrl,
int dev
);
ATA_DEV *pAtaDev; /* pointer to ATA block device structure */
} ATA_DRIVE;
typedef struct ataCtrl
{
ATA_DRIVE drive[ATA_MAX_DRIVES]; /* drives per controller */
SEMAPHORE syncSem; /* binary sem for syncronization */
SEMAPHORE rdsyncSem; /* binary sem for syncronization */
SEMAPHORE muteSem; /* mutex sem for mutual-exclusion */
WDOG_ID wdgId; /* watch dog */
BOOL wdgOkay; /* watch dog status */
int semTimeout; /* timeout seconds for sync semaphore */
int wdgTimeout; /* timeout seconds for watch dog */
int ctrlType; /* type of controller */
BOOL installed; /* TRUE if a driver is installed */
BOOL changed; /* TRUE if a card is installed */
int intLevel; /* interrupt level */
int intCount; /* interrupt count */
int intStatus; /* interrupt status */
int drives; /* number of drives in the controller */
UINT32 data; /* (RW) data register (16 bits) */
UINT32 error; /* (R) error register */
UINT32 feature; /* (W) feature or write-precompensation */
UINT32 seccnt; /* (RW) sector count */
UINT32 sector; /* (RW) first sector number */
UINT32 cylLo; /* (RW) cylinder low byte */
UINT32 cylHi; /* (RW) cylinder high byte */
UINT32 sdh; /* (RW) sector size/drive/head */
UINT32 command; /* (W) command register */
UINT32 status; /* (R) immediate status */
UINT32 aStatus; /* (R) alternate status */
UINT32 dControl; /* (W) disk controller control */
UINT32 dAddress; /* (R) disk controller address */
int configType; /* or'd configuration flags */
} ATA_CTRL;
typedef struct ataType
{
int cylinders; /* number of cylinders */
int heads; /* number of heads */
int sectors; /* number of sectors per track */
int bytes; /* number of bytes per sector */
int precomp; /* precompensation cylinder */
} ATA_TYPE;
typedef struct ataRaw
{ /* this is for ATARAWACCESS ioctl */
UINT cylinder; /* cylinder (0 -> (cylindres-1)) */
UINT head; /* head (0 -> (heads-1)) */
UINT sector; /* sector (1 -> sectorsTrack) */
char *pBuf; /* pointer to buffer (bytesSector * nSecs) */
UINT nSecs; /* number of sectors (1 -> sectorsTrack) */
UINT direction; /* read=0, write=1 */
} ATA_RAW;
#define ATA_SEM_TIMEOUT_DEF 30 /* default timeout for ATA sync sem */
#define ATA_WDG_TIMEOUT_DEF 30 /* default timeout for ATA watch dog */
/* ATA registers */
#define ATA_DATA(base0) (base0 + 0x60) /* (RW) data register (16 bits) */
#define ATA_ERROR(base0) (base0 + 0x64) /* (R) error register */
#define ATA_FEATURE(base0) (base0 + 0x64) /* (W) feature/precompensation */
#define ATA_SECCNT(base0) (base0 + 0x68) /* (RW) sector count */
#define ATA_SECTOR(base0) (base0 + 0x6C) /* (RW) first sector number */
#define ATA_CYL_LO(base0) (base0 + 0x70) /* (RW) cylinder low byte */
#define ATA_CYL_HI(base0) (base0 + 0x74) /* (RW) cylinder high byte */
#define ATA_SDH(base0) (base0 + 0x78) /* (RW) sector size/drive/head */
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