em78p458controlht1621.asm

EM78P458控制HT1621源代码以测试通过

;EM78P458 CONTROL HT1621
;2分频 4MHz晶振　测试成功跟大家分享

;=====ht1621 command=====

system_enable equ 01h

lcd_on equ 03h

rc_256k equ 18h

bias3 equ 29h

normal_mode equ 0e3h

;=========================

data == 2

clk == 1

cs0 == 0

port5 equ 05h

port6 equ 06h

delay_time equ 10h

xun equ 11h

send_data equ 12h

send_address equ 13h

send_buffer equ 14h

xun2 equ 15h

;==================

org 00h

jmp init

org 010h

init:

clra

iow 0eh

iow port6

mov a,@0ffh

iow port5

main:

nop

nop

nop

call setup_1621

nop

nop

call mydelay

call mydelay

call write_ram2

call mydelay

call mydelay

nop

nop

nop

nop

call write_ram

nop

nop

jmp main

;=====lcd ram清零======

write_ram2:

mov a,@128

mov xun2,a

clr send_data

mov a,@6

mov xun,a

bc port6,cs0;enable 1621

nop

nop

nop

bs port6,data;1

call clk_1621

bc port6,data;0

call clk_1621

bs port6,data;1

call clk_1621

call send_byte;address 00

bc port6,data;0

call clk_1621

djz xun2

jmp $-3

bs port6,cs0;保存状态 

ret

;=====全写lcd ram======

write_ram:

mov a,@128

mov xun2,a

clr send_data

mov a,@6

mov xun,a

bc port6,cs0;enable 1621

nop

nop

nop

bs port6,data;1

call clk_1621

bc port6,data;0

call clk_1621

bs port6,data;1

call clk_1621

call send_byte;address 00

bs port6,data;0

call clk_1621

djz xun2

jmp $-3

;============

bs port6,cs0;保存状态 

ret

;=====1621 setup=====

setup_1621:

mov a,@0e3h;normal_mode

call command_mode

mov a,@01h;bias3

call command_mode

mov a,@18h;rc_256k

call command_mode

mov a,@29h;system_enable

call command_mode

mov a,@03h;lcd_on

call command_mode

ret

;====command_mode====

command_mode:

mov send_data,a

mov a,@9

mov xun,a

bc port6,cs0;enable 1621

nop

nop

nop

bs port6,data;1

call clk_1621

bc port6,data;0

call clk_1621

bc port6,data;0

call clk_1621

call send_byte;command

bs port6,cs0;保存状态 

ret

send_byte:

jbs send_data,7

bc port6,data

jbc send_data,7

bs port6,data

call clk_1621

rlc send_data

djz xun

jmp send_byte

ret

;========1621 clk======

clk_1621:

bc port6,clk

nop

nop

bs port6,clk

nop

ret

;=============delay===

mydelay:

mov a,@0ffh

mov 2ah,a

mov a,@0ffh

mov 2bh,a

djz 2bh

jmp $-1

djz 2ah

jmp $-5

ret