cpux_03.c

Extended Memory Access Using IAR v3.42A and CCE v2

//******************************************************************************
//  MSP430xG461x Demo - DMA0, Single Blk to RAM Memory location, Software ptr, 
//                      Rpt'd Blk from RAM to DAC0, Sine Out, TimerA0, DCO
//
// This program shows how a look-up table placed in the extended memory is 
// moveded as a block to the RAM using DMA and then moved word by word from RAM
// to DAC via a 16-bit address variable.
//
// Description: A 32 word Sine look-up table is stored in the extended memory 
// location 0x10000 onwards by interfacing C with assembly code. A 32-bit 
// address variable is used to access the data from the extended memory and 
// transfer the contents of the Sine look-up table word-by-word as a repeating 
// block to DAC12_0. And DAC12_0 outputs on P6.6 a 1-kHz Sine wave.  
// Timer A operates in compare mode, where, TACCR0 sets Clk period and TACCR1 
// sets PWM duty cycle. To get a 1-kHz Sine wave out, timer period is set to 
// almost 32us (as 32us*32 words ~ 1ms) , with TimerA clock  running at 1MHz. 
// And during the TimerA0 ISR the data present at the address pointed by 
// register R4, is loaded to the DAC12_0 data reg and the contents of R4 are 
// incremented to point the next address. DAC12_0 uses internal 1.5V reference.
// ACLK = 32kHz, MCLK = SMCLK = default DCO 8MHz, TACLK = SMCLK/8 = 1MHZ
//
//                MSP430xG461x
//             -----------------
//         /|\|              XIN|-
//          | |                 | 32kHz
//          --|RST          XOUT|-
//            |                 |
//            |        DAC0/P6.6|--> ~ 1-kHz sine wave output
//
//   Note 1: The linker command file (*.cmd) for this project has to be modified   
//          to create a new memory segment (Chigh - in this example). The linker 
//          command ".Chigh : {} > FLASH2" is added to the sections directive 
//			in the linker command file to create a new memory section in the
//			extended memory (10000 - 1FFFF), to store constant data in ext flash
//   Note 2: This code example mixes C with Assembler, hence, the project must 
//          include the assembly files "ASM_func.asm" and "Ext_Intrinsics.asm"
//
//   Bhargavi Nisarga
//   Texas Instruments Inc.
//   June 2007
//   Built with CCE Embedded Workbench Version: 3.42A
//******************************************************************************

#include <msp430xG46x.h>
#include <intrinsics.h>

// Function prototype for ASM functions                  
extern unsigned long __Get_Address20(void); 
extern void __data16_write_addr(unsigned short __addr, unsigned long __value);

/* The variable "Buffer" allocates 32 words in RAM; the 32 word sine wave table
 is transferred from the extended flash to this location*/
unsigned int Buffer[32];  
unsigned int *Pointer;                       // 16-bit Pointer 
unsigned short Count, Size;

void main(void)
{
  volatile unsigned int i;  
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer

  //Set DCO freq = 8MHz
  FLL_CTL0 |= DCOPLUS + XCAP18PF;           // DCO+ set, freq = xtal x D x N+1
  SCFI0 |= FN_4;                            // x2 DCO freq, 8MHz nominal DCO
  SCFQCTL = 121;   
    
  ADC12CTL0 = REFON;                        // Internal 1.5V reference
  for (i = 0x3600; i; i--);                 // Delay for needed ref start-up.
                                            // See datasheet for details.

  // Configure DMA0  - block transfer on software request
  DMACTL0 = DMA0TSEL_0;                     // DMA_REQ (sw)
  __data16_write_addr ((unsigned short)&DMA0SAL, __Get_Address20());
                                            // Source address = Extended Flash
  DMA0DAL = (unsigned int)&Buffer;          // Destination addr = RAM location
  DMA0SZ = 0x20;                            // Size in words
  DMA0CTL = DMADT_1 + DMADSTINCR_3 + DMASRCINCR_3 + DMAREQ + DMAEN; 
                                            // Blk transfer, src & dest incr, 
                                            // DMA_REQ(sw), enable DMA
  
  // Initialize Pointer to point to the starting address of data table in RAM 
  Pointer = (unsigned int *)&Buffer;           
  Size = 0x0020;                            // Size in words
  Count = 0;
  
  // Configure  DAC12_0
  DAC12_0CTL = DAC12IR + DAC12AMP_5 + DAC12ENC;
                                            // amp and i/p range setting, 
                                            // DAC enable     
  
  // Configure Timer A
  TACCTL1 = OUTMOD_3;                       // TACCR1 set/reset
  TACCR1 = 1;                               // TACCR1 PWM Duty Cycle  
  TACCR0 = 30;                              // Clock period of TACCR0
  TACCTL0 = CCIE;                           // Interrupt enable
  TACTL = TASSEL_2 + MC_1 + TACLR + ID_3;   // SMCLK, upmode, (i/p clk/8)                                       
 
  __bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, enable interrupts
}

// Timer A0 interrupt service routine
__interrupt void Timer_A (void);
TIMERA0_ISR(Timer_A)
__interrupt void Timer_A (void)
{
    /* Data located at the address pointed by the Pointer is loaded to DAC data
    register and is word incremented to point the next word in RAM memory */
    DAC12_0DAT = *Pointer++;                 
    if (++Count >= Size)                    // Chk if Count within memory range
    {
      // Repeat Blk transfer from RAM to DAC12_0
      Pointer = (unsigned int *)&Buffer;      
      Count = 0;
    }
}