cpux_01.c

Extended Memory Access Using IAR v3.42A and CCE v2

//******************************************************************************
//  MSP430xG461x Demo - DMA0, Rpt'd Blk to DAC0, Sine Output, TACCR1, DCO
//
// This program demonstates how a data table is placed in extended memory and 
// accessed via DMA to move the data to DAC12 word by word. 
//
// Description: A 32 word Sine look-up table is stored in the extended memory 
// location 0x10000 onwards by interfacing C with assembly code. DMA0 is used to
// transfer the contents of the Sine look-up table word-by-word as a single block
// to a RAM location. A 16-bit software pointer is used to access the data from 
// the RAM memory location and transfer the contents of the Sine look-up table 
// word-by-word as a repeating block to DAC0. Timer_A operates in compare mode
// where, TACCR0 sets the Clk period and TACCR1 sets the PWM duty cycle. Rising 
// edge of Timer_AOUT1 triggers the DAC12_0 latch. Once DAC12 data is latched 
// from the DAC12_0DAT register to the data latch, the DAC12IFG bit is set and 
// during the DAC12 ISR, the data at the address pointed by the 16-bit pointer 
// is loaded to the DAC12_0DAT register and the pointer is incremented to point  
// the next address in RAM memory. DAC12_0 uses internal 1.5V reference.
// ACLK = 32kHz, MCLK = SMCLK = TACLK = default DCO 1048576Hz
//
//                MSP430xG461x
//             -----------------
//         /|\|              XIN|-
//          | |                 | 32kHz
//          --|RST          XOUT|-
//            |                 |
//            |        DAC0/P6.6|--> ~ 1-kHz sine wave output
//
//   Note 1: The linker command file (*.cmd) for this project has to be modified   
//          to create a new memory segment (Chigh - in this example). The linker  
//          step command ".Chigh : {} > FLASH2" is added to the sections directive 
//			in the linker command file to create a new memory section in the
//			extended memory (10000 - 1FFFF), to store constant data in ext flash
//   Note 2: This code example mixes C with Assembler, hence, the project must 
//          include the assembly files "ASM_func.asm" and "Ext_Intrinsics.asm"
//
//   Bhargavi Nisarga
//   Texas Instruments Inc.
//   June 2007
//   Built with CCE Embedded Workbench Version: 3.42A
//******************************************************************************

#include <msp430xG46x.h>
#include <intrinsics.h>

// Function prototype for ASM functions
extern unsigned long __Get_Address20(void); 
extern void __data16_write_addr(unsigned short __addr, unsigned long __value);

unsigned long dma_src_address = 0x00;		// 32-bit var to store a 20-bit value
void main(void)
{
  volatile unsigned int i;
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer
  ADC12CTL0 = REFON;                        // Internal reference
  for (i = 0x3600; i; i--);                 // Delay for needed ref start-up.
                                            // See datasheet for details.

  // Configure DMA0
  __data16_write_addr((unsigned short)&DMA0SAL, __Get_Address20()); 
                                            // Source address = Extended Flash
  DMA0DAL = (unsigned short)&DAC12_0DAT;    // Destination single address
  DMA0SZ = 0x020;                           // Block size
  DMACTL0 = DMA0TSEL_5;                     // DAC12IFG trigger
  DMA0CTL = DMADT_4 + DMASRCINCR_3 + DMAEN; // Rpt, incr src, DMA0 enable
  
  /* Configure DAC12_0
  DAC12IFG triggers the DMA for the first time without any data being latched
  to the DAC12_0 and so it should be initialized AFTER the DMA enable with 
  DAC12IFG set */
  DAC12_0CTL = DAC12LSEL_2 + DAC12IR + DAC12AMP_5 + DAC12IFG + DAC12ENC;
                                            // DAC12 load select - TA1, amp and 
                                            // input range setting, DAC enable  
  
  // Configure Timer A
  TACCTL1 = OUTMOD_3;                       // TACCR1 set/reset
  TACCR1 = 1;                               // TACCR1 PWM Duty Cycle
  TACCR0 = 32-1;                            // Clock period of TACCR0
  TACTL = TASSEL_2 + MC_1 + TACLR;          // SMCLK, upmode
  
  __bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, enable interrupts
}