cpux_06.c

Extended Memory Access Using IAR v3.42A and CCE v2

//******************************************************************************
//   MSP430xG461x Demo - ADC12, software addr variable, Repeatedly Sample A0 until 
//                       Extended Flash memory range is completely filled, 
//                       TB1 as sample trigger 
//
// This program demonstrates how ADC12 conversion results are written directly
// to the extended flash via the 32-bit address variable. 
//
// Description: ADC12, Channel A0 is sampled at the rate of ~8000 samples/sec 
// (most suitable for voice recording). Timer B is used in up mode, TBCCR1 sets 
// the PWM duty cycle. Rising edge of Timer_B.OUT1 triggers the sample and hold 
// process in ADC12. The conversion result is loaded in ADCMEM0 and sets the 
// ADC12IFG flag and during the ADC12 ISR, the conversion result in ADC12MEM0 is
// written to extended flash memory with the help of a 32-bit address variable 
// used as a pointer and is incremented to point to next address location in 
// flash. This is repeated until the extended memory is completely filled. With
// DMA0SZ = 0, DMAIFG is set and CPU exits LPM0 mode, disables all MSP430 modules
// and goes to LPM4. 
//	Before writing into the extended flash, all the extended memory contents
// are erased. LED2 is on during extended flash erase. LED4 is turned on when
// ADC12 conversion begins and is turned off when extended flash range is
// completely filled indicating recording is over.
// ACLK = 32kHz, MCLK = SMCLK = default DCO 1048576Hz, ADC12CLK = ADC12OSC
//
//                MSP430xG461x
//             -----------------
//         /|\|              XIN|-
//          | |                 | 32kHz
//          --|RST          XOUT|-
//            |                 |
//            |             P2.1|--> LED2 
//     Vin -->|P6.0/A0      P5.1|--> LED4
//
//   Bhargavi Nisarga
//   Texas Instruments Inc.
//   June 2007
//   Built with IAR Embedded Workbench Version: 3.42A
//******************************************************************************

#include "msp430xG46x.h"
#include "intrinsics.h"

#define MEMSTART_HIGH   0x10000             // Ext memory range(device specific)
#define MEMEND_HIGH     0x1FFFF

void Record(void);
void Erase_Flash(void);
unsigned long Addr32;                      // 32-bit address variable
unsigned int Count, Size;

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer
  P2DIR |= BIT1;                            // Set P2.1 to o/p direction [LED2]
  P2OUT = 0x00;
  P5DIR |= BIT1;                            // Set P5.1 to o/p direction [LED4]
  P5OUT = 0x00;
  Record();
  __bis_SR_register(LPM4_bits + GIE);       // Enable interrupts, enter LPM4    
}

void Record(void)
{
  volatile unsigned int i;
  // Configure ADC12 module  
  ADC12MCTL0 = SREF_1 + INCH_0;             // Channel A0 [OA0-out], Vref+
  ADC12IFG = 0;
  ADC12IE = 0x0001;                         // Enable ADC12 intrpt for ADC12MEM0 
  ADC12CTL1 = SHS_3 + CONSEQ_2;             // S&H TB.OUT1, rep. single channel
  ADC12CTL0 = REF2_5V + REFON + ADC12ON;    // VRef ADC12 on, enabled

  for (i = 0x3600; i; i--);                 // Delay for needed ref start-up.
                                            // See datasheet for details.
  ADC12CTL0 |= ENC;                         // Enable conversions

  // Configure Timer B to sample ADC12 channel A0~8500 Sa/sec (SMCLK prd * 110)
  TBCCR0 = 110;                             // Init TBCCR0 w/ sample prd 
  TBCCR1 = 80;                              // Trigger for ADC12 SC
  TBCCTL1 = OUTMOD_7;                       // Reset OUT1 on EQU1, set on EQU0  

  // Initilaize address variable
  Addr32 = MEMSTART_HIGH;
  Count = 0;
  Size = (MEMEND_HIGH - MEMSTART_HIGH) >> 1;// Size in words
  
  // Configue Flash memory
  FCTL2 = FWKEY + FSSEL1 + FN1;             // Fftg = SMCLK/(FNx + 1)  
  FCTL3 = FWKEY;                            // Unlock Flash memory for write
  Erase_Flash();                            // Call Flash erase function
  FCTL1 = FWKEY + WRT;                      // Enable Flash write for recording  
  
  P5OUT |= BIT1;                            // Set P5.1 (LED4 on)
  TBCTL = TBSSEL_2 + MC_1 + TBCLR;          // SMCLK, clear TBR, up mode 
  
  // Activate LPM during DMA recording, wake-up when finished
  __bis_SR_register(LPM0_bits + GIE);       // Enable interrupts, enter LPM0
  __disable_interrupt();                    // Disable interrupts
  
  // Deactivate Flash memory write access
  FCTL1 = FWKEY;                            // Disable Flash write
  FCTL3 = FWKEY + LOCK;                     // Lock Flash memory
  
  // Power-down MSP430 modules
  ADC12CTL1 &= ~CONSEQ_2;                   // Stop conversion 
  ADC12CTL0 &= ~ENC;                        // disable ADC12 conversion
  ADC12CTL0 = 0;                            // Switch off ADC12 & ref voltage
  TBCTL = 0;                                // Disable Timer_B
  P5OUT &= ~BIT1;                           // LED4 off
}

void Erase_Flash(void)
{
  unsigned long pointer_high = MEMSTART_HIGH;
  P2OUT |= BIT1;                            // LED2 on when Flash is erased.
  while(pointer_high < MEMEND_HIGH)         // Chk if ptr is within memory range
  {
    FCTL1 = FWKEY + ERASE;
    __data20_write_char(pointer_high, 0x00);// Intrinsic to write to extnd memory
                                            // segment erase
    pointer_high += 0x0200;                 // Point to next segment
  }
  P2OUT ^= BIT1;                            // LED2 off when Flash Erase over
}

// ADC12 interrupt service routine
#pragma vector=ADC12_VECTOR
__interrupt void ADC_12(void)
{
  if (ADC12IV == 0x06)
  {
    ADC12IE = 0x0;                          // Disable ADC12 interrupt
    __data20_write_short(Addr32, (unsigned short)ADC12MEM0); 
                                            // Write conversion result in 
                                            // ADC12MEM0 to extended flash
    Addr32 += 0x02;                         // incr ptr to point to next address
    if (++Count >= Size)                    // Check if Count within range of Size
    {
      Count = 0;
      __bic_SR_register_on_exit(LPM0_bits); // Repeat until ext memory range is 
                                            // completely filled
    } 
    ADC12IE = 0x0001;                       // Enable ADC12 interrupt
  }
}