testrom.vhd

来自「EDA实验--ROM实验:利用-MegaWizard Plug-In Manag」· VHDL 代码 · 共 164 行

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;

entity TESTROM is
    port (EN: in STD_LOGIC;
        CLK: in STD_LOGIC;
	    	hs : out std_logic;
        vs : out std_logic;
    	R : out std_logic_vector(2 downto 0);
        G : out std_logic_vector(2 downto 0);
        B : out std_logic_vector(1 downto 0));
        --ADDR: in STD_LOGIC_VECTOR (8 downto 0);
        --DOUT1: out STD_LOGIC_VECTOR (15 downto 0);
       -- DOUT2: out STD_LOGIC_VECTOR (15 downto 0));
end TESTROM;

architecture TESTROM_arch of TESTROM is

component rom256x16
port (address		: IN STD_LOGIC_VECTOR (7 DOWNTO 0);
		clken		: IN STD_LOGIC ;
		clock		: IN STD_LOGIC ;
		q		: OUT STD_LOGIC_VECTOR (15 DOWNTO 0));
end component;

component vga_16 is
    Port ( clk : in std_logic;
           hs : out std_logic;
           vs : out std_logic;
           r : out std_logic;
           g : out std_logic;
           b : out std_logic;
	       innum  : in std_logic_vector(15 downto 0);
		   innum0 : in std_logic_vector(15 downto 0); 
           innum1 : in std_logic_vector(6 downto 0);
           innum2 : in std_logic_vector(6 downto 0);
           innum3 : in std_logic_vector(6 downto 0);
		   innum4 : in std_logic_vector(6 downto 0));
end component;

signal en1,en2: std_logic;
signal count: std_logic_vector(31 downto 0);
signal ADDR:  STD_LOGIC_VECTOR (8 downto 0);
signal DO1,DO2: std_logic_vector(15 downto 0);
signal vga_r,vga_g,vga_b: std_logic;
signal innum  : std_logic_vector(15 downto 0);
signal innum0 : std_logic_vector(15 downto 0); 
signal innum1 : std_logic_vector(6 downto 0);
signal innum2 : std_logic_vector(6 downto 0);
signal innum3 : std_logic_vector(6 downto 0);
signal innum4 : std_logic_vector(6 downto 0);

begin

	process(CLK)
	begin
		if (clk'event and clk='1') then 
			count<=count+1;
		end if;
	end process;
	
	addr<=count(31 downto 23);

	U1: rom256x16
			port map (
				address => addr(7 downto 0),
				clken => en,
				clock => clk,
				q => do1);
	--dout1<=not do1;

	U2: rom256x16
			port map (
				address => addr(7 downto 0),
				clken => en,
				clock => clk,
				q => do2);
	--dout2<=do2;

	U3: vga_16 port map(CLK,hs,vs,vga_r,vga_g,vga_b,do1,do2,innum1,innum2,innum3,innum4);
	   
	r(0) <= vga_r;
	r(1) <= vga_r;
	r(2) <= vga_r;
	
	g(0) <= vga_g;
	g(1) <= vga_g;
	g(2) <= vga_g;
	
	b(0) <= vga_b;
	b(1) <= vga_b;
	
	    with do1(3 downto 0) SELect
	   innum1<= "1111001" when "0001",   --1
	         "0100100" when "0010",   --2
	         "0110000" when "0011",   --3
	         "0011001" when "0100",   --4
	         "0010010" when "0101",   --5
	         "0000010" when "0110",   --6
	         "1111000" when "0111",   --7
	         "0000000" when "1000",   --8
	         "0010000" when "1001",   --9
	         "0001000" when "1010",   --A
	         "0000011" when "1011",   --b
	         "1000110" when "1100",   --C
	         "0100001" when "1101",   --d
	         "0000110" when "1110",   --E
	         "0001110" when "1111",   --F
	         "1000000" when others;   --0
		with do1(7 downto 4) SELect
	   innum2<= "1111001" when "0001",   --1
	         "0100100" when "0010",   --2
	         "0110000" when "0011",   --3
	         "0011001" when "0100",   --4
	         "0010010" when "0101",   --5
	         "0000010" when "0110",   --6
	         "1111000" when "0111",   --7
	         "0000000" when "1000",   --8
	         "0010000" when "1001",   --9
	         "0001000" when "1010",   --A
	         "0000011" when "1011",   --b
	         "1000110" when "1100",   --C
	         "0100001" when "1101",   --d
	         "0000110" when "1110",   --E
	         "0001110" when "1111",   --F
	         "1000000" when others;   --0
		with do1(11 downto 8) SELect
	   innum3<= "1111001" when "0001",   --1
	         "0100100" when "0010",   --2
	         "0110000" when "0011",   --3
	         "0011001" when "0100",   --4
	         "0010010" when "0101",   --5
	         "0000010" when "0110",   --6
	         "1111000" when "0111",   --7
	         "0000000" when "1000",   --8
	         "0010000" when "1001",   --9
	         "0001000" when "1010",   --A
	         "0000011" when "1011",   --b
	         "1000110" when "1100",   --C
	         "0100001" when "1101",   --d
	         "0000110" when "1110",   --E
	         "0001110" when "1111",   --F
	         "1000000" when others;   --0
		with do1(15 downto 12) SELect
	   innum4<= "1111001" when "0001",   --1
	         "0100100" when "0010",   --2
	         "0110000" when "0011",   --3
	         "0011001" when "0100",   --4
	         "0010010" when "0101",   --5
	         "0000010" when "0110",   --6
	         "1111000" when "0111",   --7
	         "0000000" when "1000",   --8
	         "0010000" when "1001",   --9
	         "0001000" when "1010",   --A
	         "0000011" when "1011",   --b
	         "1000110" when "1100",   --C
	         "0100001" when "1101",   --d
	         "0000110" when "1110",   --E
	         "0001110" when "1111",   --F
	         "1000000" when others;   --0
    
end TESTROM_arch;