lowlevellock.h

来自「glibc2.5版源代码」· C头文件 代码 · 共 5 行

H
5
字号
/*  4 instruction cycles not accessing cache and TLB are needed after    trapa instruction to avoid an SH-4 silicon bug.  */#define NEED_SYSCALL_INST_PAD#include_next <lowlevellock.h>

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?