candrv.h

HMS30C7202下的CAN驱动

/** candrv.h
 * This file include general can definitions for the CAN-driver
 *
 * Header file for the Linux CAN-bus driver.
 * Written by Sebastian Stolzenberg email:[e-mail]
 * Version 1.0  04 Feb 2003
 */

#include <linux/types.h>
#include <linux/version.h>
#include <linux/wait.h>
#include <linux/pci.h>
#include <linux/poll.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
#include <linux/sched.h>
#include <asm/io.h>
#include "can.h"

#ifndef ___CAN_DRIVER___
# define ___CAN_DRIVER___

/* Define makro for driver debug-messages */
# ifdef CAN_DEBUG
#  define DEBUGMSG(fmt,args...) printk(KERN_NOTICE "candrv (debug): " fmt "\n",##args)
# else
#  define DEBUGMSG(fmt,args...)
# endif

/* Define makro for driver messages  */
# define CANMSG(fmt,args...) printk(KERN_NOTICE "candrv: " fmt "\n",##args)

# ifndef PACKED
#  define PACKED __attribute__((packed))
# endif

# ifndef SLOW_DOWN_IO
#  define SLOW_DOWN_IO __SLOW_DOWN_IO
# endif

/* Device name as it will appear in /proc/devices */
# define DEVICE_NAME "can"


/* Default driver major number, see /usr/src/linux/Documentation/devices.txt */
# define CAN_MAJOR 91

/* Timeout in jiffies before the system calls return with an error */
# define CANTIMEOUT (4*HZ)

/**
    Definition of the maximum number of concurrent supported hardware boards,
    chips per board, total number of chips message objects.
    Each chip can have its own i/o range and/or irq or share it with others.
*/
# define MAX_HW_CHIPS     2                             /* Max chips/card */
# define MAX_HW_MSGOBJ    32                            /* Max message objects/chip */
# define MAX_TOT_MSGOBJ   (MAX_HW_CHIPS*MAX_HW_MSGOBJ)  /* Max total message objects */
# define MAX_BUF_LENGTH   128                           /* Size of buffer/message object */

enum timing_BTR1
{
        MAX_TSEG1 = 15,
        MAX_TSEG2 = 7
};

/* Flags for baud_rate function */
# define BTR1_SAM (1<<1)

/**
   Definitions for valid/supported card types
*/
# define DEVICETYPE_UNDEFIND         0
# define DEVICETYPE_HMS30C7202_CAN   1

/**
   Definitions for valid/supported chip types
*/
# define CAN_CHIPTYPE_UNDEFINED  0  /* Not defined */
# define CAN_CHIPTYPE_C_CAN      1  /* C-CAN */


/* Flags of fifo structure */
enum CANFIFO_FLAGS
{
        TX_IN_PROGRESS = 1,    /* transmit in progress */
        RX_IN_PROGRESS = 1<<1, /* receive in progress -> not used */
        WR_BUFF_OVRWRT = 1<<6, /* write buffer overwrite */
        RD_BUFF_OVRWRT = 1<<7  /* read buffer overwrite -> not used */
};
/**
 * Structure for the drivers main input and output buffers. The readq, writeq
 * entries are the wait queues for the driver to sleep on in case of blocking
 * read/write calls. buf_rx_entry and buf_tx_entry are pointers to the input
 * and output buffers. The buffers are dynamically allocated.
 *
 * The tx_readp, tx_writep, rx_readp and rx_writep pointers are the various
 * read/write pointers used when reading or writing the input and output
 * buffers. The rx/tx_size entries are the dynamically allocated input and
 * output buffer size.
 *
 * The flags are used to determine whether the device is already set up
 * for transmission or reception. They also show if the buffers should be
 * overwritable or not.
 */
struct canfifo_t
{
        struct __wait_queue_head readq; /* Read wait queue */
        struct __wait_queue_head writeq;/* Write wait queue */
        char *ptxbuf;                   /* Transmitt Buffer */
        char *prxbuf;                   /* Receive Buffer */
        char *txrp;                     /* Transmitt read pointer */
        char *txwp;                     /* Transmitt write pointer */
        char *rxrp;                     /* Receive read pointer */
        char *rxwp;                     /* Receive write pointer */
        u16 rxsize;                     /* Receive buffer size, TX Size */
        u16 txsize;                     /* Transmitt buffer size */
        u16 head, tail;                 /* TEMP!!! */
        volatile char flags;             /* flags of fifo structure */
};


/**
 * Structure for the RTR queue
 */
struct rtr_id
{
        u32 id;
        struct canmsg_t *rtr_message;
        struct __wait_queue_head rtr_wq;
        struct rtr_id *next;
};

/**
 * Structure that holds information about all chips
 * that this driver is responsable for.
 */
struct canhardware_t
{
        u8 cnt_tot_chips;
        struct chip_t *pchip[ 1 ];
};

/* Definitions to use for channel flags */
# define CHANNEL_OPENED     ( 1<<0 )  /* Channel is open */
# define CHANNEL_CONFIGURED ( 1<<1 )  /* Channel is configured */
# define CHANNEL_RECEIVE    ( 1<<2 )  /* Channel is configured for message reception */

/**
   Structure that holds information about a specific message object
 */
struct msgobj_t
{
        u16 object;              /* number of message object */
        u16 minor;               /* driver minor code to access object */
        u32 flags;               /* Flags for channel status (open, configured etc ) */
        u8 msg_mode;             /* msg_mode = 0 for standard */
                                 /* msg_mode = 1 for extended */

        int rv;                  /* return value */

        struct canfifo_t *fifo;  /* the fifocontainer for the message object */
        struct chip_t *hostchip; /* the chip structure the message object belongs to */
};

/**
 * Structure that holds information about a specific chip
 */
struct chip_t
{
        u8  chip_nr;                       /* Number of Chip */
        u8  ntype;                         /* Type of chip */
        u16 irq;                           /* IRQ to use for this chip */
        u32 base_addr;                     /* the base address for the chip */

        u32 vbase_addr;                    /* the virtual base address for the chip */

        u16 baudrate;                      /* the baudrate the chip is working with */
        u32 clock;                         /* Chip clock in Hz */

        u16 chip_status;                   /* Last read chip status */
        u16 last_chip_status;              /* Chip status read before the one above*/
        struct canstatistics_t stat;       /* Statistics for chip/tx/rx */

        u8 time_triggered;                 /* chip running in time triggered mode */
        u64 time_trig_nanosec;             /* cycle time for time triggered mode */
        struct timer_list interrupt_timer; /* timer_list used by time triggered mode */
        u16 intreg_backup;                 /* used to store interrupt settings */

        //struct semaphore sem;            /* mutual exclusion semaphore */
        spinlock_t spwlock;                /* Spin lock for write operations */
        spinlock_t sprlock;                /* Spin lock for read operations */
        spinlock_t if1lock;                /* spin lock for the if1 register */
        spinlock_t if2lock;                /* spin lcok for the if2 register */

        struct rtr_id *prtr_queue;         /*RTR queue */
        spinlock_t rtr_lock;               /* rtr lock */


        u32 flags;                         /* Flags for channel status (open, configured etc ) */

        u8 init_msg_mode;                  /* init_msg_mode = 0 for standard */
                                           /* init_msg_mode = 1 for extended */
                                           /*    can be induvidually set with ioctl */
                                           /*    calls */
       /**
        * Hardware operations associated with hardware
        */
        int ( *request_io )(  struct chip_t *pchip  );

        int ( *release_io )(  struct chip_t *pchip  );

        int ( *reset )(  struct chip_t *pchip  );

        void ( *write_register )( u16 data, struct chip_t *pchip, int reg );

        u16 ( *read_register )( struct chip_t *pchip, int reg );

        void ( *register_dump ) ( struct chip_t *pchip);

        int ( *chip_config )( struct chip_t *pchip );

        int ( *set_baud_rate )( struct chip_t *pchip,
                                u32 rate,
                                u32 clock,
                                u32 sjw,
                                u32 sampl_pt,
                                u32 flags );

        int ( *clear_objects )( struct chip_t *pchip );

        int ( *config_irqs )( struct chip_t *pchip,
                              u16 irqs );

        int ( *check_tx_stat )( struct chip_t *pchip );

        int ( *enable_configuration )( struct chip_t *pchip );

        int ( *disable_configuration )( struct chip_t *pchip );

        int ( *set_btregs )( struct chip_t *pchip,
                             unsigned short btr0,
                             unsigned short btr1 );

        int ( *start_chip )( struct chip_t *pchip );

        int ( *stop_chip )( struct chip_t *pchip );

        void ( *irq_handler )( int irq,
                               void *dev_id,
                               struct pt_regs *regs );

       /**
        * Message Object operations
        */
        int ( *set_mask )( struct msgobj_t *pmsgobj, u32 mask, u16 usedirbit );

        int ( *set_use_mask )( struct msgobj_t *pmsgobj, u16 useflag );

        int ( *pre_read_config )( struct msgobj_t *pmsgobj, u32 id );

        int ( *send_msg )( struct msgobj_t *pmsgobj,
                           struct canmsg_t *pmsg );

        int ( *remote_request )( struct msgobj_t *pmsgobj );

        int rv; /* return value */

        volatile int obj_cnt;                        /* number of message objects */
        volatile int active_obj_cnt;                 /* count of active objects */
        struct msgobj_t *pmsgobj[MAX_HW_MSGOBJ];     /* message objects */
};

/**
 * Definition of structure for a linked list of memory addresses
 */
struct mem_addr
{
        void *address;          /* pointer to allocated memory */
        struct mem_addr *next;  /* pointer to next memory list element */
};

/* Prototypes defined in candrv.c */
int add_mem_to_list( void *paddress );

int del_mem_from_list( void *paddress );

int del_mem_list( void );

int parse_args( struct canhardware_t *phw );

int list_hw( struct canhardware_t *phw );

int can_open( struct inode *inode, struct file *file );

int can_close( struct inode *inode, struct file *file );

inline ssize_t can_std_read( struct file *file,
                             struct msgobj_t *pmsgobj,
                             char *buffer,
                             size_t length );

inline ssize_t can_rtr_read( struct msgobj_t *pmsgobj,
                             char *buffer );

ssize_t can_read( struct file *file,
                  char *buffer,
                  size_t length,
                  loff_t *offset );

ssize_t can_write( struct file *file,
                   const char *buffer,
                   size_t length,
                   loff_t *offset );

unsigned int can_poll( struct file *filp,
                       poll_table *wait );

ssize_t sim_write( struct file *file,
                   const char *buffer,
                   size_t length,

                   loff_t *offset );

int can_ioctl( struct inode *inode,
               struct file *file,
               unsigned int cmd,
               unsigned long arg );

extern int major;
extern int minor[MAX_TOT_MSGOBJ];
extern int extended[ MAX_HW_CHIPS];
extern int baudrate[ MAX_HW_CHIPS];
extern char *hw[ MAX_HW_CHIPS ];
extern int irq[ MAX_HW_CHIPS ];
extern unsigned long io[ MAX_HW_CHIPS ];

extern struct canhardware_t *pghw;
extern struct mem_addr *pgmem_head;

#endif