prev_cmp_nand_interface.qmsg

利用MAX II CPLD 实现 NAND 闪存接口

{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "140 " "Info: Allocated 140 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Nov 15 16:36:58 2007 " "Info: Processing ended: Thu Nov 15 16:36:58 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 15 16:36:59 2007 " "Info: Processing started: Thu Nov 15 16:36:59 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off nand_interface -c nand_interface " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off nand_interface -c nand_interface" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "nand_interface EPM240GT100C3 " "Info: Selected device EPM240GT100C3 for design \"nand_interface\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WCUT_CUT_DEFAULT_OPERATING_CONDITION" "high junction temperature 85 " "Warning: The high junction temperature operating condition is not set. Assuming a default value of '85'." {  } {  } 0 0 "The %1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "" 0}
{ "Warning" "WCUT_CUT_DEFAULT_OPERATING_CONDITION" "low junction temperature 0 " "Warning: The low junction temperature operating condition is not set. Assuming a default value of '0'." {  } {  } 0 0 "The %1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "" 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570GT100C3 " "Info: Device EPM570GT100C3 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0}
{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "13 13 " "Warning: No exact pin location assignment(s) for 13 pins of 13 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "ce " "Info: Pin ce not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { ce } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 23 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { ce } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { ce } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "re " "Info: Pin re not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { re } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 23 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { re } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { re } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "ale " "Info: Pin ale not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { ale } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 23 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { ale } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { ale } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "cle " "Info: Pin cle not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { cle } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 24 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { cle } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { cle } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "se " "Info: Pin se not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { se } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 24 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { se } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { se } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "we " "Info: Pin we not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { we } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 24 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { we } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { we } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wp " "Info: Pin wp not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { wp } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 24 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { wp } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { wp } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "h_cntrl\[0\] " "Info: Pin h_cntrl\[0\] not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { h_cntrl[0] } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 21 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_cntrl[0] } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_cntrl[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "h_rd_wr " "Info: Pin h_rd_wr not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { h_rd_wr } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 20 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_rd_wr } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_rd_wr } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "h_cntrl\[2\] " "Info: Pin h_cntrl\[2\] not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { h_cntrl[2] } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 21 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_cntrl[2] } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_cntrl[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "h_cntrl\[1\] " "Info: Pin h_cntrl\[1\] not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { h_cntrl[1] } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 21 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_cntrl[1] } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { h_cntrl[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "e_d " "Info: Pin e_d not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { e_d } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 20 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { e_d } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { e_d } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "reset " "Info: Pin reset not assigned to an exact location on the device" {  } { { "c:/altera/72_cc/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72_cc/quartus/bin/pin_planner.ppl" { reset } } } { "nand_interface.v" "" { Text "D:/Altera/MAXIIZ update/Design example/AN500/quartus/nand_interface.v" 20 -1 0 } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { reset } "NODE_NAME" } } { "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72_cc/quartus/bin/TimingClosureFloorplan.fld" "" "" { reset } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "" 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1000 MHz " "Info: Assuming a global fmax requirement of 1000 MHz" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tsu 2.0 ns " "Info: Assuming a global tsu requirement of 2.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tco 1.0 ns " "Info: Assuming a global tco requirement of 1.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tpd 1.0 ns " "Info: Assuming a global tpd requirement of 1.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0}  } {  } 0 0 "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" 0 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0 "" 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0}