c515c.mcu

Free 8051 asm compiler for win new host platforms: Win32 and Linux macro processing dramaticall

;   C515C processor definition file
;   ===============================


; Special Function Registers:
; ---------------------------

P0	DATA	080H
SP	DATA	081H
DPL	DATA	082H
DPH	DATA	083H
WDTREL  DATA    086H
PCON	DATA	087H
TCON	DATA	088H
PCON1	DATA	088H
TMOD	DATA	089H
TL0	DATA	08AH
TL1	DATA	08BH
TH0	DATA	08CH
TH1	DATA	08DH
P1	DATA	090H
XPAGE	DATA    091H
DPSEL	DATA    092H
SSCCON	DATA    093H
STB	DATA    094H
SRB	DATA    095H
SSCMOD	DATA    096H
SCON	DATA	098H
SBUF	DATA	099H
IEN2	DATA    09AH
P2	DATA	0A0H
IEN0	DATA	0A8H
IP0	DATA	0A9H
SRELL   DATA    0AAH
SCF	DATA    0ABH
SCIEN	DATA    0ACH
P3	DATA	0B0H
SYSCON  DATA    0B1H
IEN1	DATA	0B8H
IP1	DATA	0B9H
SRELH   DATA    0BAH
IRCON	DATA	0C0H
CCEN	DATA	0C1H
CCL1	DATA	0C2H
CCH1	DATA	0C3H
CCL2	DATA	0C4H
CCH2	DATA	0C5H
CCL3	DATA	0C6H
CCH3	DATA	0C7H
T2CON	DATA	0C8H
CRCL	DATA	0CAH
CRCH	DATA	0CBH
TL2	DATA	0CCH
TH2	DATA	0CDH
PSW	DATA	0D0H
ADCON0	DATA	0D8H
ADDATH	DATA	0D9H
ADDATL	DATA	0DAH
P6	DATA	0DBH
ADCON1  DATA    0DCH
ACC	DATA	0E0H
P4	DATA	0E8H
B	DATA	0F0H
P5	DATA	0F8H
DIR5	DATA	0F8H
P7	DATA	0FAH


; Directly Addressable Bits:
; --------------------------

IT0	BIT	088H
IE0	BIT	089H
IT1	BIT	08AH
IE1	BIT	08BH
TR0	BIT	08CH
TF0	BIT	08DH
TR1	BIT	08EH
TF1	BIT	08FH
INT3	BIT	090H
CC0	BIT	090H
INT4	BIT	091H
CC1	BIT	091H
INT5	BIT	092H
CC2	BIT	092H
INT6	BIT	093H
CC3	BIT	093H
INT2	BIT	094H
T2EX	BIT	095H
CLKOUT	BIT	096H
T2	BIT	097H
RI	BIT	098H
TI	BIT	099H
RB8	BIT	09AH
TB8	BIT	09BH
REN	BIT	09CH
SM2	BIT	09DH
SM1	BIT	09EH
SM0	BIT	09FH
EX0	BIT	0A8H
ET0	BIT	0A9H
EX1	BIT	0AAH
ET1	BIT	0ABH
ES	BIT	0ACH
ET2	BIT	0ADH
WDT	BIT	0AEH
EA	BIT	0AFH
RXD	BIT	0B0H
TXD	BIT	0B1H
INT0	BIT	0B2H
INT1	BIT	0B3H
T0	BIT	0B4H
T1	BIT	0B5H
WR	BIT	0B6H
RD	BIT	0B7H
EADC	BIT	0B8H
EX2	BIT	0B9H
EX3	BIT	0BAH
EX4	BIT	0BBH
EX5	BIT	0BCH
EX6	BIT	0BDH
SWDT	BIT	0BEH
EXEN2	BIT	0BFH
IADC	BIT	0C0H
IEX2	BIT	0C1H
IEX3	BIT	0C2H
IEX4	BIT	0C3H
IEX5	BIT	0C4H
IEX6	BIT	0C5H
TF2	BIT	0C6H
EXF2	BIT	0C7H
T2I0	BIT	0C8H
T2I1	BIT	0C9H
T2CM	BIT	0CAH
T2R0	BIT	0CBH
T2R1	BIT	0CCH
I2FR	BIT	0CDH
I3FR	BIT	0CEH
T2PS	BIT	0CFH
P	BIT	0D0H
F1	BIT	0D1H
OV	BIT	0D2H
RS0	BIT	0D3H
RS1	BIT	0D4H
F0	BIT	0D5H
AC	BIT	0D6H
CY	BIT	0D7H
MX0	BIT	0D8H
MX1	BIT	0D9H
MX2	BIT	0DAH
ADM	BIT	0DBH
BSY	BIT	0DCH
ADEX    BIT     0DDH
CLK	BIT	0DEH
BD	BIT	0DFH
ADST    BIT     0E8H
SCLK    BIT     0E9H
SRI     BIT     0EAH
STO     BIT     0EBH
SLS     BIT     0ECH
INT8    BIT     0EDH
TXDC    BIT     0EEH
RXDC    BIT     0EFH


; Interrupt Locations:
; --------------------

RESET	CODE	000H
EXTI0	CODE	003H
TIMER0	CODE	00BH
EXTI1	CODE	013H
TIMER1	CODE	01BH
SINT	CODE	023H
TIMER2	CODE	02BH
ADCONV	CODE	043H
EXTI2	CODE	04BH
EXTI3	CODE	053H
EXTI4	CODE	05BH
EXTI5	CODE	063H
EXTI6	CODE	06BH
WAKEUP	CODE	07BH
CAN	CODE	08BH
SSC	CODE	093H
EXTI7	CODE	0A3H
EXTI8	CODE	0ABH


; CAN Controller:
; ---------------

; General Registers:

CR	XDATA   0F700H
SR	XDATA   0F701H
IR	XDATA   0F702H
BTR0	XDATA   0F704H
BTR1	XDATA   0F705H
GMS0	XDATA   0F706H
GMS1	XDATA   0F707H
UGML0	XDATA   0F708H
UGML1	XDATA   0F709H
LGML0	XDATA   0F70AH
LGML1	XDATA   0F70BH
UMLM0	XDATA   0F70CH
UMLM1	XDATA   0F70DH
LMLM0	XDATA   0F70EH
LMLM1	XDATA   0F70FH

; Message Objects Start Addresses:

OBJ1	XDATA	0F710H
OBJ2	XDATA	0F720H
OBJ3	XDATA	0F730H
OBJ4	XDATA	0F740H
OBJ5	XDATA	0F750H
OBJ6	XDATA	0F760H
OBJ7	XDATA	0F770H
OBJ8	XDATA	0F780H
OBJ9	XDATA	0F790H
OBJ10	XDATA	0F7A0H
OBJ11	XDATA	0F7B0H
OBJ12	XDATA	0F7C0H
OBJ13	XDATA	0F7D0H
OBJ14	XDATA	0F7E0H
OBJ15	XDATA	0F7F0H

; Object Register Offsets:

MCR0	EQU	0
MCR1	EQU	1
UAR0	EQU	2
UAR1	EQU	3
LAR0	EQU	4
LAR1	EQU	5
MCFG	EQU	6
DB0	EQU	7
DB1	EQU	8
DB2	EQU	9
DB3	EQU	10
DB4	EQU	11
DB5	EQU	12
DB6	EQU	13
DB7	EQU	14

; Example:
;
; To address the "CAN Message Configuration Register"
; of "Message Object 5" write
;                                MOV DPTR,#OBJ5+MCFG


; On-chip "External" RAM:
; -----------------------

XRAM	XDATA	0F800H