📄 cstartup.s79
字号:
;--------------------------------------------------------------------------------------------------------
; ICCARM STARTUP CODE
;
; This file contains the startup code used by the ICCARM C compiler.
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; All code in the modules (except ?RESET) will be placed in the ICODE segment.
;
; $Revision: 1.56 $
;--------------------------------------------------------------------------------------------------------
;--------------------------------------------------------------------------------------------------------
; LABEL NAMING CONVENTIONS
;
; ?xxx - External labels only accessed from assembler.
; __xxx - External labels accessed from or defined in C.
; xxx - Labels local to one module (note: this file contains
; several modules).
; main - The starting point of the user program.
;--------------------------------------------------------------------------------------------------------
;--------------------------------------------------------------------------------------------------------
; DEFINITIONS
;--------------------------------------------------------------------------------------------------------
; --------------- MODE (Bits 0-5 in CPSR) ---------------- ;
MODE_BITS DEFINE 0x1F ; Bit mask for mode bits in CPSR
USR_MODE DEFINE 0x10 ; User mode
FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
SVC_MODE DEFINE 0x13 ; Supervisor mode
ABT_MODE DEFINE 0x17 ; Abort mode
UND_MODE DEFINE 0x1B ; Undefined Instruction mode
SYS_MODE DEFINE 0x1F ; System mode
; ------------------------ MMU C1 ------------------------- ;
MMU_C1_M DEFINE 0x0001
MMU_C1_A DEFINE 0x0002
MMU_C1_C DEFINE 0x0004
MMU_C1_W DEFINE 0x0008
MMU_C1_S DEFINE 0x0100
MMU_C1_R DEFINE 0x0200
MMU_C1_I DEFINE 0x1000
MMU_C1_RR DEFINE 0x4000
;--------------------------------------------------------------------------------------------------------
; ?RESET
;
; Note(s) : (1) Normally, segment INTVEC is linked at address 0. For debugging purposes, INTVEC
; may be placed at other addresses.
; (2) A debugger that honors the entry point will start the program in a normal way even
* if INTVEC is not at address 0.
;--------------------------------------------------------------------------------------------------------
MODULE ?RESET
COMMON INTVEC:CODE:NOROOT(2)
PUBLIC __program_start
EXTERN ?cstartup
IMPORT OS_CPU_ARM_ExceptUndefInstrHndlr
IMPORT OS_CPU_ARM_ExceptSwiHndlr
IMPORT OS_CPU_ARM_ExceptPrefetchAbortHndlr
IMPORT OS_CPU_ARM_ExceptDataAbortHndlr
IMPORT OS_CPU_ARM_ExceptIrqHndlr
IMPORT OS_CPU_ARM_ExceptFiqHndlr
CODE32 ; Always ARM mode after reset
; ----------------- EXCEPTION VECTOR TABLE ---------------- ;
org 0x00
__program_start:
ldr pc, [pc,#24] ; Absolute jump can reach 4 GByte
org 0x04
ldr pc, [pc,#24] ; Branch to OS_CPU_ARM_ExceptUndefInstrHndlr
org 0x08
ldr pc, [pc,#24] ; Branch to OS_CPU_ARM_ExceptSwiHndlr
org 0x0c
ldr pc, [pc,#24] ; Branch to OS_CPU_ARM_ExceptPrefetchAbortHndlr
org 0x10
ldr pc, [pc,#24] ; Branch to OS_CPU_ARM_ExceptDataAbortHndlr
org 0x14
dcd 0xFFFF
org 0x18
ldr pc, [pc,#24] ; Branch to OS_CPU_ARM_ExceptIrqHndlr
org 0x1c
ldr pc, [pc,#24] ; Branch to OS_CPU_ARM_ExceptFiqHndlr
; ----------- EXCEPTION VECTOR TABLE CONSTANTS ------------ ;
org 0x20
dc32 ?cstartup
org 0x24
dc32 OS_CPU_ARM_ExceptUndefInstrHndlr
org 0x28
dc32 OS_CPU_ARM_ExceptSwiHndlr
org 0x2c
dc32 OS_CPU_ARM_ExceptPrefetchAbortHndlr
org 0x30
dc32 OS_CPU_ARM_ExceptDataAbortHndlr
org 0x38
dc32 OS_CPU_ARM_ExceptIrqHndlr
org 0x3c
dc32 OS_CPU_ARM_ExceptFiqHndlr
ENDMOD
;--------------------------------------------------------------------------------------------------------
; ?CSTARTUP
; Note(s) : (1) This module should initialize the stack pointers and perform other necessary
; initialization.
; (2) The stack segments must be defined in the linker command file and be declared in the
; segment declaration.
;--------------------------------------------------------------------------------------------------------
MODULE ?CSTARTUP
RSEG IRQ_STACK:DATA(2)
RSEG ABT_STACK:DATA:NOROOT(2)
RSEG UND_STACK:DATA:NOROOT(2)
RSEG FIR_STACK:DATA:NOROOT(2)
RSEG SVC_STACK:DATA:NOROOT(2)
RSEG CSTACK:DATA(2)
RSEG ICODE:CODE:NOROOT(2)
PUBLIC ?cstartup
EXTERN ?main
CODE32
?cstartup:
; --------------- INITIALIZE STACK POINTERS --------------- ;
mrs r0,cpsr ; Original PSR value
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#IRQ_MODE ; Set IRQ mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(IRQ_STACK) & 0xFFFFFFF8 ; End of IRQ_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#ABT_MODE ; Set Abort mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(ABT_STACK) & 0xFFFFFFF8 ; End of ABT_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#UND_MODE ; Set Undefined mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(UND_STACK) & 0xFFFFFFF8 ; End of UND_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#FIQ_MODE ; Set FIR mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(FIR_STACK) & 0xFFFFFFF8 ; End of FIR_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#SYS_MODE ; Set System mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(CSTACK) & 0xFFFFFFF8 ; End of CSTACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#SVC_MODE ; Set Supervisor mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(SVC_STACK) & 0xFFFFFFF8 ; End of SVC_STACK
; --------------- ADDITIONAL INITIALIZATION --------------- ;
; ------------------- ENABLE THE I-CACHE ------------------ ;
mrc P15, 0, R0, C1, C0, 0 ; Read MMU C1
bic R0, R0, #MMU_C1_M ; Disable MMU
orr R0, R0, #MMU_C1_I ; Enable I-Cache
mcr P15, 0, R0, C1, C0, 0 ; Write MMU C1
; ------------------- CONTINUE TO ?main ------------------- ;
ldr r0,=?main
bx r0
LTORG
ENDMOD
END
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -