📄 bsp.c
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/*
*********************************************************************************************************
* MICIRUM BOARD SUPPORT PACKAGE
*
* (c) Copyright 2007; Micrium, Inc.; Weston, FL
*
* All rights reserved. Protected by international copyright laws.
* Knowledge of the source code may not be used to write a similar
* product. This file may only be used in accordance with a license
* and should not be redistributed in any way.
*********************************************************************************************************
*/
/*
*********************************************************************************************************
*
* BOARD SUPPORT PACKAGE
*
* Atmel AT91SAM9263
* on the
* AT91SAM9263-EK Evaluation Board
*
* Filename : bsp.c
* Version : V1.00
* Programmer(s) : Brian Nagel
*********************************************************************************************************
*/
#define BSP_GLOBALS
/*
*********************************************************************************************************
* INCLUDE FILES
*********************************************************************************************************
*/
#include <includes.h>
/*
*********************************************************************************************************
* #DEFINE CONSTANTS
*********************************************************************************************************
*/
#define BSP_RAM_REMAP_TEST_BYTE (*(CPU_INT08U *)0x00000030L)
/* ---------------------- GPIOA Pins ---------------------- */
#define GPIOA_MCI0_DA0 DEF_BIT_00
#define GPIOA_SPI0_MISO DEF_BIT_00 /* SPI0 (B): Touch screen controller */
#define GPIOA_MCI0_CDA DEF_BIT_01
#define GPIOA_SPI0_MOSI DEF_BIT_02 /* SPI0 (B): Touch screen controller */
#define GPIOA_MCI0_DA1 DEF_BIT_03
#define GPIOA_SPI0_SPCK DEF_BIT_03 /* SPI0 (B): Touch screen controller */
#define GPIOA_MCI0_DA2 DEF_BIT_04
#define GPIOA_MCI0_DA3 DEF_BIT_05
#define GPIOA_MCI1_CK DEF_BIT_06
#define GPIOA_MCI1_CDA DEF_BIT_07
#define GPIOA_MCI1_DA0 DEF_BIT_08
#define GPIOA_MCI1_DA1 DEF_BIT_09
#define GPIOA_MCI1_DA2 DEF_BIT_10
#define GPIOA_MCI1_DA3 DEF_BIT_11
#define GPIOA_MCI0_CK DEF_BIT_12
#define GPIOA_CANTX DEF_BIT_13
#define GPIOA_CANRX DEF_BIT_14
#define GPIOA_IRQ1 DEF_BIT_15 /* GPIO ( ): Touch screen controller */
#define GPIOA_CTRL1 DEF_BIT_16
#define GPIOA_CTRL2 DEF_BIT_17
#define GPIOA_CANRXEN DEF_BIT_18
#define GPIOA_CANRS DEF_BIT_19
#define GPIOA_FLGB DEF_BIT_20
#define GPIOA_ENB DEF_BIT_21
#define GPIOA_RDYBSY DEF_BIT_22
#define GPIOA_FLGA DEF_BIT_23
#define GPIOA_ENA DEF_BIT_24
#define GPIOA_USBCNX DEF_BIT_25
#define GPIOA_TXD0 DEF_BIT_26
#define GPIOA_RXD0 DEF_BIT_27
#define GPIOA_RTS0 DEF_BIT_28
#define GPIOA_CTS0 DEF_BIT_29
#define GPIOA_PCI DEF_BIT_30
#define GPIOA_BUSY DEF_BIT_31 /* GPIO ( ): Touch screen controller */
/* ---------------------- GPIOB Pins ---------------------- */
#define GPIOB_AC97FS DEF_BIT_00
#define GPIOB_AC97CK DEF_BIT_01
#define GPIOB_AC97TX DEF_BIT_02
#define GPIOB_AC97RX DEF_BIT_03
#define GPIOB_TWD DEF_BIT_04
#define GPIOB_TWC DEF_BIT_05
#define GPIOB_PWM0 DEF_BIT_07
#define GPIOB_PWM1 DEF_BIT_08
#define GPIOB_LCDCC DEF_BIT_09 /* LCDC (B): Contrast control signal */
#define GPIOB_PCK1 DEF_BIT_10
#define GPIOB_SPI0_NPCS3 DEF_BIT_11 /* SPI0 (B): Touch screen controller */
/* ---------------------- GPIOC Pins ---------------------- */
#define GPIOC_LCDHSYNC DEF_BIT_01 /* LCDC (A): Horizontal synchronous signal */
#define GPIOC_LCDDOTC DEF_BIT_02 /* LCDC (A): LCD clock signal */
#define GPIOC_LCDDEN DEF_BIT_03 /* LCDC (A): Data enable signal */
#define GPIOC_RIGHTCLICK DEF_BIT_04
#define GPIOC_LEFTCLICK DEF_BIT_05
#define GPIOC_LCDD2 DEF_BIT_06 /* LCDC (A): Data Bus */
#define GPIOC_LCDD3 DEF_BIT_07 /* LCDC (A): Data Bus */
#define GPIOC_LCDD4 DEF_BIT_08 /* LCDC (A): Data Bus */
#define GPIOC_LCDD5 DEF_BIT_09 /* LCDC (A): Data Bus */
#define GPIOC_LCDD6 DEF_BIT_10 /* LCDC (A): Data Bus */
#define GPIOC_LCDD7 DEF_BIT_11 /* LCDC (A): Data Bus */
#define GPIOC_LCDD13 DEF_BIT_12 /* LCDC (B): Data Bus */
#define GPIOC_LCDD10 DEF_BIT_14 /* LCDC (A): Data Bus */
#define GPIOC_LCDD11 DEF_BIT_15 /* LCDC (A): Data Bus */
#define GPIOC_LCDD12 DEF_BIT_16 /* LCDC (A): Data Bus */
#define GPIOC_LCDD21 DEF_BIT_17 /* LCDC (B): Data Bus */
#define GPIOC_LCDD14 DEF_BIT_18 /* LCDC (A): Data Bus */
#define GPIOC_LCDD15 DEF_BIT_19 /* LCDC (A): Data Bus */
#define GPIOC_LCDD18 DEF_BIT_22 /* LCDC (A): Data Bus */
#define GPIOC_LCDD19 DEF_BIT_23 /* LCDC (A): Data Bus */
#define GPIOC_ERXDV DEF_BIT_25 /* EMAC (B): Data valid */
#define GPIOC_LCDD22 DEF_BIT_26 /* LCDC (A): Data Bus */
#define GPIOC_LCDD23 DEF_BIT_27 /* LCDC (A): Data Bus */
#define GPIOC_PWM2 DEF_BIT_29
#define GPIOC_DRXD DEF_BIT_30
#define GPIOC_DTXD DEF_BIT_31
/* ---------------------- GPIOD Pins ---------------------- */
#define GPIOD_INTRQ DEF_BIT_02
#define GPIOD_IORDY DEF_BIT_03
#define GPIOD_EBI0_CFCE1 DEF_BIT_08
#define GPIOD_EBI0_CFCE2 DEF_BIT_09
#define GPIOD_NANDCS DEF_BIT_15
#define GPIOD_EBI0_D ((CPU_INT32U)0xFFFF0000)
/* ---------------------- GPIOE Pins ---------------------- */
#define GPIOE_ISI_D0 DEF_BIT_00
#define GPIOE_ISI_D1 DEF_BIT_01
#define GPIOE_ISI_D2 DEF_BIT_02
#define GPIOE_ISI_D3 DEF_BIT_03
#define GPIOE_ISI_D4 DEF_BIT_04
#define GPIOE_ISI_D5 DEF_BIT_05
#define GPIOE_ISI_D6 DEF_BIT_06
#define GPIOE_ISI_D7 DEF_BIT_07
#define GPIOE_ISI_PCK DEF_BIT_08
#define GPIOE_ISI_HSYNC DEF_BIT_09
#define GPIOE_ISI_VSYNC DEF_BIT_10
#define GPIOE_ISI_MCK DEF_BIT_11
#define GPIOE_ISI_D8 DEF_BIT_12
#define GPIOE_ISI_D9 DEF_BIT_13
#define GPIOE_ISI_D10 DEF_BIT_14
#define GPIOE_ISI_D11 DEF_BIT_15
#define GPIOE_MCI0_CD DEF_BIT_16
#define GPIOE_MCI0_WP DEF_BIT_17
#define GPIOE_MCI1_CD DEF_BIT_18
#define GPIOE_MCI1_WP DEF_BIT_19
#define GPIOE_CKSEL DEF_BIT_20
#define GPIOE_ETXCK DEF_BIT_21 /* EMAC (A): Reference clock */
#define GPIOE_ETX0 DEF_BIT_23 /* EMAC (A): Transmit data */
#define GPIOE_ETX1 DEF_BIT_24 /* EMAC (A): Transmit data */
#define GPIOE_ERX0 DEF_BIT_25 /* EMAC (A): Receive data */
#define GPIOE_ERX1 DEF_BIT_26 /* EMAC (A): Receive data */
#define GPIOE_ERXER DEF_BIT_27 /* EMAC (A): Receive error */
#define GPIOE_ETXEN DEF_BIT_28 /* EMAC (A): Transmit enable */
#define GPIOE_EMDC DEF_BIT_29
#define GPIOE_EMDIO DEF_BIT_30
#define GPIOE_MDINTR DEF_BIT_31
/*
*********************************************************************************************************
* MACROS
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* LOCAL DATA TYPES
*********************************************************************************************************
*/
typedef void (*BSP_FNCT_PTR)(void); /* Pointer to ISR handler function */
/*
*********************************************************************************************************
* LOCAL VARIABLES
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* LOCAL TABLES
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* LOCAL FUNCTION PROTOTYPES
*********************************************************************************************************
*/
static void BSP_DummyISR_Handler(void);
static void BSP_IntCtrlInit(void);
static void PLL_Init(void);
static void LED_Init(void);
static void PB_Init(void);
static void Tmr_TickInit(void);
static void Tmr_TickISR_Handler(void);
/*
******************************************************************************************************************************
******************************************************************************************************************************
** Global Functions
******************************************************************************************************************************
******************************************************************************************************************************
*/
/*
*********************************************************************************************************
* BSP INITIALIZATION
*
* Description : This function should be called by your application code before you make use of any of the
* functions found in this module.
*
* Arguments : none
*
* Returns : none
*********************************************************************************************************
*/
void BSP_Init (void)
{
BSP_RAM_REMAP_TEST_BYTE = 0xAA; /* Write a byte to address 0x30 */
if (BSP_RAM_REMAP_TEST_BYTE != 0xAA) { /* Check if the write to RAM failed */
AT91C_BASE_MATRIX->MATRIX_MRCR = 0x03;
}
OS_CPU_InitExceptVect();
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS; /* Disable the Watchdog Timer */
LED_Init(); /* Initialize the I/Os for the LEDs */
PB_Init(); /* Initialize the I/Os for the Push Buttons */
PLL_Init(); /* Initialize the PLL and select it for MCLK */
BSP_IntCtrlInit(); /* Initialize the Interrupt Controller */
Tmr_TickInit(); /* Initialize uC/OS-II's Tick Rate */
}
/*
*********************************************************************************************************
* DETERMINE AND RETURN CPU OPERATING FREQUENCY
*
* Description : This function returns the processor clock frequency (the PCLK).
*
* Arguments : none
*
* Returns : The CPU clock frequency in hz.
*********************************************************************************************************
*/
CPU_INT32U BSP_CPU_ClkFreq (void)
{
CPU_INT32U mckr_css;
CPU_INT32U pll_mult;
CPU_INT32U pll_div;
CPU_INT32U pclk_div;
CPU_INT32U cpu_freq;
mckr_css = (AT91C_BASE_PMC->PMC_MCKR) & AT91C_PMC_CSS;
if (mckr_css == AT91C_PMC_CSS_SLOW_CLK) {
return (SLOW_XTAL_FREQ);
}
if (mckr_css == AT91C_PMC_CSS_MAIN_CLK) {
return (MAIN_XTAL_FREQ);
}
if (mckr_css == AT91C_PMC_CSS_PLLA_CLK) {
pll_mult = ((AT91C_BASE_PMC->PMC_PLLAR & AT91C_CKGR_MULA) >> 16);
pll_div = (AT91C_BASE_PMC->PMC_PLLAR & AT91C_CKGR_DIVA) >> 0;
} else {
pll_mult = ((AT91C_BASE_PMC->PMC_PLLBR & AT91C_CKGR_MULB) >> 16);
pll_div = (AT91C_BASE_PMC->PMC_PLLBR & AT91C_CKGR_DIVB) >> 0;
}
if (pll_div == 0) {
return (MAIN_XTAL_FREQ); /* If the PLL mult is 0, then the PLL is disabled */
}
/* Read the Master Clock divider */
pclk_div = (AT91C_BASE_PMC->PMC_MCKR >> 2) & 0x07;
pclk_div = 1 << pclk_div; /* Convert 0-7 into 1, 2, 4, 8, 16, 32, or 64 */
if (pclk_div >= 128) { /* Divider pattern for 128 is reserved */
return (MAIN_XTAL_FREQ);
}
cpu_freq = ((MAIN_XTAL_FREQ / pll_div) / pclk_div) * (pll_mult + 1);
return (cpu_freq);
}
/*
*********************************************************************************************************
* DETERMINE AND RETURN CPU OPERATING FREQUENCY
*
* Description : This function returns the master clock frequency (the MCLK).
*
* Arguments : none
*
* Returns : The CPU clock frequency in hz.
*********************************************************************************************************
*/
CPU_INT32U BSP_CPU_MclkFreq (void)
{
CPU_INT32U mclk_div;
CPU_INT32U cpu_freq;
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