alu.map.eqn

ALU可以实现16种操作（包括加减乘除移位运算等）

--operation mode is normal

A1L682 = !OP[0] & (OP[3] & (!B2_Q[12]) # !OP[3] & (B1_Q[12] # B2_Q[12]));


--A1L782 is Mux~10247
--operation mode is normal

A1L782 = A1L482 # A1L851 & (A1L582 # A1L682);


--A1L501 is add~1611
--operation mode is arithmetic

A1L501_carry_eqn = A1L201;
A1L501 = B1_Q[13] $ (!A1L501_carry_eqn);

--A1L601 is add~1613
--operation mode is arithmetic

A1L601 = CARRY(!B1_Q[13] & (!A1L201));


--A1L701 is add~1616
--operation mode is arithmetic

A1L701_carry_eqn = A1L89;
A1L701 = B2_Q[13] $ B1_Q[13] $ !A1L701_carry_eqn;

--A1L801 is add~1618
--operation mode is arithmetic

A1L801 = CARRY(B2_Q[13] & (B1_Q[13] # !A1L89) # !B2_Q[13] & B1_Q[13] & !A1L89);


--B1_Q[13] is reg:A_reg|Q[13]
--operation mode is normal

B1_Q[13]_lut_out = Dinput[13];
B1_Q[13] = DFFEAS(B1_Q[13]_lut_out, clk, reset, , B1L1, , , , );


--A1L882 is Mux~10248
--operation mode is normal

A1L882 = B1_Q[13] & (OP[0] $ (B2_Q[13] & !OP[3])) # !B1_Q[13] & OP[0] & (B2_Q[13] # OP[3]);


--A1L901 is add~1621
--operation mode is arithmetic

A1L901_carry_eqn = A1L001;
A1L901 = B2_Q[13] $ B1_Q[13] $ A1L901_carry_eqn;

--A1L011 is add~1623
--operation mode is arithmetic

A1L011 = CARRY(B2_Q[13] & B1_Q[13] & !A1L001 # !B2_Q[13] & (B1_Q[13] # !A1L001));


--A1L982 is Mux~10249
--operation mode is normal

A1L982 = OP[3] & (A1L882 & (A1L901) # !A1L882 & A1L701) # !OP[3] & (A1L882);


--F8L1 is sub16:l2|adder16:l1|add4:u4|c1~4
--operation mode is normal

F8L1 = B1_Q[12] & (C2L4 # C2L3) # !B1_Q[12] & !B2_Q[12] & (C2L4 # C2L3);


--F8L41 is sub16:l2|adder16:l1|add4:u4|temp4~59
--operation mode is normal

F8L41 = B1_Q[12] & (!B2_Q[12]);


--F8_sum[1] is sub16:l2|adder16:l1|add4:u4|sum[1]
--operation mode is normal

F8_sum[1] = B2_Q[13] $ B1_Q[13] $ (F8L1 # F8L41);


--F4L1 is adder16:l1|add4:u4|c1~8
--operation mode is normal

F4L1 = B1_Q[12] & (C1L5 # C1L3 # B2_Q[12]) # !B1_Q[12] & B2_Q[12] & (C1L5 # C1L3);


--F4_sum[1] is adder16:l1|add4:u4|sum[1]
--operation mode is normal

F4_sum[1] = B2_Q[13] $ B1_Q[13] $ F4L1;


--A1L092 is Mux~10250
--operation mode is normal

A1L092 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & B2_Q[12] # !OP[3] & (F4_sum[1]));


--B2_Q[14] is reg:B_reg|Q[14]
--operation mode is normal

B2_Q[14]_lut_out = Dinput[14];
B2_Q[14] = DFFEAS(B2_Q[14]_lut_out, clk, reset, , B2L1, , , , );


--A1L192 is Mux~10251
--operation mode is normal

A1L192 = OP[0] & (A1L092 & (B2_Q[14]) # !A1L092 & !F8_sum[1]) # !OP[0] & (A1L092);


--A1L292 is Mux~10252
--operation mode is normal

A1L292 = A1L961 & (A1L861) # !A1L961 & (A1L861 & A1L982 # !A1L861 & (A1L192));


--A1L111 is add~1626
--operation mode is arithmetic

A1L111_carry_eqn = A1L401;
A1L111 = B1_Q[13] $ (A1L111_carry_eqn);

--A1L211 is add~1628
--operation mode is arithmetic

A1L211 = CARRY(!A1L401 # !B1_Q[13]);


--A1L392 is Mux~10253
--operation mode is normal

A1L392 = A1L961 & (A1L292 & (A1L111) # !A1L292 & A1L501) # !A1L961 & (A1L292);


--A1L492 is Mux~10254
--operation mode is normal

A1L492 = A1L392 & (OP[1] & !OP[3] # !OP[2]);


--M12L91 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~129
--operation mode is arithmetic

M12L91_carry_eqn = M12L81;
M12L91 = M81L51 $ (M12L91_carry_eqn);

--M12L02 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~131
--operation mode is arithmetic

M12L02 = CARRY(!M12L81 # !M81L51);


--A1L592 is Mux~10255
--operation mode is normal

A1L592 = OP[0] & (OP[3] & M12L91 # !OP[3] & (B2_Q[13]));


--A1L692 is Mux~10256
--operation mode is normal

A1L692 = !OP[0] & (OP[3] & (!B2_Q[13]) # !OP[3] & (B1_Q[13] # B2_Q[13]));


--A1L792 is Mux~10257
--operation mode is normal

A1L792 = A1L492 # A1L851 & (A1L592 # A1L692);


--M12L12 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~134
--operation mode is arithmetic

M12L12_carry_eqn = M12L02;
M12L12 = M81L71 $ (!M12L12_carry_eqn);

--M12L22 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~136
--operation mode is arithmetic

M12L22 = CARRY(M81L71 & (!M12L02));


--A1L892 is Mux~10258
--operation mode is normal

A1L892 = A1L851 & (OP[0] & M12L12 # !OP[0] & (!B2_Q[14]));


--A1L311 is add~1631
--operation mode is arithmetic

A1L311_carry_eqn = A1L011;
A1L311 = B2_Q[14] $ B1_Q[14] $ !A1L311_carry_eqn;

--A1L411 is add~1633
--operation mode is arithmetic

A1L411 = CARRY(B2_Q[14] & (!A1L011 # !B1_Q[14]) # !B2_Q[14] & !B1_Q[14] & !A1L011);


--A1L511 is add~1636
--operation mode is arithmetic

A1L511_carry_eqn = A1L801;
A1L511 = B2_Q[14] $ B1_Q[14] $ A1L511_carry_eqn;

--A1L611 is add~1638
--operation mode is arithmetic

A1L611 = CARRY(B2_Q[14] & !B1_Q[14] & !A1L801 # !B2_Q[14] & (!A1L801 # !B1_Q[14]));


--A1L992 is Mux~10259
--operation mode is normal

A1L992 = OP[1] & (A1L511 # OP[0]) # !OP[1] & (B2_Q[13] & !OP[0]);


--A1L003 is Mux~10260
--operation mode is normal

A1L003 = !OP[2] & A1L992 & (A1L311 # !OP[0]);


--B1_Q[14] is reg:A_reg|Q[14]
--operation mode is normal

B1_Q[14]_lut_out = Dinput[14];
B1_Q[14] = DFFEAS(B1_Q[14]_lut_out, clk, reset, , B1L1, , , , );


--A1L103 is Mux~10261
--operation mode is normal

A1L103 = B2_Q[14] & (B1_Q[14] $ OP[0] # !OP[1]) # !B2_Q[14] & B1_Q[14] & (OP[0] $ !OP[1]);


--F8L01 is sub16:l2|adder16:l1|add4:u4|temp1~17
--operation mode is normal

F8L01 = B1_Q[12] & !B2_Q[12] & (B1_Q[13] # !B2_Q[13]);


--F8_c2 is sub16:l2|adder16:l1|add4:u4|c2
--operation mode is normal

F8_c2 = F8L01 # B1_Q[13] & (F8L1 # !B2_Q[13]) # !B1_Q[13] & F8L1 & !B2_Q[13];


--A1L663 is result_t~70
--operation mode is normal

A1L663 = B2_Q[14] $ B1_Q[14];


--F4L3 is adder16:l1|add4:u4|c2~14
--operation mode is normal

F4L3 = B1_Q[13] & (B2_Q[13] # B2_Q[12] & B1_Q[12]) # !B1_Q[13] & B2_Q[12] & B1_Q[12] & B2_Q[13];


--F4L9 is adder16:l1|add4:u4|temp2~3
--operation mode is normal

F4L9 = B2_Q[12] & (B2_Q[13] # B1_Q[13]) # !B2_Q[12] & B1_Q[12] & (B2_Q[13] # B1_Q[13]);


--F4_c2 is adder16:l1|add4:u4|c2
--operation mode is normal

F4_c2 = F4L3 # F4L9 & (C1L3 # C1L5);


--A1L203 is Mux~10262
--operation mode is normal

A1L203 = A1L663 $ (OP[0] & !F8_c2 # !OP[0] & (F4_c2));


--A1L711 is add~1641
--operation mode is arithmetic

A1L711_carry_eqn = A1L211;
A1L711 = B1_Q[14] $ (!A1L711_carry_eqn);

--A1L811 is add~1643
--operation mode is arithmetic

A1L811 = CARRY(B1_Q[14] & (!A1L211));


--A1L911 is add~1646
--operation mode is arithmetic

A1L911_carry_eqn = A1L601;
A1L911 = B1_Q[14] $ (A1L911_carry_eqn);

--A1L021 is add~1648
--operation mode is arithmetic

A1L021 = CARRY(B1_Q[14] # !A1L601);


--A1L303 is Mux~10263
--operation mode is normal

A1L303 = OP[0] & A1L711 # !OP[0] & (A1L911);


--A1L403 is Mux~10264
--operation mode is normal

A1L403 = OP[1] & (A1L303) # !OP[1] & A1L203;


--A1L503 is Mux~10265
--operation mode is normal

A1L503 = OP[2] & (OP[1] & (A1L403) # !OP[1] & A1L103) # !OP[2] & (OP[1] & A1L103 # !OP[1] & (A1L403));


--A1L603 is Mux~10266
--operation mode is normal

A1L603 = OP[3] & (A1L892 # A1L003) # !OP[3] & (A1L503);


--A1L121 is add~1651
--operation mode is arithmetic

A1L121_carry_eqn = A1L611;
A1L121 = B2_Q[15] $ B1_Q[15] $ !A1L121_carry_eqn;

--A1L221 is add~1653
--operation mode is arithmetic

A1L221 = CARRY(B2_Q[15] & (B1_Q[15] # !A1L611) # !B2_Q[15] & B1_Q[15] & !A1L611);


--B2_Q[15] is reg:B_reg|Q[15]
--operation mode is normal

B2_Q[15]_lut_out = Dinput[15];
B2_Q[15] = DFFEAS(B2_Q[15]_lut_out, clk, reset, , B2L1, , , , );


--B1_Q[15] is reg:A_reg|Q[15]
--operation mode is normal

B1_Q[15]_lut_out = Dinput[15];
B1_Q[15] = DFFEAS(B1_Q[15]_lut_out, clk, reset, , B1L1, , , , );


--A1L703 is Mux~10267
--operation mode is normal

A1L703 = B2_Q[15] & (OP[0] $ (B1_Q[15] & !OP[3])) # !B2_Q[15] & OP[0] & (B1_Q[15] # OP[3]);


--A1L321 is add~1656
--operation mode is arithmetic

A1L321_carry_eqn = A1L411;
A1L321 = B2_Q[15] $ B1_Q[15] $ A1L321_carry_eqn;

--A1L421 is add~1658
--operation mode is arithmetic

A1L421 = CARRY(B2_Q[15] & B1_Q[15] & !A1L411 # !B2_Q[15] & (B1_Q[15] # !A1L411));


--A1L803 is Mux~10268
--operation mode is normal

A1L803 = OP[3] & (A1L703 & (A1L321) # !A1L703 & A1L121) # !OP[3] & (A1L703);


--A1L521 is add~1661
--operation mode is arithmetic

A1L521_carry_eqn = A1L021;
A1L521 = B1_Q[15] $ (!A1L521_carry_eqn);

--A1L621 is add~1663
--operation mode is arithmetic

A1L621 = CARRY(!B1_Q[15] & (!A1L021));


--F8L51 is sub16:l2|adder16:l1|add4:u4|temp5~0
--operation mode is normal

F8L51 = B1_Q[12] # !B2_Q[12];


--F8_temp0 is sub16:l2|adder16:l1|add4:u4|temp0
--operation mode is normal

F8_temp0 = B1_Q[13] # !B2_Q[13];


--F8L11 is sub16:l2|adder16:l1|add4:u4|temp2~3
--operation mode is normal

F8L11 = F8L51 & F8_temp0 & (C2L4 # C2L3);


--F8L21 is sub16:l2|adder16:l1|add4:u4|temp3~0
--operation mode is normal

F8L21 = B1_Q[14] # !B2_Q[14];


--F8L31 is sub16:l2|adder16:l1|add4:u4|temp3~40
--operation mode is normal

F8L31 = B1_Q[13] & (!B2_Q[13]);


--F8L3 is sub16:l2|adder16:l1|add4:u4|c3~24
--operation mode is normal

F8L3 = B1_Q[14] & (F8L01 # F8L31 # !B2_Q[14]) # !B1_Q[14] & !B2_Q[14] & (F8L01 # F8L31);


--F8L8 is sub16:l2|adder16:l1|add4:u4|sum[3]~107
--operation mode is normal

F8L8 = B2_Q[15] $ B1_Q[15];


--F8_sum[3] is sub16:l2|adder16:l1|add4:u4|sum[3]
--operation mode is normal

F8_sum[3] = F8L8 $ (F8L3 # F8L11 & F8L21);


--A1L563 is result_t~44
--operation mode is normal

A1L563 = B2_Q[12] # B1_Q[12];


--F4L01 is adder16:l1|add4:u4|temp4~82
--operation mode is normal

F4L01 = B2_Q[13] & (B2_Q[14] # B1_Q[14]) # !B2_Q[13] & B1_Q[13] & (B2_Q[14] # B1_Q[14]);


--F4_temp5 is adder16:l1|add4:u4|temp5
--operation mode is normal

F4_temp5 = A1L563 & F4L01 & (C1L3 # C1L5);


--F4L11 is adder16:l1|add4:u4|temp4~83
--operation mode is normal

F4L11 = B2_Q[12] & B1_Q[12] & F4L01;


--F4L4 is adder16:l1|add4:u4|c3~24
--operation mode is normal

F4L4 = B1_Q[14] & (B2_Q[14] # B2_Q[13] & B1_Q[13]) # !B1_Q[14] & B2_Q[13] & B1_Q[13] & B2_Q[14];


--F4_sum[3] is adder16:l1|add4:u4|sum[3]
--operation mode is normal

F4_sum[3] = F8L8 $ (F4_temp5 # F4L11 # F4L4);


--A1L903 is Mux~10269
--operation mode is normal

A1L903 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & B2_Q[14] # !OP[3] & (F4_sum[3]));


--A1L013 is Mux~10270
--operation mode is normal

A1L013 = OP[0] & (A1L903 & (B2_Q[0]) # !A1L903 & !F8_sum[3]) # !OP[0] & (A1L903);


--A1L113 is Mux~10271
--operation mode is normal

A1L113 = A1L861 & (A1L961) # !A1L861 & (A1L961 & A1L521 # !A1L961 & (A1L013));


--A1L721 is add~1666
--operation mode is arithmetic

A1L721_carry_eqn = A1L811;
A1L721 = B1_Q[15] $ (A1L721_carry_eqn);

--A1L821 is add~1668
--operation mode is arithmetic

A1L821 = CARRY(!A1L811 # !B1_Q[15]);


--A1L213 is Mux~10272
--operation mode is normal

A1L213 = A1L861 & (A1L113 & (A1L721) # !A1L113 & A1L803) # !A1L861 & (A1L113);


--A1L313 is Mux~10273
--operation mode is normal

A1L313 = A1L213 & (OP[1] & !OP[3] # !OP[2]);


--A1L413 is Mux~10274
--operation mode is normal

A1L413 = !OP[3] & (B2_Q[15] # B1_Q[15] & !OP[0]);


--M12L32 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~139
--operation mode is normal

M12L32_carry_eqn = M12L22;
M12L32 = M81L91 $ (M12L32_carry_eqn);


--A1L513 is Mux~10275
--operation mode is normal

A1L513 = OP[3] & (OP[0] & M12L32 # !OP[0] & (!B2_Q[15]));


--A1L613 is Mux~10276
--operation mode is normal

A1L613 = A1L313 # A1L851 & (A1L413 # A1L513);


--A1L041 is C~10
--operation mode is normal

A1L041 = result_t[16] & reset;


--A1L073 is Z~258
--operation mode is normal

A1L073 = !A1L561 & !A1L603;


--A1L173 is Z~259
--operation mode is normal

A1L173 = !A1L771 & !A1L781 & !A1L791 & !A1L702;


--A1L273 is Z~260
--operation mode is normal

A1L273 = !A1L712 & !A1L722 & !A1L732 & !A1L742;


--A1L373 is Z~261
--o