alu.map.eqn

ALU可以实现16种操作（包括加减乘除移位运算等）

--A1L18 is add~1551
--operation mode is arithmetic

A1L18_carry_eqn = A1L67;
A1L18 = B2_Q[10] $ B1_Q[10] $ A1L18_carry_eqn;

--A1L28 is add~1553
--operation mode is arithmetic

A1L28 = CARRY(B2_Q[10] & !B1_Q[10] & !A1L67 # !B2_Q[10] & (!A1L67 # !B1_Q[10]));


--B1_Q[10] is reg:A_reg|Q[10]
--operation mode is normal

B1_Q[10]_lut_out = Dinput[10];
B1_Q[10] = DFFEAS(B1_Q[10]_lut_out, clk, reset, , B1L1, , , , );


--A1L852 is Mux~10218
--operation mode is normal

A1L852 = B1_Q[10] & (OP[0] $ (B2_Q[10] & !OP[3])) # !B1_Q[10] & OP[0] & (B2_Q[10] # OP[3]);


--A1L38 is add~1556
--operation mode is arithmetic

A1L38_carry_eqn = A1L87;
A1L38 = B2_Q[10] $ B1_Q[10] $ !A1L38_carry_eqn;

--A1L48 is add~1558
--operation mode is arithmetic

A1L48 = CARRY(B2_Q[10] & (!A1L87 # !B1_Q[10]) # !B2_Q[10] & !B1_Q[10] & !A1L87);


--A1L952 is Mux~10219
--operation mode is normal

A1L952 = OP[3] & (A1L852 & (A1L38) # !A1L852 & A1L18) # !OP[3] & (A1L852);


--A1L58 is add~1561
--operation mode is arithmetic

A1L58_carry_eqn = A1L47;
A1L58 = B1_Q[10] $ (A1L58_carry_eqn);

--A1L68 is add~1563
--operation mode is arithmetic

A1L68 = CARRY(B1_Q[10] # !A1L47);


--F7_temp0 is sub16:l2|adder16:l1|add4:u3|temp0
--operation mode is normal

F7_temp0 = B1_Q[9] # !B2_Q[9];


--F7L61 is sub16:l2|adder16:l1|add4:u3|temp2~3
--operation mode is normal

F7L61 = C2L1 & F7_temp0 & (B1_Q[8] # !B2_Q[8]);


--F7L51 is sub16:l2|adder16:l1|add4:u3|temp1~17
--operation mode is normal

F7L51 = B1_Q[8] & !B2_Q[8] & (B1_Q[9] # !B2_Q[9]);


--F7L71 is sub16:l2|adder16:l1|add4:u3|temp3~37
--operation mode is normal

F7L71 = B1_Q[9] & (!B2_Q[9]);


--F7L01 is sub16:l2|adder16:l1|add4:u3|sum[2]~115
--operation mode is normal

F7L01 = B2_Q[10] $ B1_Q[10];


--F7_sum[2] is sub16:l2|adder16:l1|add4:u3|sum[2]
--operation mode is normal

F7_sum[2] = F7L01 $ (F7L61 # F7L51 # F7L71);


--F3L31 is adder16:l1|add4:u3|temp2~4
--operation mode is normal

F3L31 = B2_Q[8] & (B2_Q[9] # B1_Q[9]) # !B2_Q[8] & B1_Q[8] & (B2_Q[9] # B1_Q[9]);


--F3L2 is adder16:l1|add4:u3|c2~14
--operation mode is normal

F3L2 = B1_Q[9] & (B2_Q[9] # B2_Q[8] & B1_Q[8]) # !B1_Q[9] & B2_Q[8] & B1_Q[8] & B2_Q[9];


--F3_sum[2] is adder16:l1|add4:u3|sum[2]
--operation mode is normal

F3_sum[2] = F7L01 $ (F3L2 # C1L1 & F3L31);


--A1L062 is Mux~10220
--operation mode is normal

A1L062 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & B2_Q[9] # !OP[3] & (F3_sum[2]));


--B2_Q[11] is reg:B_reg|Q[11]
--operation mode is normal

B2_Q[11]_lut_out = Dinput[11];
B2_Q[11] = DFFEAS(B2_Q[11]_lut_out, clk, reset, , B2L1, , , , );


--A1L162 is Mux~10221
--operation mode is normal

A1L162 = OP[0] & (A1L062 & (B2_Q[11]) # !A1L062 & !F7_sum[2]) # !OP[0] & (A1L062);


--A1L262 is Mux~10222
--operation mode is normal

A1L262 = A1L861 & (A1L961) # !A1L861 & (A1L961 & A1L58 # !A1L961 & (A1L162));


--A1L78 is add~1566
--operation mode is arithmetic

A1L78_carry_eqn = A1L08;
A1L78 = B1_Q[10] $ (!A1L78_carry_eqn);

--A1L88 is add~1568
--operation mode is arithmetic

A1L88 = CARRY(B1_Q[10] & (!A1L08));


--A1L362 is Mux~10223
--operation mode is normal

A1L362 = A1L861 & (A1L262 & (A1L78) # !A1L262 & A1L952) # !A1L861 & (A1L262);


--A1L462 is Mux~10224
--operation mode is normal

A1L462 = A1L362 & (OP[1] & !OP[3] # !OP[2]);


--M12L31 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~114
--operation mode is arithmetic

M12L31_carry_eqn = M12L21;
M12L31 = M51L71 $ M81L9 $ !M12L31_carry_eqn;

--M12L41 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~116
--operation mode is arithmetic

M12L41 = CARRY(M51L71 & (M81L9 # !M12L21) # !M51L71 & M81L9 & !M12L21);


--A1L562 is Mux~10225
--operation mode is normal

A1L562 = OP[0] & (OP[3] & M12L31 # !OP[3] & (B2_Q[10]));


--A1L662 is Mux~10226
--operation mode is normal

A1L662 = !OP[0] & (OP[3] & (!B2_Q[10]) # !OP[3] & (B1_Q[10] # B2_Q[10]));


--A1L762 is Mux~10227
--operation mode is normal

A1L762 = A1L462 # A1L851 & (A1L562 # A1L662);


--A1L98 is add~1571
--operation mode is arithmetic

A1L98_carry_eqn = A1L68;
A1L98 = B1_Q[11] $ (!A1L98_carry_eqn);

--A1L09 is add~1573
--operation mode is arithmetic

A1L09 = CARRY(!B1_Q[11] & (!A1L68));


--A1L19 is add~1576
--operation mode is arithmetic

A1L19_carry_eqn = A1L28;
A1L19 = B2_Q[11] $ B1_Q[11] $ !A1L19_carry_eqn;

--A1L29 is add~1578
--operation mode is arithmetic

A1L29 = CARRY(B2_Q[11] & (B1_Q[11] # !A1L28) # !B2_Q[11] & B1_Q[11] & !A1L28);


--B1_Q[11] is reg:A_reg|Q[11]
--operation mode is normal

B1_Q[11]_lut_out = Dinput[11];
B1_Q[11] = DFFEAS(B1_Q[11]_lut_out, clk, reset, , B1L1, , , , );


--A1L862 is Mux~10228
--operation mode is normal

A1L862 = B1_Q[11] & (OP[0] $ (B2_Q[11] & !OP[3])) # !B1_Q[11] & OP[0] & (B2_Q[11] # OP[3]);


--A1L39 is add~1581
--operation mode is arithmetic

A1L39_carry_eqn = A1L48;
A1L39 = B2_Q[11] $ B1_Q[11] $ A1L39_carry_eqn;

--A1L49 is add~1583
--operation mode is arithmetic

A1L49 = CARRY(B2_Q[11] & B1_Q[11] & !A1L48 # !B2_Q[11] & (B1_Q[11] # !A1L48));


--A1L962 is Mux~10229
--operation mode is normal

A1L962 = OP[3] & (A1L862 & (A1L39) # !A1L862 & A1L19) # !OP[3] & (A1L862);


--F7L11 is sub16:l2|adder16:l1|add4:u3|sum[3]~116
--operation mode is normal

F7L11 = B2_Q[11] $ B1_Q[11];


--F7L21 is sub16:l2|adder16:l1|add4:u3|sum[3]~117
--operation mode is normal

F7L21 = F7L11 $ (B1_Q[10] & (F7L31 # !B2_Q[10]) # !B1_Q[10] & !B2_Q[10] & F7L31);


--F3L51 is adder16:l1|add4:u3|temp5~6
--operation mode is normal

F3L51 = F3L31 & (B2_Q[10] # B1_Q[10]);


--F3L3 is adder16:l1|add4:u3|c3~24
--operation mode is normal

F3L3 = B1_Q[10] & (B2_Q[10] # B2_Q[9] & B1_Q[9]) # !B1_Q[10] & B2_Q[9] & B1_Q[9] & B2_Q[10];


--F3L41 is adder16:l1|add4:u3|temp4~58
--operation mode is normal

F3L41 = B2_Q[8] & B1_Q[8] & (B2_Q[9] # B1_Q[9]);


--F3L4 is adder16:l1|add4:u3|c3~25
--operation mode is normal

F3L4 = F3L3 # F3L41 & (B2_Q[10] # B1_Q[10]);


--F3_sum[3] is adder16:l1|add4:u3|sum[3]
--operation mode is normal

F3_sum[3] = F7L11 $ (F3L4 # C1L1 & F3L51);


--A1L072 is Mux~10230
--operation mode is normal

A1L072 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & B2_Q[10] # !OP[3] & (F3_sum[3]));


--B2_Q[12] is reg:B_reg|Q[12]
--operation mode is normal

B2_Q[12]_lut_out = Dinput[12];
B2_Q[12] = DFFEAS(B2_Q[12]_lut_out, clk, reset, , B2L1, , , , );


--A1L172 is Mux~10231
--operation mode is normal

A1L172 = OP[0] & (A1L072 & (B2_Q[12]) # !A1L072 & !F7L21) # !OP[0] & (A1L072);


--A1L272 is Mux~10232
--operation mode is normal

A1L272 = A1L961 & (A1L861) # !A1L961 & (A1L861 & A1L962 # !A1L861 & (A1L172));


--A1L59 is add~1586
--operation mode is arithmetic

A1L59_carry_eqn = A1L88;
A1L59 = B1_Q[11] $ (A1L59_carry_eqn);

--A1L69 is add~1588
--operation mode is arithmetic

A1L69 = CARRY(!A1L88 # !B1_Q[11]);


--A1L372 is Mux~10233
--operation mode is normal

A1L372 = A1L961 & (A1L272 & (A1L59) # !A1L272 & A1L98) # !A1L961 & (A1L272);


--A1L472 is Mux~10234
--operation mode is normal

A1L472 = A1L372 & (OP[1] & !OP[3] # !OP[2]);


--M12L51 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~119
--operation mode is arithmetic

M12L51_carry_eqn = M12L41;
M12L51 = M51L91 $ M81L11 $ M12L51_carry_eqn;

--M12L61 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~121
--operation mode is arithmetic

M12L61 = CARRY(M51L91 & !M81L11 & !M12L41 # !M51L91 & (!M12L41 # !M81L11));


--A1L572 is Mux~10235
--operation mode is normal

A1L572 = OP[0] & (OP[3] & M12L51 # !OP[3] & (B2_Q[11]));


--A1L672 is Mux~10236
--operation mode is normal

A1L672 = !OP[0] & (OP[3] & (!B2_Q[11]) # !OP[3] & (B1_Q[11] # B2_Q[11]));


--A1L772 is Mux~10237
--operation mode is normal

A1L772 = A1L472 # A1L851 & (A1L572 # A1L672);


--A1L79 is add~1591
--operation mode is arithmetic

A1L79_carry_eqn = A1L29;
A1L79 = B2_Q[12] $ B1_Q[12] $ A1L79_carry_eqn;

--A1L89 is add~1593
--operation mode is arithmetic

A1L89 = CARRY(B2_Q[12] & !B1_Q[12] & !A1L29 # !B2_Q[12] & (!A1L29 # !B1_Q[12]));


--B1_Q[12] is reg:A_reg|Q[12]
--operation mode is normal

B1_Q[12]_lut_out = Dinput[12];
B1_Q[12] = DFFEAS(B1_Q[12]_lut_out, clk, reset, , B1L1, , , , );


--A1L872 is Mux~10238
--operation mode is normal

A1L872 = B1_Q[12] & (OP[0] $ (B2_Q[12] & !OP[3])) # !B1_Q[12] & OP[0] & (B2_Q[12] # OP[3]);


--A1L99 is add~1596
--operation mode is arithmetic

A1L99_carry_eqn = A1L49;
A1L99 = B2_Q[12] $ B1_Q[12] $ !A1L99_carry_eqn;

--A1L001 is add~1598
--operation mode is arithmetic

A1L001 = CARRY(B2_Q[12] & (!A1L49 # !B1_Q[12]) # !B2_Q[12] & !B1_Q[12] & !A1L49);


--A1L972 is Mux~10239
--operation mode is normal

A1L972 = OP[3] & (A1L872 & (A1L99) # !A1L872 & A1L79) # !OP[3] & (A1L872);


--A1L101 is add~1601
--operation mode is arithmetic

A1L101_carry_eqn = A1L09;
A1L101 = B1_Q[12] $ (A1L101_carry_eqn);

--A1L201 is add~1603
--operation mode is arithmetic

A1L201 = CARRY(B1_Q[12] # !A1L09);


--F7L4 is sub16:l2|adder16:l1|add4:u3|p~72
--operation mode is normal

F7L4 = B1_Q[11] & (B1_Q[10] # !B2_Q[10]) # !B1_Q[11] & !B2_Q[11] & (B1_Q[10] # !B2_Q[10]);


--F7_p is sub16:l2|adder16:l1|add4:u3|p
--operation mode is normal

F7_p = F7_temp0 & F7L4 & (B1_Q[8] # !B2_Q[8]);


--C2L4 is sub16:l2|adder16:l1|cout~189
--operation mode is normal

C2L4 = F6_p & F7_p & (F5L6 # C2L2);


--F7L1 is sub16:l2|adder16:l1|add4:u3|g~221
--operation mode is normal

F7L1 = B1_Q[11] & (B1_Q[10] & !B2_Q[10] # !B2_Q[11]) # !B1_Q[11] & B1_Q[10] & !B2_Q[10] & !B2_Q[11];


--F7L2 is sub16:l2|adder16:l1|add4:u3|g~222
--operation mode is normal

F7L2 = F7L1 # F7L4 & (F7L51 # F7L71);


--C2L3 is sub16:l2|adder16:l1|c12~106
--operation mode is normal

C2L3 = F7L2 # F6L5 & F7_p;


--F8_sum[0] is sub16:l2|adder16:l1|add4:u4|sum[0]
--operation mode is normal

F8_sum[0] = B2_Q[12] $ B1_Q[12] $ (C2L4 # C2L3);


--F3L5 is adder16:l1|add4:u3|g~100
--operation mode is normal

F3L5 = B1_Q[11] & (B2_Q[11] # B2_Q[10] & B1_Q[10]) # !B1_Q[11] & B2_Q[10] & B1_Q[10] & B2_Q[11];


--F3L6 is adder16:l1|add4:u3|g~101
--operation mode is normal

F3L6 = B2_Q[10] & (B2_Q[11] # B1_Q[11]) # !B2_Q[10] & B1_Q[10] & (B2_Q[11] # B1_Q[11]);


--F3L7 is adder16:l1|add4:u3|g~102
--operation mode is normal

F3L7 = B2_Q[9] & B1_Q[9];


--C1L4 is adder16:l1|c12~52
--operation mode is normal

C1L4 = F3L5 # F3L6 & (F3L41 # F3L7);


--A1L463 is result_t~43
--operation mode is normal

A1L463 = B2_Q[11] # B1_Q[11];


--C1L3 is adder16:l1|c12~1
--operation mode is normal

C1L3 = C1L4 # F2L6 & F3L51 & A1L463;


--F4_sum[0] is adder16:l1|add4:u4|sum[0]
--operation mode is normal

F4_sum[0] = B2_Q[12] $ B1_Q[12] $ (C1L3 # C1L5);


--A1L082 is Mux~10240
--operation mode is normal

A1L082 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & B2_Q[11] # !OP[3] & (F4_sum[0]));


--B2_Q[13] is reg:B_reg|Q[13]
--operation mode is normal

B2_Q[13]_lut_out = Dinput[13];
B2_Q[13] = DFFEAS(B2_Q[13]_lut_out, clk, reset, , B2L1, , , , );


--A1L182 is Mux~10241
--operation mode is normal

A1L182 = OP[0] & (A1L082 & (B2_Q[13]) # !A1L082 & !F8_sum[0]) # !OP[0] & (A1L082);


--A1L282 is Mux~10242
--operation mode is normal

A1L282 = A1L861 & (A1L961) # !A1L861 & (A1L961 & A1L101 # !A1L961 & (A1L182));


--A1L301 is add~1606
--operation mode is arithmetic

A1L301_carry_eqn = A1L69;
A1L301 = B1_Q[12] $ (!A1L301_carry_eqn);

--A1L401 is add~1608
--operation mode is arithmetic

A1L401 = CARRY(B1_Q[12] & (!A1L69));


--A1L382 is Mux~10243
--operation mode is normal

A1L382 = A1L861 & (A1L282 & (A1L301) # !A1L282 & A1L972) # !A1L861 & (A1L282);


--A1L482 is Mux~10244
--operation mode is normal

A1L482 = A1L382 & (OP[1] & !OP[3] # !OP[2]);


--M12L71 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~124
--operation mode is arithmetic

M12L71_carry_eqn = M12L61;
M12L71 = M81L31 $ (!M12L71_carry_eqn);

--M12L81 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~126
--operation mode is arithmetic

M12L81 = CARRY(M81L31 & (!M12L61));


--A1L582 is Mux~10245
--operation mode is normal

A1L582 = OP[0] & (OP[3] & M12L71 # !OP[3] & (B2_Q[12]));


--A1L682 is Mux~10246