alu.map.eqn

ALU可以实现16种操作（包括加减乘除移位运算等）

--operation mode is arithmetic

M12L6 = CARRY(M51L9 & (M81L1 # !M12L4) # !M51L9 & M81L1 & !M12L4);


--A1L522 is Mux~10185
--operation mode is normal

A1L522 = OP[0] & (OP[3] & M12L5 # !OP[3] & (B2_Q[6]));


--A1L622 is Mux~10186
--operation mode is normal

A1L622 = !OP[0] & (OP[3] & (!B2_Q[6]) # !OP[3] & (B1_Q[6] # B2_Q[6]));


--A1L722 is Mux~10187
--operation mode is normal

A1L722 = A1L422 # A1L851 & (A1L522 # A1L622);


--A1L75 is add~1491
--operation mode is arithmetic

A1L75_carry_eqn = A1L45;
A1L75 = B1_Q[7] $ (!A1L75_carry_eqn);

--A1L85 is add~1493
--operation mode is arithmetic

A1L85 = CARRY(!B1_Q[7] & (!A1L45));


--A1L95 is add~1496
--operation mode is arithmetic

A1L95_carry_eqn = A1L05;
A1L95 = B2_Q[7] $ B1_Q[7] $ !A1L95_carry_eqn;

--A1L06 is add~1498
--operation mode is arithmetic

A1L06 = CARRY(B2_Q[7] & (B1_Q[7] # !A1L05) # !B2_Q[7] & B1_Q[7] & !A1L05);


--B1_Q[7] is reg:A_reg|Q[7]
--operation mode is normal

B1_Q[7]_lut_out = Dinput[7];
B1_Q[7] = DFFEAS(B1_Q[7]_lut_out, clk, reset, , B1L1, , , , );


--A1L822 is Mux~10188
--operation mode is normal

A1L822 = B2_Q[7] & (OP[0] $ (B1_Q[7] & !OP[3])) # !B2_Q[7] & OP[0] & (B1_Q[7] # OP[3]);


--A1L16 is add~1501
--operation mode is arithmetic

A1L16_carry_eqn = A1L25;
A1L16 = B2_Q[7] $ B1_Q[7] $ A1L16_carry_eqn;

--A1L26 is add~1503
--operation mode is arithmetic

A1L26 = CARRY(B2_Q[7] & B1_Q[7] & !A1L25 # !B2_Q[7] & (B1_Q[7] # !A1L25));


--A1L922 is Mux~10189
--operation mode is normal

A1L922 = OP[3] & (A1L822 & (A1L16) # !A1L822 & A1L95) # !OP[3] & (A1L822);


--F6L7 is sub16:l2|adder16:l1|add4:u2|p~60
--operation mode is normal

F6L7 = B1_Q[5] & (B1_Q[4] # !B2_Q[4]) # !B1_Q[5] & !B2_Q[5] & (B1_Q[4] # !B2_Q[4]);


--F6L71 is sub16:l2|adder16:l1|add4:u2|temp3~0
--operation mode is normal

F6L71 = B1_Q[6] # !B2_Q[6];


--F6L91 is sub16:l2|adder16:l1|add4:u2|temp5~4
--operation mode is normal

F6L91 = F6L7 & F6L71 & (F5L6 # C2L2);


--F6L31 is sub16:l2|adder16:l1|add4:u2|sum[3]~127
--operation mode is normal

F6L31 = B1_Q[5] & (B1_Q[4] & !B2_Q[4] # !B2_Q[5]) # !B1_Q[5] & B1_Q[4] & !B2_Q[5] & !B2_Q[4];


--F6L41 is sub16:l2|adder16:l1|add4:u2|sum[3]~128
--operation mode is normal

F6L41 = B1_Q[6] & (F6L31 # !B2_Q[6]) # !B1_Q[6] & !B2_Q[6] & F6L31;


--F6L51 is sub16:l2|adder16:l1|add4:u2|sum[3]~129
--operation mode is normal

F6L51 = B2_Q[7] $ B1_Q[7] $ (F6L91 # F6L41);


--F2L4 is adder16:l1|add4:u2|c3~24
--operation mode is normal

F2L4 = B1_Q[6] & (B2_Q[6] # B2_Q[5] & B1_Q[5]) # !B1_Q[6] & B2_Q[5] & B1_Q[5] & B2_Q[6];


--A1L363 is result_t~38
--operation mode is normal

A1L363 = B2_Q[6] # B1_Q[6];


--F2L41 is adder16:l1|add4:u2|temp4~45
--operation mode is normal

F2L41 = B2_Q[4] & B1_Q[4] & (B2_Q[5] # B1_Q[5]);


--F2_c3 is adder16:l1|add4:u2|c3
--operation mode is normal

F2_c3 = F2L4 # A1L363 & (F2L31 # F2L41);


--F2_sum[3] is adder16:l1|add4:u2|sum[3]
--operation mode is normal

F2_sum[3] = B2_Q[7] $ B1_Q[7] $ F2_c3;


--A1L032 is Mux~10190
--operation mode is normal

A1L032 = OP[3] & (OP[0]) # !OP[3] & (OP[0] & !F6L51 # !OP[0] & (F2_sum[3]));


--B2_Q[8] is reg:B_reg|Q[8]
--operation mode is normal

B2_Q[8]_lut_out = Dinput[8];
B2_Q[8] = DFFEAS(B2_Q[8]_lut_out, clk, reset, , B2L1, , , , );


--A1L132 is Mux~10191
--operation mode is normal

A1L132 = OP[3] & (A1L032 & (B2_Q[8]) # !A1L032 & B2_Q[6]) # !OP[3] & (A1L032);


--A1L232 is Mux~10192
--operation mode is normal

A1L232 = A1L961 & (A1L861) # !A1L961 & (A1L861 & A1L922 # !A1L861 & (A1L132));


--A1L36 is add~1506
--operation mode is arithmetic

A1L36_carry_eqn = A1L65;
A1L36 = B1_Q[7] $ (A1L36_carry_eqn);

--A1L46 is add~1508
--operation mode is arithmetic

A1L46 = CARRY(!A1L65 # !B1_Q[7]);


--A1L332 is Mux~10193
--operation mode is normal

A1L332 = A1L961 & (A1L232 & (A1L36) # !A1L232 & A1L75) # !A1L961 & (A1L232);


--A1L432 is Mux~10194
--operation mode is normal

A1L432 = A1L332 & (OP[1] & !OP[3] # !OP[2]);


--M12L7 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~99
--operation mode is arithmetic

M12L7_carry_eqn = M12L6;
M12L7 = M51L11 $ M81L3 $ M12L7_carry_eqn;

--M12L8 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~101
--operation mode is arithmetic

M12L8 = CARRY(M51L11 & !M81L3 & !M12L6 # !M51L11 & (!M12L6 # !M81L3));


--A1L532 is Mux~10195
--operation mode is normal

A1L532 = OP[0] & (OP[3] & M12L7 # !OP[3] & (B2_Q[7]));


--A1L632 is Mux~10196
--operation mode is normal

A1L632 = !OP[0] & (OP[3] & (!B2_Q[7]) # !OP[3] & (B1_Q[7] # B2_Q[7]));


--A1L732 is Mux~10197
--operation mode is normal

A1L732 = A1L432 # A1L851 & (A1L532 # A1L632);


--A1L56 is add~1511
--operation mode is arithmetic

A1L56_carry_eqn = A1L06;
A1L56 = B2_Q[8] $ B1_Q[8] $ A1L56_carry_eqn;

--A1L66 is add~1513
--operation mode is arithmetic

A1L66 = CARRY(B2_Q[8] & !B1_Q[8] & !A1L06 # !B2_Q[8] & (!A1L06 # !B1_Q[8]));


--B1_Q[8] is reg:A_reg|Q[8]
--operation mode is normal

B1_Q[8]_lut_out = Dinput[8];
B1_Q[8] = DFFEAS(B1_Q[8]_lut_out, clk, reset, , B1L1, , , , );


--A1L832 is Mux~10198
--operation mode is normal

A1L832 = B1_Q[8] & (OP[0] $ (B2_Q[8] & !OP[3])) # !B1_Q[8] & OP[0] & (B2_Q[8] # OP[3]);


--A1L76 is add~1516
--operation mode is arithmetic

A1L76_carry_eqn = A1L26;
A1L76 = B2_Q[8] $ B1_Q[8] $ !A1L76_carry_eqn;

--A1L86 is add~1518
--operation mode is arithmetic

A1L86 = CARRY(B2_Q[8] & (!A1L26 # !B1_Q[8]) # !B2_Q[8] & !B1_Q[8] & !A1L26);


--A1L932 is Mux~10199
--operation mode is normal

A1L932 = OP[3] & (A1L832 & (A1L76) # !A1L832 & A1L56) # !OP[3] & (A1L832);


--A1L96 is add~1521
--operation mode is arithmetic

A1L96_carry_eqn = A1L85;
A1L96 = B1_Q[8] $ (A1L96_carry_eqn);

--A1L07 is add~1523
--operation mode is arithmetic

A1L07 = CARRY(B1_Q[8] # !A1L85);


--F6L4 is sub16:l2|adder16:l1|add4:u2|g~228
--operation mode is normal

F6L4 = B1_Q[7] & (B1_Q[6] & !B2_Q[6] # !B2_Q[7]) # !B1_Q[7] & B1_Q[6] & !B2_Q[6] & !B2_Q[7];


--F6L3 is sub16:l2|adder16:l1|add4:u2|g~1
--operation mode is normal

F6L3 = B1_Q[7] # !B2_Q[7];


--F6L5 is sub16:l2|adder16:l1|add4:u2|g~229
--operation mode is normal

F6L5 = F6L4 # F6L71 & F6L3 & !F6L2;


--C2L1 is sub16:l2|adder16:l1|c8~25
--operation mode is normal

C2L1 = F6L5 # F6_p & (F5L6 # C2L2);


--F7_sum[0] is sub16:l2|adder16:l1|add4:u3|sum[0]
--operation mode is normal

F7_sum[0] = B2_Q[8] $ B1_Q[8] $ C2L1;


--H1_decoder_node[5][5] is lpm_mult:mult_rtl_0|multcore:mult_core|decoder_node[5][5]
--operation mode is normal

H1_decoder_node[5][5] = LCELL(B2_Q[5] & B1_Q[5]);


--F2L5 is adder16:l1|add4:u2|g~177
--operation mode is normal

F2L5 = B2_Q[6] & (B1_Q[6] # F2L41 # H1_decoder_node[5][5]) # !B2_Q[6] & B1_Q[6] & (F2L41 # H1_decoder_node[5][5]);


--F2L6 is adder16:l1|add4:u2|g~178
--operation mode is normal

F2L6 = B1_Q[7] & (B2_Q[7] # F2L5) # !B1_Q[7] & B2_Q[7] & F2L5;


--C1L2 is adder16:l1|c8~24
--operation mode is normal

C1L2 = F2L31 & A1L363 & (B2_Q[7] # B1_Q[7]);


--F3_sum[0] is adder16:l1|add4:u3|sum[0]
--operation mode is normal

F3_sum[0] = B2_Q[8] $ B1_Q[8] $ (F2L6 # C1L2);


--A1L042 is Mux~10200
--operation mode is normal

A1L042 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & B2_Q[7] # !OP[3] & (F3_sum[0]));


--B2_Q[9] is reg:B_reg|Q[9]
--operation mode is normal

B2_Q[9]_lut_out = Dinput[9];
B2_Q[9] = DFFEAS(B2_Q[9]_lut_out, clk, reset, , B2L1, , , , );


--A1L142 is Mux~10201
--operation mode is normal

A1L142 = OP[0] & (A1L042 & (B2_Q[9]) # !A1L042 & !F7_sum[0]) # !OP[0] & (A1L042);


--A1L242 is Mux~10202
--operation mode is normal

A1L242 = A1L861 & (A1L961) # !A1L861 & (A1L961 & A1L96 # !A1L961 & (A1L142));


--A1L17 is add~1526
--operation mode is arithmetic

A1L17_carry_eqn = A1L46;
A1L17 = B1_Q[8] $ (!A1L17_carry_eqn);

--A1L27 is add~1528
--operation mode is arithmetic

A1L27 = CARRY(B1_Q[8] & (!A1L46));


--A1L342 is Mux~10203
--operation mode is normal

A1L342 = A1L861 & (A1L242 & (A1L17) # !A1L242 & A1L932) # !A1L861 & (A1L242);


--A1L442 is Mux~10204
--operation mode is normal

A1L442 = A1L342 & (OP[1] & !OP[3] # !OP[2]);


--M12L9 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~104
--operation mode is arithmetic

M12L9_carry_eqn = M12L8;
M12L9 = M51L31 $ M81L5 $ !M12L9_carry_eqn;

--M12L01 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~106
--operation mode is arithmetic

M12L01 = CARRY(M51L31 & (M81L5 # !M12L8) # !M51L31 & M81L5 & !M12L8);


--A1L542 is Mux~10205
--operation mode is normal

A1L542 = OP[0] & (OP[3] & M12L9 # !OP[3] & (B2_Q[8]));


--A1L642 is Mux~10206
--operation mode is normal

A1L642 = !OP[0] & (OP[3] & (!B2_Q[8]) # !OP[3] & (B1_Q[8] # B2_Q[8]));


--A1L742 is Mux~10207
--operation mode is normal

A1L742 = A1L442 # A1L851 & (A1L542 # A1L642);


--A1L37 is add~1531
--operation mode is arithmetic

A1L37_carry_eqn = A1L07;
A1L37 = B1_Q[9] $ (!A1L37_carry_eqn);

--A1L47 is add~1533
--operation mode is arithmetic

A1L47 = CARRY(!B1_Q[9] & (!A1L07));


--A1L57 is add~1536
--operation mode is arithmetic

A1L57_carry_eqn = A1L66;
A1L57 = B2_Q[9] $ B1_Q[9] $ !A1L57_carry_eqn;

--A1L67 is add~1538
--operation mode is arithmetic

A1L67 = CARRY(B2_Q[9] & (B1_Q[9] # !A1L66) # !B2_Q[9] & B1_Q[9] & !A1L66);


--B1_Q[9] is reg:A_reg|Q[9]
--operation mode is normal

B1_Q[9]_lut_out = Dinput[9];
B1_Q[9] = DFFEAS(B1_Q[9]_lut_out, clk, reset, , B1L1, , , , );


--A1L842 is Mux~10208
--operation mode is normal

A1L842 = B1_Q[9] & (OP[0] $ (B2_Q[9] & !OP[3])) # !B1_Q[9] & OP[0] & (B2_Q[9] # OP[3]);


--A1L77 is add~1541
--operation mode is arithmetic

A1L77_carry_eqn = A1L86;
A1L77 = B2_Q[9] $ B1_Q[9] $ A1L77_carry_eqn;

--A1L87 is add~1543
--operation mode is arithmetic

A1L87 = CARRY(B2_Q[9] & B1_Q[9] & !A1L86 # !B2_Q[9] & (B1_Q[9] # !A1L86));


--A1L942 is Mux~10209
--operation mode is normal

A1L942 = OP[3] & (A1L842 & (A1L77) # !A1L842 & A1L57) # !OP[3] & (A1L842);


--F7L8 is sub16:l2|adder16:l1|add4:u3|sum[1]~114
--operation mode is normal

F7L8 = B2_Q[9] $ B1_Q[9];


--F7_sum[1] is sub16:l2|adder16:l1|add4:u3|sum[1]
--operation mode is normal

F7_sum[1] = F7L8 $ (B2_Q[8] & B1_Q[8] & C2L1 # !B2_Q[8] & (B1_Q[8] # C2L1));


--F3L1 is adder16:l1|add4:u3|c1~8
--operation mode is normal

F3L1 = B1_Q[8] & (C1L2 # F2L6 # B2_Q[8]) # !B1_Q[8] & B2_Q[8] & (C1L2 # F2L6);


--F3_sum[1] is adder16:l1|add4:u3|sum[1]
--operation mode is normal

F3_sum[1] = B2_Q[9] $ B1_Q[9] $ F3L1;


--A1L052 is Mux~10210
--operation mode is normal

A1L052 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & B2_Q[8] # !OP[3] & (F3_sum[1]));


--B2_Q[10] is reg:B_reg|Q[10]
--operation mode is normal

B2_Q[10]_lut_out = Dinput[10];
B2_Q[10] = DFFEAS(B2_Q[10]_lut_out, clk, reset, , B2L1, , , , );


--A1L152 is Mux~10211
--operation mode is normal

A1L152 = OP[0] & (A1L052 & (B2_Q[10]) # !A1L052 & !F7_sum[1]) # !OP[0] & (A1L052);


--A1L252 is Mux~10212
--operation mode is normal

A1L252 = A1L961 & (A1L861) # !A1L961 & (A1L861 & A1L942 # !A1L861 & (A1L152));


--A1L97 is add~1546
--operation mode is arithmetic

A1L97_carry_eqn = A1L27;
A1L97 = B1_Q[9] $ (A1L97_carry_eqn);

--A1L08 is add~1548
--operation mode is arithmetic

A1L08 = CARRY(!A1L27 # !B1_Q[9]);


--A1L352 is Mux~10213
--operation mode is normal

A1L352 = A1L961 & (A1L252 & (A1L97) # !A1L252 & A1L37) # !A1L961 & (A1L252);


--A1L452 is Mux~10214
--operation mode is normal

A1L452 = A1L352 & (OP[1] & !OP[3] # !OP[2]);


--M12L11 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~109
--operation mode is arithmetic

M12L11_carry_eqn = M12L01;
M12L11 = M51L51 $ M81L7 $ M12L11_carry_eqn;

--M12L21 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~111
--operation mode is arithmetic

M12L21 = CARRY(M51L51 & !M81L7 & !M12L01 # !M51L51 & (!M12L01 # !M81L7));


--A1L552 is Mux~10215
--operation mode is normal

A1L552 = OP[0] & (OP[3] & M12L11 # !OP[3] & (B2_Q[9]));


--A1L652 is Mux~10216
--operation mode is normal

A1L652 = !OP[0] & (OP[3] & (!B2_Q[9]) # !OP[3] & (B1_Q[9] # B2_Q[9]));


--A1L752 is Mux~10217
--operation mode is normal

A1L752 = A1L452 # A1L851 & (A1L552 # A1L652);