alu.fit.eqn

ALU可以实现16种操作（包括加减乘除移位运算等）

--A1L011 is add~1546 at LC_X9_Y12_N1
--operation mode is arithmetic

A1L011_carry_eqn = (!A1L88 & A1L99) # (A1L88 & A1L001);
A1L011 = B1_Q[9] $ A1L011_carry_eqn;

--A1L111 is add~1548 at LC_X9_Y12_N1
--operation mode is arithmetic

A1L111_cout_0 = !A1L99 # !B1_Q[9];
A1L111 = CARRY(A1L111_cout_0);

--A1L211 is add~1548COUT1_1709 at LC_X9_Y12_N1
--operation mode is arithmetic

A1L211_cout_1 = !A1L001 # !B1_Q[9];
A1L211 = CARRY(A1L211_cout_1);


--A1L703 is Mux~10213 at LC_X9_Y11_N7
--operation mode is normal

A1L703 = A1L603 & (A1L011 # !A1L322) # !A1L603 & (A1L101 & A1L322);


--A1L803 is Mux~10214 at LC_X12_Y10_N2
--operation mode is normal

A1L803 = A1L703 & (!OP[3] & OP[1] # !OP[2]);


--M12L51 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~109 at LC_X12_Y10_N9
--operation mode is arithmetic

M12L51_carry_eqn = (!M12L2 & M12L31) # (M12L2 & M12L41);
M12L51 = M51L12 $ M81L01 $ M12L51_carry_eqn;

--M12L61 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~111 at LC_X12_Y10_N9
--operation mode is arithmetic

M12L61 = CARRY(M51L12 & !M81L01 & !M12L41 # !M51L12 & (!M12L41 # !M81L01));


--A1L903 is Mux~10215 at LC_X12_Y10_N0
--operation mode is normal

A1L903 = OP[0] & (OP[3] & M12L51 # !OP[3] & (B2_Q[9]));


--A1L013 is Mux~10216 at LC_X12_Y10_N1
--operation mode is normal

A1L013 = !OP[0] & (OP[3] & !B2_Q[9] # !OP[3] & (B2_Q[9] # B1_Q[9]));


--A1L113 is Mux~10217 at LC_X12_Y10_N3
--operation mode is normal

A1L113 = A1L803 # A1L212 & (A1L903 # A1L013);


--A1L311 is add~1551 at LC_X10_Y10_N2
--operation mode is arithmetic

A1L311_carry_eqn = (!A1L48 & A1L501) # (A1L48 & A1L601);
A1L311 = B1_Q[10] $ B2_Q[10] $ A1L311_carry_eqn;

--A1L411 is add~1553 at LC_X10_Y10_N2
--operation mode is arithmetic

A1L411_cout_0 = B1_Q[10] & !B2_Q[10] & !A1L501 # !B1_Q[10] & (!A1L501 # !B2_Q[10]);
A1L411 = CARRY(A1L411_cout_0);

--A1L511 is add~1553COUT1_1737 at LC_X10_Y10_N2
--operation mode is arithmetic

A1L511_cout_1 = B1_Q[10] & !B2_Q[10] & !A1L601 # !B1_Q[10] & (!A1L601 # !B2_Q[10]);
A1L511 = CARRY(A1L511_cout_1);


--A1L213 is Mux~10218 at LC_X8_Y12_N8
--operation mode is normal

B1_Q[10]_qfbk = B1_Q[10];
A1L213 = OP[3] & (OP[0]) # !OP[3] & (B2_Q[10] & (B1_Q[10]_qfbk $ OP[0]) # !B2_Q[10] & B1_Q[10]_qfbk & OP[0]);

--B1_Q[10] is reg:A_reg|Q[10] at LC_X8_Y12_N8
--operation mode is normal

B1_Q[10] = DFFEAS(A1L213, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[10], , , VCC);


--A1L611 is add~1556 at LC_X10_Y12_N2
--operation mode is arithmetic

A1L611_carry_eqn = (!A1L68 & A1L801) # (A1L68 & A1L901);
A1L611 = B2_Q[10] $ B1_Q[10] $ !A1L611_carry_eqn;

--A1L711 is add~1558 at LC_X10_Y12_N2
--operation mode is arithmetic

A1L711_cout_0 = B2_Q[10] & (!A1L801 # !B1_Q[10]) # !B2_Q[10] & !B1_Q[10] & !A1L801;
A1L711 = CARRY(A1L711_cout_0);

--A1L811 is add~1558COUT1_1751 at LC_X10_Y12_N2
--operation mode is arithmetic

A1L811_cout_1 = B2_Q[10] & (!A1L901 # !B1_Q[10]) # !B2_Q[10] & !B1_Q[10] & !A1L901;
A1L811 = CARRY(A1L811_cout_1);


--A1L313 is Mux~10219 at LC_X8_Y12_N4
--operation mode is normal

A1L313 = OP[3] & (A1L213 & (A1L611) # !A1L213 & A1L311) # !OP[3] & A1L213;


--A1L911 is add~1561 at LC_X8_Y13_N2
--operation mode is arithmetic

A1L911_carry_eqn = (!A1L28 & A1L201) # (A1L28 & A1L301);
A1L911 = B1_Q[10] $ (A1L911_carry_eqn);

--A1L021 is add~1563 at LC_X8_Y13_N2
--operation mode is arithmetic

A1L021_cout_0 = B1_Q[10] # !A1L201;
A1L021 = CARRY(A1L021_cout_0);

--A1L121 is add~1563COUT1_1723 at LC_X8_Y13_N2
--operation mode is arithmetic

A1L121_cout_1 = B1_Q[10] # !A1L301;
A1L121 = CARRY(A1L121_cout_1);


--F7_temp0 is sub16:l2|adder16:l1|add4:u3|temp0 at LC_X9_Y10_N6
--operation mode is normal

F7_temp0 = B1_Q[9] # !B2_Q[9];


--F7L61 is sub16:l2|adder16:l1|add4:u3|temp2~3 at LC_X9_Y10_N2
--operation mode is normal

F7L61 = C2L1 & F7_temp0 & (B1_Q[8] # !B2_Q[8]);


--F7L51 is sub16:l2|adder16:l1|add4:u3|temp1~17 at LC_X10_Y10_N9
--operation mode is normal

F7L51 = !B2_Q[8] & B1_Q[8] & (B1_Q[9] # !B2_Q[9]);


--F7L71 is sub16:l2|adder16:l1|add4:u3|temp3~37 at LC_X8_Y11_N4
--operation mode is normal

F7L71 = !B2_Q[9] & B1_Q[9];


--F7L01 is sub16:l2|adder16:l1|add4:u3|sum[2]~115 at LC_X8_Y10_N7
--operation mode is normal

F7L01 = B1_Q[10] $ (B2_Q[10]);


--F7_sum[2] is sub16:l2|adder16:l1|add4:u3|sum[2] at LC_X8_Y11_N6
--operation mode is normal

F7_sum[2] = F7L01 $ (F7L61 # F7L71 # F7L51);


--F3L31 is adder16:l1|add4:u3|temp2~4 at LC_X10_Y12_N9
--operation mode is normal

F3L31 = B2_Q[9] & (B2_Q[8] # B1_Q[8]) # !B2_Q[9] & B1_Q[9] & (B2_Q[8] # B1_Q[8]);


--F3L2 is adder16:l1|add4:u3|c2~14 at LC_X9_Y12_N9
--operation mode is normal

F3L2 = B2_Q[9] & (B1_Q[9] # B1_Q[8] & B2_Q[8]) # !B2_Q[9] & B1_Q[8] & B1_Q[9] & B2_Q[8];


--F3_sum[2] is adder16:l1|add4:u3|sum[2] at LC_X8_Y11_N2
--operation mode is normal

F3_sum[2] = F7L01 $ (F3L2 # C1L1 & F3L31);


--A1L413 is Mux~10220 at LC_X8_Y11_N3
--operation mode is normal

A1L413 = OP[0] & OP[3] # !OP[0] & (OP[3] & B2_Q[9] # !OP[3] & (F3_sum[2]));


--A1L513 is Mux~10221 at LC_X8_Y11_N5
--operation mode is normal

B2_Q[11]_qfbk = B2_Q[11];
A1L513 = OP[0] & (A1L413 & B2_Q[11]_qfbk # !A1L413 & (!F7_sum[2])) # !OP[0] & A1L413;

--B2_Q[11] is reg:B_reg|Q[11] at LC_X8_Y11_N5
--operation mode is normal

B2_Q[11] = DFFEAS(A1L513, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[11], , , VCC);


--A1L613 is Mux~10222 at LC_X8_Y12_N1
--operation mode is normal

A1L613 = A1L322 & (A1L911 # A1L222) # !A1L322 & (A1L513 & !A1L222);


--A1L221 is add~1566 at LC_X9_Y12_N2
--operation mode is arithmetic

A1L221_carry_eqn = (!A1L88 & A1L111) # (A1L88 & A1L211);
A1L221 = B1_Q[10] $ (!A1L221_carry_eqn);

--A1L321 is add~1568 at LC_X9_Y12_N2
--operation mode is arithmetic

A1L321_cout_0 = B1_Q[10] & (!A1L111);
A1L321 = CARRY(A1L321_cout_0);

--A1L421 is add~1568COUT1_1710 at LC_X9_Y12_N2
--operation mode is arithmetic

A1L421_cout_1 = B1_Q[10] & (!A1L211);
A1L421 = CARRY(A1L421_cout_1);


--A1L713 is Mux~10223 at LC_X8_Y12_N5
--operation mode is normal

A1L713 = A1L613 & (A1L221 # !A1L222) # !A1L613 & A1L222 & (A1L313);


--A1L813 is Mux~10224 at LC_X8_Y12_N9
--operation mode is normal

A1L813 = A1L713 & (!OP[3] & OP[1] # !OP[2]);


--M12L71 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~114 at LC_X12_Y9_N0
--operation mode is arithmetic

M12L71_carry_eqn = M12L61;
M12L71 = M81L31 $ M51L42 $ !M12L71_carry_eqn;

--M12L81 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~116 at LC_X12_Y9_N0
--operation mode is arithmetic

M12L81_cout_0 = M81L31 & (M51L42 # !M12L61) # !M81L31 & M51L42 & !M12L61;
M12L81 = CARRY(M12L81_cout_0);

--M12L91 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~116COUT1_149 at LC_X12_Y9_N0
--operation mode is arithmetic

M12L91_cout_1 = M81L31 & (M51L42 # !M12L61) # !M81L31 & M51L42 & !M12L61;
M12L91 = CARRY(M12L91_cout_1);


--A1L913 is Mux~10225 at LC_X12_Y9_N7
--operation mode is normal

A1L913 = OP[0] & (OP[3] & (M12L71) # !OP[3] & B2_Q[10]);


--A1L023 is Mux~10226 at LC_X8_Y12_N2
--operation mode is normal

A1L023 = !OP[0] & (OP[3] & !B2_Q[10] # !OP[3] & (B2_Q[10] # B1_Q[10]));


--A1L123 is Mux~10227 at LC_X8_Y12_N7
--operation mode is normal

A1L123 = A1L813 # A1L212 & (A1L913 # A1L023);


--A1L521 is add~1571 at LC_X8_Y13_N3
--operation mode is arithmetic

A1L521_carry_eqn = (!A1L28 & A1L021) # (A1L28 & A1L121);
A1L521 = B1_Q[11] $ !A1L521_carry_eqn;

--A1L621 is add~1573 at LC_X8_Y13_N3
--operation mode is arithmetic

A1L621_cout_0 = !B1_Q[11] & !A1L021;
A1L621 = CARRY(A1L621_cout_0);

--A1L721 is add~1573COUT1_1724 at LC_X8_Y13_N3
--operation mode is arithmetic

A1L721_cout_1 = !B1_Q[11] & !A1L121;
A1L721 = CARRY(A1L721_cout_1);


--A1L821 is add~1576 at LC_X10_Y10_N3
--operation mode is arithmetic

A1L821_carry_eqn = (!A1L48 & A1L411) # (A1L48 & A1L511);
A1L821 = B2_Q[11] $ B1_Q[11] $ !A1L821_carry_eqn;

--A1L921 is add~1578 at LC_X10_Y10_N3
--operation mode is arithmetic

A1L921_cout_0 = B2_Q[11] & (B1_Q[11] # !A1L411) # !B2_Q[11] & B1_Q[11] & !A1L411;
A1L921 = CARRY(A1L921_cout_0);

--A1L031 is add~1578COUT1_1738 at LC_X10_Y10_N3
--operation mode is arithmetic

A1L031_cout_1 = B2_Q[11] & (B1_Q[11] # !A1L511) # !B2_Q[11] & B1_Q[11] & !A1L511;
A1L031 = CARRY(A1L031_cout_1);


--A1L223 is Mux~10228 at LC_X8_Y11_N1
--operation mode is normal

B1_Q[11]_qfbk = B1_Q[11];
A1L223 = OP[0] & (OP[3] # B1_Q[11]_qfbk $ B2_Q[11]) # !OP[0] & !OP[3] & B1_Q[11]_qfbk & B2_Q[11];

--B1_Q[11] is reg:A_reg|Q[11] at LC_X8_Y11_N1
--operation mode is normal

B1_Q[11] = DFFEAS(A1L223, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[11], , , VCC);


--A1L131 is add~1581 at LC_X10_Y12_N3
--operation mode is arithmetic

A1L131_carry_eqn = (!A1L68 & A1L711) # (A1L68 & A1L811);
A1L131 = B2_Q[11] $ B1_Q[11] $ A1L131_carry_eqn;

--A1L231 is add~1583 at LC_X10_Y12_N3
--operation mode is arithmetic

A1L231_cout_0 = B2_Q[11] & B1_Q[11] & !A1L711 # !B2_Q[11] & (B1_Q[11] # !A1L711);
A1L231 = CARRY(A1L231_cout_0);

--A1L331 is add~1583COUT1_1752 at LC_X10_Y12_N3
--operation mode is arithmetic

A1L331_cout_1 = B2_Q[11] & B1_Q[11] & !A1L811 # !B2_Q[11] & (B1_Q[11] # !A1L811);
A1L331 = CARRY(A1L331_cout_1);


--A1L323 is Mux~10229 at LC_X8_Y11_N9
--operation mode is normal

A1L323 = OP[3] & (A1L223 & A1L131 # !A1L223 & (A1L821)) # !OP[3] & (A1L223);


--F7L11 is sub16:l2|adder16:l1|add4:u3|sum[3]~116 at LC_X9_Y9_N3
--operation mode is normal

F7L11 = B2_Q[11] $ B1_Q[11];


--F7L21 is sub16:l2|adder16:l1|add4:u3|sum[3]~117 at LC_X8_Y10_N9
--operation mode is normal

F7L21 = F7L11 $ (B1_Q[10] & (F7L31 # !B2_Q[10]) # !B1_Q[10] & !B2_Q[10] & F7L31);


--F3L51 is adder16:l1|add4:u3|temp5~6 at LC_X8_Y10_N4
--operation mode is normal

F3L51 = F3L31 & (B1_Q[10] # B2_Q[10]);


--F3L3 is adder16:l1|add4:u3|c3~24 at LC_X8_Y10_N6
--operation mode is normal

F3L3 = B1_Q[10] & (B2_Q[10] # B1_Q[9] & B2_Q[9]) # !B1_Q[10] & B2_Q[10] & B1_Q[9] & B2_Q[9];


--F3L41 is adder16:l1|add4:u3|temp4~58 at LC_X9_Y10_N4
--operation mode is normal

F3L41 = B2_Q[8] & B1_Q[8] & (B2_Q[9] # B1_Q[9]);


--F3L4 is adder16:l1|add4:u3|c3~25 at LC_X8_Y10_N3
--operation mode is normal

F3L4 = F3L3 # F3L41 & (B2_Q[10] # B1_Q[10]);


--F3_sum[3] is adder16:l1|add4:u3|sum[3] at LC_X8_Y10_N5
--operation mode is normal

F3_sum[3] = F7L11 $ (F3L4 # C1L1 & F3L51);


--A1L423 is Mux~10230 at LC_X7_Y9_N6
--operation mode is normal

A1L423 = OP[0] & (OP[3]) # !OP[0] & (OP[3] & (B2_Q[10]) # !OP[3] & F3_sum[3]);


--A1L523 is Mux~10231 at LC_X7_Y9_N4
--operation mode is normal

B2_Q[12]_qfbk = B2_Q[12];
A1L523 = A1L423 & (B2_Q[12]_qfbk # !OP[0]) # !A1L423 & OP[0] & (!F7L21);

--B2_Q[12] is reg:B_reg|Q[12] at LC_X7_Y9_N4
--operation mode is normal

B2_Q[12] = DFFEAS(A1L523, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[12], , , VCC);


--A1L623 is Mux~10232 at LC_X8_Y11_N8
--operation mode is normal

A1L623 = A1L322 & (A1L222) # !A1L322 & (A1L222 & A1L323 # !A1L222 & (A1L523));


--A1L431 is add~1586 at LC_X9_Y12_N3
--operation mode is arithmetic

A1L431_carry_eqn = (!A1L88 & A1L321) # (A1L88 & A1L421);
A1L431 = B1_Q[11] $ A1L431_carry_eqn;

--A1L531 is add~1588 at LC_X9_Y12_N3
--operation mode is arithmetic

A1L531_cout_0 = !A1L321 # !B1_Q[11];
A1L531 = CARRY(A1L531_cout_0);

--A1L631 is add~1588COUT1_1711 at LC_X9_Y12_N3
--operation mode is arithmetic

A1L631_cout_1 = !A1L421 # !B1_Q[11];
A1L631 = CARRY(A1L631_cout_1);


--A1L723 is Mux~10233 at LC_X8_Y11_N7
--operation mode is normal

A1L723 = A1L623 & (A1L431 # !A1L322) # !A1L623 & A1L521 & A1L322;


--A1L823 is Mux~10234 at LC_X9_Y14_N1
--operation mode is normal

A1L823 = A1L723 & (!OP[3] & OP[1] # !OP[2]);


--M12L02 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~119 at LC_X12_Y9_N1
--operation mode is arithmetic

M12L02_carry_eqn = (!M12L61 & M12L81) # (M12L61 & M12L91);
M12L02 = M81L51 $ M51L72 $ M12L02_carry_eqn;

--M12L12 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~121 at LC_X12_Y9_N1
--operation mode is arithmetic

M12L12_cout_0 = M81L51 & !M51L72 & !M12L81 # !M81L51 & (!M12L81 # !M51L72);
M12L12 = CARRY(M12L12_cout_0);

--M12L22 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~121COUT1_150 at LC_X12_Y9_N1
--operation mode is arithmetic

M12L22_cout_1 = M81L51 & !M51L72 & !M12L91 # !M81L51 & (!M12L91 # !M51L72);
M12L22 =