alu.fit.eqn

ALU可以实现16种操作（包括加减乘除移位运算等）

--operation mode is normal

F6L41 = B2_Q[6] & (B1_Q[6] & F6L31) # !B2_Q[6] & (B1_Q[6] # F6L31);


--F6L51 is sub16:l2|adder16:l1|add4:u2|sum[3]~129 at LC_X11_Y9_N0
--operation mode is normal

F6L51 = B1_Q[7] $ B2_Q[7] $ (F6L91 # F6L41);


--F2L4 is adder16:l1|add4:u2|c3~24 at LC_X10_Y13_N0
--operation mode is normal

F2L4 = B2_Q[6] & (B1_Q[6] # B1_Q[5] & B2_Q[5]) # !B2_Q[6] & B1_Q[5] & B2_Q[5] & B1_Q[6];


--A1L714 is result_t~38 at LC_X11_Y10_N8
--operation mode is normal

A1L714 = B1_Q[6] # B2_Q[6];


--F2L41 is adder16:l1|add4:u2|temp4~45 at LC_X11_Y10_N4
--operation mode is normal

F2L41 = B2_Q[4] & B1_Q[4] & (B2_Q[5] # B1_Q[5]);


--F2_c3 is adder16:l1|add4:u2|c3 at LC_X11_Y10_N6
--operation mode is normal

F2_c3 = F2L4 # A1L714 & (F2L31 # F2L41);


--F2_sum[3] is adder16:l1|add4:u2|sum[3] at LC_X11_Y10_N7
--operation mode is normal

F2_sum[3] = B1_Q[7] $ B2_Q[7] $ (F2_c3);


--A1L482 is Mux~10190 at LC_X7_Y13_N5
--operation mode is normal

A1L482 = OP[3] & (OP[0]) # !OP[3] & (OP[0] & (!F6L51) # !OP[0] & F2_sum[3]);


--A1L582 is Mux~10191 at LC_X7_Y13_N8
--operation mode is normal

B2_Q[8]_qfbk = B2_Q[8];
A1L582 = OP[3] & (A1L482 & (B2_Q[8]_qfbk) # !A1L482 & B2_Q[6]) # !OP[3] & (A1L482);

--B2_Q[8] is reg:B_reg|Q[8] at LC_X7_Y13_N8
--operation mode is normal

B2_Q[8] = DFFEAS(A1L582, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[8], , , VCC);


--A1L682 is Mux~10192 at LC_X11_Y13_N2
--operation mode is normal

A1L682 = A1L222 & (A1L382 # A1L322) # !A1L222 & A1L582 & (!A1L322);


--A1L78 is add~1506 at LC_X9_Y13_N9
--operation mode is arithmetic

A1L78_carry_eqn = (!A1L23 & A1L97) # (A1L23 & A1L08);
A1L78 = B1_Q[7] $ (A1L78_carry_eqn);

--A1L88 is add~1508 at LC_X9_Y13_N9
--operation mode is arithmetic

A1L88 = CARRY(!A1L08 # !B1_Q[7]);


--A1L782 is Mux~10193 at LC_X9_Y13_N0
--operation mode is normal

A1L782 = A1L682 & (A1L78 # !A1L322) # !A1L682 & (A1L322 & A1L18);


--A1L882 is Mux~10194 at LC_X9_Y14_N5
--operation mode is normal

A1L882 = A1L782 & (!OP[3] & OP[1] # !OP[2]);


--M12L9 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~99 at LC_X12_Y10_N7
--operation mode is arithmetic

M12L9_carry_eqn = (!M12L2 & M12L7) # (M12L2 & M12L8);
M12L9 = M81L4 $ M51L51 $ M12L9_carry_eqn;

--M12L01 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~101 at LC_X12_Y10_N7
--operation mode is arithmetic

M12L01_cout_0 = M81L4 & !M51L51 & !M12L7 # !M81L4 & (!M12L7 # !M51L51);
M12L01 = CARRY(M12L01_cout_0);

--M12L11 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~101COUT1_147 at LC_X12_Y10_N7
--operation mode is arithmetic

M12L11_cout_1 = M81L4 & !M51L51 & !M12L8 # !M81L4 & (!M12L8 # !M51L51);
M12L11 = CARRY(M12L11_cout_1);


--A1L982 is Mux~10195 at LC_X11_Y13_N5
--operation mode is normal

A1L982 = OP[0] & (OP[3] & (M12L9) # !OP[3] & B2_Q[7]);


--A1L092 is Mux~10196 at LC_X11_Y13_N3
--operation mode is normal

A1L092 = !OP[0] & (OP[3] & (!B2_Q[7]) # !OP[3] & (B1_Q[7] # B2_Q[7]));


--A1L192 is Mux~10197 at LC_X11_Y13_N4
--operation mode is normal

A1L192 = A1L882 # A1L212 & (A1L982 # A1L092);


--A1L98 is add~1511 at LC_X10_Y10_N0
--operation mode is arithmetic

A1L98_carry_eqn = A1L48;
A1L98 = B1_Q[8] $ B2_Q[8] $ A1L98_carry_eqn;

--A1L09 is add~1513 at LC_X10_Y10_N0
--operation mode is arithmetic

A1L09_cout_0 = B1_Q[8] & !B2_Q[8] & !A1L48 # !B1_Q[8] & (!A1L48 # !B2_Q[8]);
A1L09 = CARRY(A1L09_cout_0);

--A1L19 is add~1513COUT1_1735 at LC_X10_Y10_N0
--operation mode is arithmetic

A1L19_cout_1 = B1_Q[8] & !B2_Q[8] & !A1L48 # !B1_Q[8] & (!A1L48 # !B2_Q[8]);
A1L19 = CARRY(A1L19_cout_1);


--A1L292 is Mux~10198 at LC_X7_Y13_N9
--operation mode is normal

B1_Q[8]_qfbk = B1_Q[8];
A1L292 = OP[0] & (OP[3] # B2_Q[8] $ B1_Q[8]_qfbk) # !OP[0] & B2_Q[8] & B1_Q[8]_qfbk & !OP[3];

--B1_Q[8] is reg:A_reg|Q[8] at LC_X7_Y13_N9
--operation mode is normal

B1_Q[8] = DFFEAS(A1L292, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[8], , , VCC);


--A1L29 is add~1516 at LC_X10_Y12_N0
--operation mode is arithmetic

A1L29_carry_eqn = A1L68;
A1L29 = B1_Q[8] $ B2_Q[8] $ !A1L29_carry_eqn;

--A1L39 is add~1518 at LC_X10_Y12_N0
--operation mode is arithmetic

A1L39_cout_0 = B1_Q[8] & B2_Q[8] & !A1L68 # !B1_Q[8] & (B2_Q[8] # !A1L68);
A1L39 = CARRY(A1L39_cout_0);

--A1L49 is add~1518COUT1_1749 at LC_X10_Y12_N0
--operation mode is arithmetic

A1L49_cout_1 = B1_Q[8] & B2_Q[8] & !A1L68 # !B1_Q[8] & (B2_Q[8] # !A1L68);
A1L49 = CARRY(A1L49_cout_1);


--A1L392 is Mux~10199 at LC_X7_Y13_N6
--operation mode is normal

A1L392 = A1L292 & (A1L29 # !OP[3]) # !A1L292 & OP[3] & (A1L98);


--A1L59 is add~1521 at LC_X8_Y13_N0
--operation mode is arithmetic

A1L59_carry_eqn = A1L28;
A1L59 = B1_Q[8] $ (A1L59_carry_eqn);

--A1L69 is add~1523 at LC_X8_Y13_N0
--operation mode is arithmetic

A1L69_cout_0 = B1_Q[8] # !A1L28;
A1L69 = CARRY(A1L69_cout_0);

--A1L79 is add~1523COUT1_1721 at LC_X8_Y13_N0
--operation mode is arithmetic

A1L79_cout_1 = B1_Q[8] # !A1L28;
A1L79 = CARRY(A1L79_cout_1);


--F6L4 is sub16:l2|adder16:l1|add4:u2|g~228 at LC_X11_Y11_N2
--operation mode is normal

F6L4 = B2_Q[7] & !B2_Q[6] & B1_Q[6] & B1_Q[7] # !B2_Q[7] & (B1_Q[7] # !B2_Q[6] & B1_Q[6]);


--F6L3 is sub16:l2|adder16:l1|add4:u2|g~1 at LC_X11_Y9_N7
--operation mode is normal

F6L3 = B1_Q[7] # !B2_Q[7];


--F6L5 is sub16:l2|adder16:l1|add4:u2|g~229 at LC_X11_Y11_N0
--operation mode is normal

F6L5 = F6L4 # F6L3 & !F6L2 & F6L71;


--C2L1 is sub16:l2|adder16:l1|c8~25 at LC_X11_Y9_N5
--operation mode is normal

C2L1 = F6L5 # F6_p & (F5L6 # C2L2);


--F7_sum[0] is sub16:l2|adder16:l1|add4:u3|sum[0] at LC_X9_Y11_N4
--operation mode is normal

F7_sum[0] = C2L1 $ B2_Q[8] $ (B1_Q[8]);


--H1_decoder_node[5][5] is lpm_mult:mult_rtl_0|multcore:mult_core|decoder_node[5][5] at LC_X14_Y10_N7
--operation mode is normal

H1_decoder_node[5][5] = LCELL(B2_Q[5] & (B1_Q[5]));


--F2L5 is adder16:l1|add4:u2|g~177 at LC_X11_Y10_N2
--operation mode is normal

F2L5 = B1_Q[6] & (H1_decoder_node[5][5] # F2L41 # B2_Q[6]) # !B1_Q[6] & B2_Q[6] & (H1_decoder_node[5][5] # F2L41);


--F2L6 is adder16:l1|add4:u2|g~178 at LC_X11_Y10_N5
--operation mode is normal

F2L6 = B2_Q[7] & (F2L5 # B1_Q[7]) # !B2_Q[7] & F2L5 & B1_Q[7];


--C1L2 is adder16:l1|c8~24 at LC_X11_Y10_N9
--operation mode is normal

C1L2 = F2L31 & A1L714 & (B1_Q[7] # B2_Q[7]);


--F3_sum[0] is adder16:l1|add4:u3|sum[0] at LC_X9_Y11_N6
--operation mode is normal

F3_sum[0] = B1_Q[8] $ B2_Q[8] $ (F2L6 # C1L2);


--A1L492 is Mux~10200 at LC_X9_Y11_N5
--operation mode is normal

A1L492 = OP[0] & OP[3] # !OP[0] & (OP[3] & B2_Q[7] # !OP[3] & (F3_sum[0]));


--A1L592 is Mux~10201 at LC_X9_Y11_N0
--operation mode is normal

B2_Q[9]_qfbk = B2_Q[9];
A1L592 = OP[0] & (A1L492 & (B2_Q[9]_qfbk) # !A1L492 & !F7_sum[0]) # !OP[0] & (A1L492);

--B2_Q[9] is reg:B_reg|Q[9] at LC_X9_Y11_N0
--operation mode is normal

B2_Q[9] = DFFEAS(A1L592, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[9], , , VCC);


--A1L692 is Mux~10202 at LC_X7_Y13_N0
--operation mode is normal

A1L692 = A1L222 & (A1L322) # !A1L222 & (A1L322 & (A1L59) # !A1L322 & A1L592);


--A1L89 is add~1526 at LC_X9_Y12_N0
--operation mode is arithmetic

A1L89_carry_eqn = A1L88;
A1L89 = B1_Q[8] $ (!A1L89_carry_eqn);

--A1L99 is add~1528 at LC_X9_Y12_N0
--operation mode is arithmetic

A1L99_cout_0 = B1_Q[8] & (!A1L88);
A1L99 = CARRY(A1L99_cout_0);

--A1L001 is add~1528COUT1_1708 at LC_X9_Y12_N0
--operation mode is arithmetic

A1L001_cout_1 = B1_Q[8] & (!A1L88);
A1L001 = CARRY(A1L001_cout_1);


--A1L792 is Mux~10203 at LC_X7_Y13_N7
--operation mode is normal

A1L792 = A1L222 & (A1L692 & (A1L89) # !A1L692 & A1L392) # !A1L222 & (A1L692);


--A1L892 is Mux~10204 at LC_X7_Y13_N3
--operation mode is normal

A1L892 = A1L792 & (OP[1] & !OP[3] # !OP[2]);


--M12L21 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~104 at LC_X12_Y10_N8
--operation mode is arithmetic

M12L21_carry_eqn = (!M12L2 & M12L01) # (M12L2 & M12L11);
M12L21 = M51L81 $ M81L7 $ !M12L21_carry_eqn;

--M12L31 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~106 at LC_X12_Y10_N8
--operation mode is arithmetic

M12L31_cout_0 = M51L81 & (M81L7 # !M12L01) # !M51L81 & M81L7 & !M12L01;
M12L31 = CARRY(M12L31_cout_0);

--M12L41 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~106COUT1_148 at LC_X12_Y10_N8
--operation mode is arithmetic

M12L41_cout_1 = M51L81 & (M81L7 # !M12L11) # !M51L81 & M81L7 & !M12L11;
M12L41 = CARRY(M12L41_cout_1);


--A1L992 is Mux~10205 at LC_X7_Y13_N1
--operation mode is normal

A1L992 = OP[0] & (OP[3] & (M12L21) # !OP[3] & B2_Q[8]);


--A1L003 is Mux~10206 at LC_X7_Y13_N2
--operation mode is normal

A1L003 = !OP[0] & (OP[3] & !B2_Q[8] # !OP[3] & (B2_Q[8] # B1_Q[8]));


--A1L103 is Mux~10207 at LC_X7_Y13_N4
--operation mode is normal

A1L103 = A1L892 # A1L212 & (A1L992 # A1L003);


--A1L101 is add~1531 at LC_X8_Y13_N1
--operation mode is arithmetic

A1L101_carry_eqn = (!A1L28 & A1L69) # (A1L28 & A1L79);
A1L101 = B1_Q[9] $ (!A1L101_carry_eqn);

--A1L201 is add~1533 at LC_X8_Y13_N1
--operation mode is arithmetic

A1L201_cout_0 = !B1_Q[9] & (!A1L69);
A1L201 = CARRY(A1L201_cout_0);

--A1L301 is add~1533COUT1_1722 at LC_X8_Y13_N1
--operation mode is arithmetic

A1L301_cout_1 = !B1_Q[9] & (!A1L79);
A1L301 = CARRY(A1L301_cout_1);


--A1L401 is add~1536 at LC_X10_Y10_N1
--operation mode is arithmetic

A1L401_carry_eqn = (!A1L48 & A1L09) # (A1L48 & A1L19);
A1L401 = B2_Q[9] $ B1_Q[9] $ !A1L401_carry_eqn;

--A1L501 is add~1538 at LC_X10_Y10_N1
--operation mode is arithmetic

A1L501_cout_0 = B2_Q[9] & (B1_Q[9] # !A1L09) # !B2_Q[9] & B1_Q[9] & !A1L09;
A1L501 = CARRY(A1L501_cout_0);

--A1L601 is add~1538COUT1_1736 at LC_X10_Y10_N1
--operation mode is arithmetic

A1L601_cout_1 = B2_Q[9] & (B1_Q[9] # !A1L19) # !B2_Q[9] & B1_Q[9] & !A1L19;
A1L601 = CARRY(A1L601_cout_1);


--A1L203 is Mux~10208 at LC_X9_Y11_N9
--operation mode is normal

B1_Q[9]_qfbk = B1_Q[9];
A1L203 = OP[3] & (OP[0]) # !OP[3] & (B2_Q[9] & (B1_Q[9]_qfbk $ OP[0]) # !B2_Q[9] & B1_Q[9]_qfbk & OP[0]);

--B1_Q[9] is reg:A_reg|Q[9] at LC_X9_Y11_N9
--operation mode is normal

B1_Q[9] = DFFEAS(A1L203, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[9], , , VCC);


--A1L701 is add~1541 at LC_X10_Y12_N1
--operation mode is arithmetic

A1L701_carry_eqn = (!A1L68 & A1L39) # (A1L68 & A1L49);
A1L701 = B2_Q[9] $ B1_Q[9] $ A1L701_carry_eqn;

--A1L801 is add~1543 at LC_X10_Y12_N1
--operation mode is arithmetic

A1L801_cout_0 = B2_Q[9] & B1_Q[9] & !A1L39 # !B2_Q[9] & (B1_Q[9] # !A1L39);
A1L801 = CARRY(A1L801_cout_0);

--A1L901 is add~1543COUT1_1750 at LC_X10_Y12_N1
--operation mode is arithmetic

A1L901_cout_1 = B2_Q[9] & B1_Q[9] & !A1L49 # !B2_Q[9] & (B1_Q[9] # !A1L49);
A1L901 = CARRY(A1L901_cout_1);


--A1L303 is Mux~10209 at LC_X9_Y11_N8
--operation mode is normal

A1L303 = OP[3] & (A1L203 & (A1L701) # !A1L203 & A1L401) # !OP[3] & (A1L203);


--F7L8 is sub16:l2|adder16:l1|add4:u3|sum[1]~114 at LC_X9_Y10_N5
--operation mode is normal

F7L8 = B2_Q[9] $ B1_Q[9];


--F7_sum[1] is sub16:l2|adder16:l1|add4:u3|sum[1] at LC_X9_Y10_N9
--operation mode is normal

F7_sum[1] = F7L8 $ (C2L1 & (B1_Q[8] # !B2_Q[8]) # !C2L1 & !B2_Q[8] & B1_Q[8]);


--F3L1 is adder16:l1|add4:u3|c1~8 at LC_X9_Y11_N1
--operation mode is normal

F3L1 = B1_Q[8] & (F2L6 # C1L2 # B2_Q[8]) # !B1_Q[8] & B2_Q[8] & (F2L6 # C1L2);


--F3_sum[1] is adder16:l1|add4:u3|sum[1] at LC_X9_Y11_N2
--operation mode is normal

F3_sum[1] = B1_Q[9] $ B2_Q[9] $ (F3L1);


--A1L403 is Mux~10210 at LC_X8_Y12_N0
--operation mode is normal

A1L403 = OP[0] & OP[3] # !OP[0] & (OP[3] & B2_Q[8] # !OP[3] & (F3_sum[1]));


--A1L503 is Mux~10211 at LC_X8_Y12_N3
--operation mode is normal

B2_Q[10]_qfbk = B2_Q[10];
A1L503 = OP[0] & (A1L403 & B2_Q[10]_qfbk # !A1L403 & (!F7_sum[1])) # !OP[0] & A1L403;

--B2_Q[10] is reg:B_reg|Q[10] at LC_X8_Y12_N3
--operation mode is normal

B2_Q[10] = DFFEAS(A1L503, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[10], , , VCC);


--A1L603 is Mux~10212 at LC_X9_Y11_N3
--operation mode is normal

A1L603 = A1L222 & (A1L303 # A1L322) # !A1L222 & A1L503 & (!A1L322);