alu.fit.eqn

ALU可以实现16种操作（包括加减乘除移位运算等）

A1L85 = CARRY(A1L85_cout_0);

--A1L95 is add~1453COUT1_1719 at LC_X8_Y14_N7
--operation mode is arithmetic

A1L95_cout_1 = !B1_Q[5] & (!A1L35);
A1L95 = CARRY(A1L95_cout_1);


--A1L06 is add~1456 at LC_X10_Y11_N7
--operation mode is arithmetic

A1L06_carry_eqn = (!A1L62 & A1L64) # (A1L62 & A1L74);
A1L06 = B2_Q[5] $ B1_Q[5] $ !A1L06_carry_eqn;

--A1L16 is add~1458 at LC_X10_Y11_N7
--operation mode is arithmetic

A1L16_cout_0 = B2_Q[5] & (B1_Q[5] # !A1L64) # !B2_Q[5] & B1_Q[5] & !A1L64;
A1L16 = CARRY(A1L16_cout_0);

--A1L26 is add~1458COUT1_1733 at LC_X10_Y11_N7
--operation mode is arithmetic

A1L26_cout_1 = B2_Q[5] & (B1_Q[5] # !A1L74) # !B2_Q[5] & B1_Q[5] & !A1L74;
A1L26 = CARRY(A1L26_cout_1);


--A1L262 is Mux~10168 at LC_X11_Y13_N8
--operation mode is normal

B1_Q[5]_qfbk = B1_Q[5];
A1L262 = OP[3] & OP[0] # !OP[3] & (OP[0] & (B1_Q[5]_qfbk $ B2_Q[5]) # !OP[0] & B1_Q[5]_qfbk & B2_Q[5]);

--B1_Q[5] is reg:A_reg|Q[5] at LC_X11_Y13_N8
--operation mode is normal

B1_Q[5] = DFFEAS(A1L262, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[5], , , VCC);


--A1L36 is add~1461 at LC_X10_Y13_N7
--operation mode is arithmetic

A1L36_carry_eqn = (!A1L82 & A1L94) # (A1L82 & A1L05);
A1L36 = B1_Q[5] $ B2_Q[5] $ A1L36_carry_eqn;

--A1L46 is add~1463 at LC_X10_Y13_N7
--operation mode is arithmetic

A1L46_cout_0 = B1_Q[5] & (!A1L94 # !B2_Q[5]) # !B1_Q[5] & !B2_Q[5] & !A1L94;
A1L46 = CARRY(A1L46_cout_0);

--A1L56 is add~1463COUT1_1747 at LC_X10_Y13_N7
--operation mode is arithmetic

A1L56_cout_1 = B1_Q[5] & (!A1L05 # !B2_Q[5]) # !B1_Q[5] & !B2_Q[5] & !A1L05;
A1L56 = CARRY(A1L56_cout_1);


--A1L362 is Mux~10169 at LC_X10_Y11_N0
--operation mode is normal

A1L362 = OP[3] & (A1L262 & (A1L36) # !A1L262 & A1L06) # !OP[3] & (A1L262);


--F6L1 is sub16:l2|adder16:l1|add4:u2|c1~4 at LC_X11_Y14_N0
--operation mode is normal

F6L1 = B1_Q[4] & (F5L6 # C2L2) # !B1_Q[4] & !B2_Q[4] & (F5L6 # C2L2);


--F6L81 is sub16:l2|adder16:l1|add4:u2|temp4~56 at LC_X11_Y11_N9
--operation mode is normal

F6L81 = !B2_Q[4] & B1_Q[4];


--F6_sum[1] is sub16:l2|adder16:l1|add4:u2|sum[1] at LC_X11_Y11_N8
--operation mode is normal

F6_sum[1] = B2_Q[5] $ B1_Q[5] $ (F6L81 # F6L1);


--F2L1 is adder16:l1|add4:u2|c1~8 at LC_X11_Y14_N4
--operation mode is normal

F2L1 = B1_Q[4] & (B2_Q[4] # F1L7 # F1L4) # !B1_Q[4] & B2_Q[4] & (F1L7 # F1L4);


--F2_sum[1] is adder16:l1|add4:u2|sum[1] at LC_X12_Y13_N8
--operation mode is normal

F2_sum[1] = B1_Q[5] $ B2_Q[5] $ F2L1;


--A1L462 is Mux~10170 at LC_X11_Y12_N2
--operation mode is normal

A1L462 = OP[0] & (OP[3] # !F6_sum[1]) # !OP[0] & (F2_sum[1] & !OP[3]);


--A1L562 is Mux~10171 at LC_X11_Y12_N4
--operation mode is normal

B2_Q[6]_qfbk = B2_Q[6];
A1L562 = A1L462 & (B2_Q[6]_qfbk # !OP[3]) # !A1L462 & B2_Q[4] & (OP[3]);

--B2_Q[6] is reg:B_reg|Q[6] at LC_X11_Y12_N4
--operation mode is normal

B2_Q[6] = DFFEAS(A1L562, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[6], , , VCC);


--A1L662 is Mux~10172 at LC_X11_Y12_N8
--operation mode is normal

A1L662 = A1L222 & (A1L362 # A1L322) # !A1L222 & (A1L562 & !A1L322);


--A1L66 is add~1466 at LC_X9_Y13_N7
--operation mode is arithmetic

A1L66_carry_eqn = (!A1L23 & A1L55) # (A1L23 & A1L65);
A1L66 = B1_Q[5] $ A1L66_carry_eqn;

--A1L76 is add~1468 at LC_X9_Y13_N7
--operation mode is arithmetic

A1L76_cout_0 = !A1L55 # !B1_Q[5];
A1L76 = CARRY(A1L76_cout_0);

--A1L86 is add~1468COUT1_1706 at LC_X9_Y13_N7
--operation mode is arithmetic

A1L86_cout_1 = !A1L65 # !B1_Q[5];
A1L86 = CARRY(A1L86_cout_1);


--A1L762 is Mux~10173 at LC_X8_Y14_N1
--operation mode is normal

A1L762 = A1L662 & (A1L66 # !A1L322) # !A1L662 & A1L75 & A1L322;


--A1L862 is Mux~10174 at LC_X9_Y14_N2
--operation mode is normal

A1L862 = A1L762 & (!OP[3] & OP[1] # !OP[2]);


--M12L3 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~89 at LC_X12_Y10_N5
--operation mode is arithmetic

M12L3_carry_eqn = M12L2;
M12L3 = M51L01 $ M9L1 $ M12L3_carry_eqn;

--M12L4 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~91 at LC_X12_Y10_N5
--operation mode is arithmetic

M12L4_cout_0 = M51L01 & !M9L1 & !M12L2 # !M51L01 & (!M12L2 # !M9L1);
M12L4 = CARRY(M12L4_cout_0);

--M12L5 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~91COUT1_145 at LC_X12_Y10_N5
--operation mode is arithmetic

M12L5_cout_1 = M51L01 & !M9L1 & !M12L2 # !M51L01 & (!M12L2 # !M9L1);
M12L5 = CARRY(M12L5_cout_1);


--A1L962 is Mux~10175 at LC_X9_Y15_N9
--operation mode is normal

A1L962 = OP[0] & (OP[3] & M12L3 # !OP[3] & (B2_Q[5]));


--A1L072 is Mux~10176 at LC_X9_Y15_N6
--operation mode is normal

A1L072 = !OP[0] & (B2_Q[5] & !OP[3] # !B2_Q[5] & (OP[3] # B1_Q[5]));


--A1L172 is Mux~10177 at LC_X9_Y15_N7
--operation mode is normal

A1L172 = A1L862 # A1L212 & (A1L962 # A1L072);


--A1L96 is add~1471 at LC_X10_Y11_N8
--operation mode is arithmetic

A1L96_carry_eqn = (!A1L62 & A1L16) # (A1L62 & A1L26);
A1L96 = B1_Q[6] $ B2_Q[6] $ A1L96_carry_eqn;

--A1L07 is add~1473 at LC_X10_Y11_N8
--operation mode is arithmetic

A1L07_cout_0 = B1_Q[6] & !B2_Q[6] & !A1L16 # !B1_Q[6] & (!A1L16 # !B2_Q[6]);
A1L07 = CARRY(A1L07_cout_0);

--A1L17 is add~1473COUT1_1734 at LC_X10_Y11_N8
--operation mode is arithmetic

A1L17_cout_1 = B1_Q[6] & !B2_Q[6] & !A1L26 # !B1_Q[6] & (!A1L26 # !B2_Q[6]);
A1L17 = CARRY(A1L17_cout_1);


--A1L272 is Mux~10178 at LC_X11_Y12_N7
--operation mode is normal

B1_Q[6]_qfbk = B1_Q[6];
A1L272 = OP[3] & OP[0] # !OP[3] & (OP[0] & (B1_Q[6]_qfbk $ B2_Q[6]) # !OP[0] & B1_Q[6]_qfbk & B2_Q[6]);

--B1_Q[6] is reg:A_reg|Q[6] at LC_X11_Y12_N7
--operation mode is normal

B1_Q[6] = DFFEAS(A1L272, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[6], , , VCC);


--A1L27 is add~1476 at LC_X10_Y13_N8
--operation mode is arithmetic

A1L27_carry_eqn = (!A1L82 & A1L46) # (A1L82 & A1L56);
A1L27 = B1_Q[6] $ B2_Q[6] $ !A1L27_carry_eqn;

--A1L37 is add~1478 at LC_X10_Y13_N8
--operation mode is arithmetic

A1L37_cout_0 = B1_Q[6] & B2_Q[6] & !A1L46 # !B1_Q[6] & (B2_Q[6] # !A1L46);
A1L37 = CARRY(A1L37_cout_0);

--A1L47 is add~1478COUT1_1748 at LC_X10_Y13_N8
--operation mode is arithmetic

A1L47_cout_1 = B1_Q[6] & B2_Q[6] & !A1L56 # !B1_Q[6] & (B2_Q[6] # !A1L56);
A1L47 = CARRY(A1L47_cout_1);


--A1L372 is Mux~10179 at LC_X11_Y12_N5
--operation mode is normal

A1L372 = A1L272 & (A1L27 # !OP[3]) # !A1L272 & (A1L96 & OP[3]);


--A1L57 is add~1481 at LC_X8_Y14_N8
--operation mode is arithmetic

A1L57_carry_eqn = (!A1L03 & A1L85) # (A1L03 & A1L95);
A1L57 = B1_Q[6] $ A1L57_carry_eqn;

--A1L67 is add~1483 at LC_X8_Y14_N8
--operation mode is arithmetic

A1L67_cout_0 = B1_Q[6] # !A1L85;
A1L67 = CARRY(A1L67_cout_0);

--A1L77 is add~1483COUT1_1720 at LC_X8_Y14_N8
--operation mode is arithmetic

A1L77_cout_1 = B1_Q[6] # !A1L95;
A1L77 = CARRY(A1L77_cout_1);


--F6L2 is sub16:l2|adder16:l1|add4:u2|c2~4 at LC_X11_Y11_N4
--operation mode is normal

F6L2 = B2_Q[5] & (B2_Q[4] # !B1_Q[4] # !B1_Q[5]) # !B2_Q[5] & !B1_Q[5] & (B2_Q[4] # !B1_Q[4]);


--F6_temp0 is sub16:l2|adder16:l1|add4:u2|temp0 at LC_X11_Y11_N1
--operation mode is normal

F6_temp0 = B1_Q[5] # !B2_Q[5];


--F6L21 is sub16:l2|adder16:l1|add4:u2|sum[2]~126 at LC_X11_Y12_N1
--operation mode is normal

F6L21 = B1_Q[6] $ (B2_Q[6]);


--F6_sum[2] is sub16:l2|adder16:l1|add4:u2|sum[2] at LC_X11_Y11_N6
--operation mode is normal

F6_sum[2] = F6L21 $ (F6_temp0 & F6L1 # !F6L2);


--F2L21 is adder16:l1|add4:u2|temp2~7 at LC_X12_Y13_N0
--operation mode is normal

F2L21 = B1_Q[5] & (B1_Q[4] # B2_Q[4]) # !B1_Q[5] & B2_Q[5] & (B1_Q[4] # B2_Q[4]);


--F2L31 is adder16:l1|add4:u2|temp2~8 at LC_X12_Y13_N9
--operation mode is normal

F2L31 = F2L21 & (F1L4 # A1L614 & F1L3);


--F2L2 is adder16:l1|add4:u2|c2~14 at LC_X11_Y10_N0
--operation mode is normal

F2L2 = B2_Q[5] & (B1_Q[5] # B1_Q[4] & B2_Q[4]) # !B2_Q[5] & B1_Q[4] & B2_Q[4] & B1_Q[5];


--A1L472 is Mux~10180 at LC_X11_Y13_N6
--operation mode is normal

A1L472 = OP[3] & (OP[0]) # !OP[3] & (OP[0] & (!F6_sum[2]) # !OP[0] & F2_sum[2]);


--A1L572 is Mux~10181 at LC_X11_Y13_N7
--operation mode is normal

B2_Q[7]_qfbk = B2_Q[7];
A1L572 = OP[3] & (A1L472 & (B2_Q[7]_qfbk) # !A1L472 & B2_Q[5]) # !OP[3] & (A1L472);

--B2_Q[7] is reg:B_reg|Q[7] at LC_X11_Y13_N7
--operation mode is normal

B2_Q[7] = DFFEAS(A1L572, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[7], , , VCC);


--A1L672 is Mux~10182 at LC_X11_Y13_N9
--operation mode is normal

A1L672 = A1L222 & (A1L322) # !A1L222 & (A1L322 & (A1L57) # !A1L322 & A1L572);


--A1L87 is add~1486 at LC_X9_Y13_N8
--operation mode is arithmetic

A1L87_carry_eqn = (!A1L23 & A1L76) # (A1L23 & A1L86);
A1L87 = B1_Q[6] $ (!A1L87_carry_eqn);

--A1L97 is add~1488 at LC_X9_Y13_N8
--operation mode is arithmetic

A1L97_cout_0 = B1_Q[6] & (!A1L76);
A1L97 = CARRY(A1L97_cout_0);

--A1L08 is add~1488COUT1_1707 at LC_X9_Y13_N8
--operation mode is arithmetic

A1L08_cout_1 = B1_Q[6] & (!A1L86);
A1L08 = CARRY(A1L08_cout_1);


--A1L772 is Mux~10183 at LC_X11_Y12_N0
--operation mode is normal

A1L772 = A1L672 & (A1L87 # !A1L222) # !A1L672 & (A1L222 & A1L372);


--A1L872 is Mux~10184 at LC_X9_Y14_N0
--operation mode is normal

A1L872 = A1L772 & (!OP[3] & OP[1] # !OP[2]);


--M12L6 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~94 at LC_X12_Y10_N6
--operation mode is arithmetic

M12L6_carry_eqn = (!M12L2 & M12L4) # (M12L2 & M12L5);
M12L6 = M81L1 $ M51L31 $ !M12L6_carry_eqn;

--M12L7 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~96 at LC_X12_Y10_N6
--operation mode is arithmetic

M12L7_cout_0 = M81L1 & (M51L31 # !M12L4) # !M81L1 & M51L31 & !M12L4;
M12L7 = CARRY(M12L7_cout_0);

--M12L8 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~96COUT1_146 at LC_X12_Y10_N6
--operation mode is arithmetic

M12L8_cout_1 = M81L1 & (M51L31 # !M12L5) # !M81L1 & M51L31 & !M12L5;
M12L8 = CARRY(M12L8_cout_1);


--A1L972 is Mux~10185 at LC_X11_Y12_N3
--operation mode is normal

A1L972 = OP[0] & (OP[3] & M12L6 # !OP[3] & (B2_Q[6]));


--A1L082 is Mux~10186 at LC_X11_Y12_N6
--operation mode is normal

A1L082 = !OP[0] & (OP[3] & !B2_Q[6] # !OP[3] & (B2_Q[6] # B1_Q[6]));


--A1L182 is Mux~10187 at LC_X11_Y12_N9
--operation mode is normal

A1L182 = A1L872 # A1L212 & (A1L972 # A1L082);


--A1L18 is add~1491 at LC_X8_Y14_N9
--operation mode is arithmetic

A1L18_carry_eqn = (!A1L03 & A1L67) # (A1L03 & A1L77);
A1L18 = B1_Q[7] $ (!A1L18_carry_eqn);

--A1L28 is add~1493 at LC_X8_Y14_N9
--operation mode is arithmetic

A1L28 = CARRY(!B1_Q[7] & (!A1L77));


--A1L38 is add~1496 at LC_X10_Y11_N9
--operation mode is arithmetic

A1L38_carry_eqn = (!A1L62 & A1L07) # (A1L62 & A1L17);
A1L38 = B2_Q[7] $ B1_Q[7] $ !A1L38_carry_eqn;

--A1L48 is add~1498 at LC_X10_Y11_N9
--operation mode is arithmetic

A1L48 = CARRY(B2_Q[7] & (B1_Q[7] # !A1L17) # !B2_Q[7] & B1_Q[7] & !A1L17);


--A1L282 is Mux~10188 at LC_X11_Y13_N1
--operation mode is normal

B1_Q[7]_qfbk = B1_Q[7];
A1L282 = B2_Q[7] & (OP[0] $ (B1_Q[7]_qfbk & !OP[3])) # !B2_Q[7] & OP[0] & (B1_Q[7]_qfbk # OP[3]);

--B1_Q[7] is reg:A_reg|Q[7] at LC_X11_Y13_N1
--operation mode is normal

B1_Q[7] = DFFEAS(A1L282, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[7], , , VCC);


--A1L58 is add~1501 at LC_X10_Y13_N9
--operation mode is arithmetic

A1L58_carry_eqn = (!A1L82 & A1L37) # (A1L82 & A1L47);
A1L58 = B2_Q[7] $ B1_Q[7] $ A1L58_carry_eqn;

--A1L68 is add~1503 at LC_X10_Y13_N9
--operation mode is arithmetic

A1L68 = CARRY(B2_Q[7] & B1_Q[7] & !A1L47 # !B2_Q[7] & (B1_Q[7] # !A1L47));


--A1L382 is Mux~10189 at LC_X11_Y13_N0
--operation mode is normal

A1L382 = OP[3] & (A1L282 & A1L58 # !A1L282 & (A1L38)) # !OP[3] & (A1L282);


--F6L7 is sub16:l2|adder16:l1|add4:u2|p~60 at LC_X12_Y13_N4
--operation mode is normal

F6L7 = B1_Q[5] & (B1_Q[4] # !B2_Q[4]) # !B1_Q[5] & !B2_Q[5] & (B1_Q[4] # !B2_Q[4]);


--F6L71 is sub16:l2|adder16:l1|add4:u2|temp3~0 at LC_X11_Y9_N9
--operation mode is normal

F6L71 = B1_Q[6] # !B2_Q[6];


--F6L91 is sub16:l2|adder16:l1|add4:u2|temp5~4 at LC_X11_Y9_N2
--operation mode is normal

F6L91 = F6L71 & F6L7 & (F5L6 # C2L2);


--F6L31 is sub16:l2|adder16:l1|add4:u2|sum[3]~127 at LC_X12_Y13_N1
--operation mode is normal

F6L31 = B1_Q[5] & (B1_Q[4] & !B2_Q[4] # !B2_Q[5]) # !B1_Q[5] & !B2_Q[5] & B1_Q[4] & !B2_Q[4];


--F6L41 is sub16:l2|adder16:l1|add4:u2|sum[3]~128 at LC_X11_Y9_N8