alu.fit.eqn

ALU可以实现16种操作（包括加减乘除移位运算等）

--M51L2 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~72 at LC_X12_Y11_N0
--operation mode is arithmetic

M51L2_cout_0 = M3L4 & H1_decoder_node[2][0];
M51L2 = CARRY(M51L2_cout_0);

--M51L3 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~72COUT1_121 at LC_X12_Y11_N0
--operation mode is arithmetic

M51L3_cout_1 = M3L4 & H1_decoder_node[2][0];
M51L3 = CARRY(M51L3_cout_1);


--A1L932 is Mux~10145 at LC_X12_Y14_N0
--operation mode is normal

A1L932 = OP[0] & (OP[3] & (M51L1) # !OP[3] & B2_Q[2]);


--A1L042 is Mux~10146 at LC_X12_Y14_N1
--operation mode is normal

A1L042 = !OP[0] & (B2_Q[2] & !OP[3] # !B2_Q[2] & (OP[3] # B1_Q[2]));


--A1L142 is Mux~10147 at LC_X12_Y14_N4
--operation mode is normal

A1L142 = A1L832 # A1L212 & (A1L932 # A1L042);


--A1L33 is add~1411 at LC_X8_Y14_N5
--operation mode is arithmetic

A1L33_carry_eqn = A1L03;
A1L33 = B1_Q[3] $ !A1L33_carry_eqn;

--A1L43 is add~1413 at LC_X8_Y14_N5
--operation mode is arithmetic

A1L43_cout_0 = !B1_Q[3] & !A1L03;
A1L43 = CARRY(A1L43_cout_0);

--A1L53 is add~1413COUT1_1717 at LC_X8_Y14_N5
--operation mode is arithmetic

A1L53_cout_1 = !B1_Q[3] & !A1L03;
A1L53 = CARRY(A1L53_cout_1);


--A1L63 is add~1416 at LC_X10_Y11_N5
--operation mode is arithmetic

A1L63_carry_eqn = A1L62;
A1L63 = B1_Q[3] $ B2_Q[3] $ !A1L63_carry_eqn;

--A1L73 is add~1418 at LC_X10_Y11_N5
--operation mode is arithmetic

A1L73_cout_0 = B1_Q[3] & (B2_Q[3] # !A1L62) # !B1_Q[3] & B2_Q[3] & !A1L62;
A1L73 = CARRY(A1L73_cout_0);

--A1L83 is add~1418COUT1_1731 at LC_X10_Y11_N5
--operation mode is arithmetic

A1L83_cout_1 = B1_Q[3] & (B2_Q[3] # !A1L62) # !B1_Q[3] & B2_Q[3] & !A1L62;
A1L83 = CARRY(A1L83_cout_1);


--A1L242 is Mux~10148 at LC_X11_Y15_N5
--operation mode is normal

B1_Q[3]_qfbk = B1_Q[3];
A1L242 = OP[3] & OP[0] # !OP[3] & (OP[0] & (B1_Q[3]_qfbk $ B2_Q[3]) # !OP[0] & B1_Q[3]_qfbk & B2_Q[3]);

--B1_Q[3] is reg:A_reg|Q[3] at LC_X11_Y15_N5
--operation mode is normal

B1_Q[3] = DFFEAS(A1L242, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[3], , , VCC);


--A1L93 is add~1421 at LC_X10_Y13_N5
--operation mode is arithmetic

A1L93_carry_eqn = A1L82;
A1L93 = B2_Q[3] $ B1_Q[3] $ A1L93_carry_eqn;

--A1L04 is add~1423 at LC_X10_Y13_N5
--operation mode is arithmetic

A1L04_cout_0 = B2_Q[3] & B1_Q[3] & !A1L82 # !B2_Q[3] & (B1_Q[3] # !A1L82);
A1L04 = CARRY(A1L04_cout_0);

--A1L14 is add~1423COUT1_1745 at LC_X10_Y13_N5
--operation mode is arithmetic

A1L14_cout_1 = B2_Q[3] & B1_Q[3] & !A1L82 # !B2_Q[3] & (B1_Q[3] # !A1L82);
A1L14 = CARRY(A1L14_cout_1);


--A1L342 is Mux~10149 at LC_X11_Y15_N6
--operation mode is normal

A1L342 = OP[3] & (A1L242 & A1L93 # !A1L242 & (A1L63)) # !OP[3] & (A1L242);


--F5L2 is sub16:l2|adder16:l1|add4:u1|c3~132 at LC_X12_Y14_N2
--operation mode is normal

F5L2 = B2_Q[2] & B1_Q[2] & (F5L1 # F5L21) # !B2_Q[2] & (B1_Q[2] # F5L1 # F5L21);


--F5_sum[3] is sub16:l2|adder16:l1|add4:u1|sum[3] at LC_X12_Y14_N3
--operation mode is normal

F5_sum[3] = F5L2 $ (B2_Q[3] $ B1_Q[3]);


--F1L2 is adder16:l1|add4:u1|c3~83 at LC_X12_Y14_N5
--operation mode is normal

F1L2 = B2_Q[2] & (B1_Q[2] # B2_Q[1] & B1_Q[1]) # !B2_Q[2] & B2_Q[1] & B1_Q[2] & B1_Q[1];


--H1_decoder_node[0][0] is lpm_mult:mult_rtl_0|multcore:mult_core|decoder_node[0][0] at LC_X13_Y11_N4
--operation mode is normal

H1_decoder_node[0][0] = LCELL(B2_Q[0] & B1_Q[0]);


--A1L514 is result_t~34 at LC_X12_Y13_N2
--operation mode is normal

A1L514 = B2_Q[2] # B1_Q[2];


--F1L3 is adder16:l1|add4:u1|c3~84 at LC_X12_Y13_N5
--operation mode is normal

F1L3 = A1L514 & H1_decoder_node[0][0] & (B2_Q[1] # B1_Q[1]);


--F1_sum[3] is adder16:l1|add4:u1|sum[3] at LC_X13_Y14_N6
--operation mode is normal

F1_sum[3] = B1_Q[3] $ B2_Q[3] $ (F1L3 # F1L2);


--A1L442 is Mux~10150 at LC_X11_Y15_N3
--operation mode is normal

A1L442 = OP[0] & (OP[3] # !F5_sum[3]) # !OP[0] & (!OP[3] & F1_sum[3]);


--A1L542 is Mux~10151 at LC_X11_Y15_N4
--operation mode is normal

B2_Q[4]_qfbk = B2_Q[4];
A1L542 = OP[3] & (A1L442 & (B2_Q[4]_qfbk) # !A1L442 & B2_Q[2]) # !OP[3] & (A1L442);

--B2_Q[4] is reg:B_reg|Q[4] at LC_X11_Y15_N4
--operation mode is normal

B2_Q[4] = DFFEAS(A1L542, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[4], , , VCC);


--A1L642 is Mux~10152 at LC_X11_Y15_N7
--operation mode is normal

A1L642 = A1L222 & (A1L342 # A1L322) # !A1L222 & (A1L542 & !A1L322);


--A1L24 is add~1426 at LC_X9_Y13_N5
--operation mode is arithmetic

A1L24_carry_eqn = A1L23;
A1L24 = B1_Q[3] $ (A1L24_carry_eqn);

--A1L34 is add~1428 at LC_X9_Y13_N5
--operation mode is arithmetic

A1L34_cout_0 = !A1L23 # !B1_Q[3];
A1L34 = CARRY(A1L34_cout_0);

--A1L44 is add~1428COUT1_1704 at LC_X9_Y13_N5
--operation mode is arithmetic

A1L44_cout_1 = !A1L23 # !B1_Q[3];
A1L44 = CARRY(A1L44_cout_1);


--A1L742 is Mux~10153 at LC_X9_Y13_N1
--operation mode is normal

A1L742 = A1L322 & (A1L642 & (A1L24) # !A1L642 & A1L33) # !A1L322 & (A1L642);


--A1L842 is Mux~10154 at LC_X9_Y14_N6
--operation mode is normal

A1L842 = A1L742 & (!OP[3] & OP[1] # !OP[2]);


--M51L4 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~75 at LC_X12_Y11_N1
--operation mode is arithmetic

M51L4 = M3L7 $ M6L1 $ M51L2;

--M51L5 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77 at LC_X12_Y11_N1
--operation mode is arithmetic

M51L5_cout_0 = M3L7 & !M6L1 & !M51L2 # !M3L7 & (!M51L2 # !M6L1);
M51L5 = CARRY(M51L5_cout_0);

--M51L6 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~77COUT1_122 at LC_X12_Y11_N1
--operation mode is arithmetic

M51L6_cout_1 = M3L7 & !M6L1 & !M51L3 # !M3L7 & (!M51L3 # !M6L1);
M51L6 = CARRY(M51L6_cout_1);


--A1L942 is Mux~10155 at LC_X11_Y15_N9
--operation mode is normal

A1L942 = OP[0] & (OP[3] & M51L4 # !OP[3] & (B2_Q[3]));


--A1L052 is Mux~10156 at LC_X11_Y15_N8
--operation mode is normal

A1L052 = !OP[0] & (OP[3] & !B2_Q[3] # !OP[3] & (B2_Q[3] # B1_Q[3]));


--A1L152 is Mux~10157 at LC_X11_Y15_N2
--operation mode is normal

A1L152 = A1L842 # A1L212 & (A1L942 # A1L052);


--A1L54 is add~1431 at LC_X10_Y11_N6
--operation mode is arithmetic

A1L54_carry_eqn = (!A1L62 & A1L73) # (A1L62 & A1L83);
A1L54 = B1_Q[4] $ B2_Q[4] $ A1L54_carry_eqn;

--A1L64 is add~1433 at LC_X10_Y11_N6
--operation mode is arithmetic

A1L64_cout_0 = B1_Q[4] & !B2_Q[4] & !A1L73 # !B1_Q[4] & (!A1L73 # !B2_Q[4]);
A1L64 = CARRY(A1L64_cout_0);

--A1L74 is add~1433COUT1_1732 at LC_X10_Y11_N6
--operation mode is arithmetic

A1L74_cout_1 = B1_Q[4] & !B2_Q[4] & !A1L83 # !B1_Q[4] & (!A1L83 # !B2_Q[4]);
A1L74 = CARRY(A1L74_cout_1);


--A1L252 is Mux~10158 at LC_X10_Y14_N1
--operation mode is normal

B1_Q[4]_qfbk = B1_Q[4];
A1L252 = OP[0] & (OP[3] # B1_Q[4]_qfbk $ B2_Q[4]) # !OP[0] & !OP[3] & B1_Q[4]_qfbk & B2_Q[4];

--B1_Q[4] is reg:A_reg|Q[4] at LC_X10_Y14_N1
--operation mode is normal

B1_Q[4] = DFFEAS(A1L252, GLOBAL(clk), GLOBAL(reset), , B1L1, Dinput[4], , , VCC);


--A1L84 is add~1436 at LC_X10_Y13_N6
--operation mode is arithmetic

A1L84_carry_eqn = (!A1L82 & A1L04) # (A1L82 & A1L14);
A1L84 = B1_Q[4] $ B2_Q[4] $ !A1L84_carry_eqn;

--A1L94 is add~1438 at LC_X10_Y13_N6
--operation mode is arithmetic

A1L94_cout_0 = B1_Q[4] & B2_Q[4] & !A1L04 # !B1_Q[4] & (B2_Q[4] # !A1L04);
A1L94 = CARRY(A1L94_cout_0);

--A1L05 is add~1438COUT1_1746 at LC_X10_Y13_N6
--operation mode is arithmetic

A1L05_cout_1 = B1_Q[4] & B2_Q[4] & !A1L14 # !B1_Q[4] & (B2_Q[4] # !A1L14);
A1L05 = CARRY(A1L05_cout_1);


--A1L352 is Mux~10159 at LC_X10_Y14_N8
--operation mode is normal

A1L352 = OP[3] & (A1L252 & (A1L84) # !A1L252 & A1L54) # !OP[3] & (A1L252);


--A1L15 is add~1441 at LC_X8_Y14_N6
--operation mode is arithmetic

A1L15_carry_eqn = (!A1L03 & A1L43) # (A1L03 & A1L53);
A1L15 = B1_Q[4] $ (A1L15_carry_eqn);

--A1L25 is add~1443 at LC_X8_Y14_N6
--operation mode is arithmetic

A1L25_cout_0 = B1_Q[4] # !A1L43;
A1L25 = CARRY(A1L25_cout_0);

--A1L35 is add~1443COUT1_1718 at LC_X8_Y14_N6
--operation mode is arithmetic

A1L35_cout_1 = B1_Q[4] # !A1L53;
A1L35 = CARRY(A1L35_cout_1);


--F5L4 is sub16:l2|adder16:l1|add4:u1|g~242 at LC_X13_Y14_N0
--operation mode is normal

F5L4 = B2_Q[3] & B1_Q[2] & !B2_Q[2] & B1_Q[3] # !B2_Q[3] & (B1_Q[3] # B1_Q[2] & !B2_Q[2]);


--F5L11 is sub16:l2|adder16:l1|add4:u1|temp3~0 at LC_X13_Y14_N5
--operation mode is normal

F5L11 = B1_Q[2] # !B2_Q[2];


--F5L5 is sub16:l2|adder16:l1|add4:u1|g~243 at LC_X13_Y14_N9
--operation mode is normal

F5L5 = B2_Q[1] & !B2_Q[0] & B1_Q[0] & B1_Q[1] # !B2_Q[1] & (B1_Q[1] # !B2_Q[0] & B1_Q[0]);


--F5L3 is sub16:l2|adder16:l1|add4:u1|g~1 at LC_X13_Y14_N8
--operation mode is normal

F5L3 = B1_Q[3] # !B2_Q[3];


--F5L6 is sub16:l2|adder16:l1|add4:u1|g~244 at LC_X13_Y14_N7
--operation mode is normal

F5L6 = F5L4 # F5L5 & F5L3 & F5L11;


--F6_sum[0] is sub16:l2|adder16:l1|add4:u2|sum[0] at LC_X11_Y14_N3
--operation mode is normal

F6_sum[0] = B1_Q[4] $ B2_Q[4] $ (F5L6 # C2L2);


--F1L5 is adder16:l1|add4:u1|g~184 at LC_X12_Y13_N3
--operation mode is normal

F1L5 = B1_Q[3] & (B2_Q[3] # B1_Q[2] & B2_Q[2]) # !B1_Q[3] & B1_Q[2] & B2_Q[2] & B2_Q[3];


--A1L614 is result_t~35 at LC_X12_Y13_N6
--operation mode is normal

A1L614 = B1_Q[3] # B2_Q[3];


--H1_decoder_node[1][1] is lpm_mult:mult_rtl_0|multcore:mult_core|decoder_node[1][1] at LC_X13_Y13_N8
--operation mode is normal

H1_decoder_node[1][1] = LCELL(B2_Q[1] & B1_Q[1]);


--F1L4 is adder16:l1|add4:u1|g~5 at LC_X12_Y13_N7
--operation mode is normal

F1L4 = F1L5 # H1_decoder_node[1][1] & A1L514 & A1L614;


--F2_sum[0] is adder16:l1|add4:u2|sum[0] at LC_X11_Y14_N1
--operation mode is normal

F2_sum[0] = B1_Q[4] $ B2_Q[4] $ (F1L7 # F1L4);


--A1L452 is Mux~10160 at LC_X11_Y14_N7
--operation mode is normal

A1L452 = OP[0] & (OP[3] # !F6_sum[0]) # !OP[0] & (!OP[3] & F2_sum[0]);


--A1L552 is Mux~10161 at LC_X11_Y14_N8
--operation mode is normal

B2_Q[5]_qfbk = B2_Q[5];
A1L552 = OP[3] & (A1L452 & (B2_Q[5]_qfbk) # !A1L452 & B2_Q[3]) # !OP[3] & (A1L452);

--B2_Q[5] is reg:B_reg|Q[5] at LC_X11_Y14_N8
--operation mode is normal

B2_Q[5] = DFFEAS(A1L552, GLOBAL(clk), GLOBAL(reset), , B2L1, Dinput[5], , , VCC);


--A1L652 is Mux~10162 at LC_X11_Y14_N5
--operation mode is normal

A1L652 = A1L322 & (A1L15 # A1L222) # !A1L322 & (A1L552 & !A1L222);


--A1L45 is add~1446 at LC_X9_Y13_N6
--operation mode is arithmetic

A1L45_carry_eqn = (!A1L23 & A1L34) # (A1L23 & A1L44);
A1L45 = B1_Q[4] $ (!A1L45_carry_eqn);

--A1L55 is add~1448 at LC_X9_Y13_N6
--operation mode is arithmetic

A1L55_cout_0 = B1_Q[4] & (!A1L34);
A1L55 = CARRY(A1L55_cout_0);

--A1L65 is add~1448COUT1_1705 at LC_X9_Y13_N6
--operation mode is arithmetic

A1L65_cout_1 = B1_Q[4] & (!A1L44);
A1L65 = CARRY(A1L65_cout_1);


--A1L752 is Mux~10163 at LC_X9_Y14_N3
--operation mode is normal

A1L752 = A1L222 & (A1L652 & (A1L45) # !A1L652 & A1L352) # !A1L222 & (A1L652);


--A1L852 is Mux~10164 at LC_X9_Y14_N7
--operation mode is normal

A1L852 = A1L752 & (!OP[3] & OP[1] # !OP[2]);


--M12L1 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~84 at LC_X12_Y10_N4
--operation mode is arithmetic

M12L1 = M51L7 $ H1_decoder_node[4][0];

--M12L2 is lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~86 at LC_X12_Y10_N4
--operation mode is arithmetic

M12L2 = CARRY(M51L7 & H1_decoder_node[4][0]);


--A1L952 is Mux~10165 at LC_X10_Y14_N6
--operation mode is normal

A1L952 = OP[0] & (OP[3] & M12L1 # !OP[3] & (B2_Q[4]));


--A1L062 is Mux~10166 at LC_X10_Y14_N2
--operation mode is normal

A1L062 = !OP[0] & (OP[3] & (!B2_Q[4]) # !OP[3] & (B1_Q[4] # B2_Q[4]));


--A1L162 is Mux~10167 at LC_X10_Y14_N3
--operation mode is normal

A1L162 = A1L852 # A1L212 & (A1L952 # A1L062);


--A1L75 is add~1451 at LC_X8_Y14_N7
--operation mode is arithmetic

A1L75_carry_eqn = (!A1L03 & A1L25) # (A1L03 & A1L35);
A1L75 = B1_Q[5] $ (!A1L75_carry_eqn);

--A1L85 is add~1453 at LC_X8_Y14_N7
--operation mode is arithmetic

A1L85_cout_0 = !B1_Q[5] & (!A1L25);