📄 coding.lst
字号:
__text_start:
__start:
13 E5CF LDI R28,0x5F
14 E0D4 LDI R29,4
15 BFCD OUT 0x3D,R28
16 BFDE OUT 0x3E,R29
17 51CE SUBI R28,0x1E
18 40D0 SBCI R29,0
19 EA0A LDI R16,0xAA
1A 8308 STD Y+0,R16
1B 2400 CLR R0
1C E6E0 LDI R30,0x60
1D E0F0 LDI R31,0
1E E010 LDI R17,0
1F 36E2 CPI R30,0x62
20 07F1 CPC R31,R17
21 F011 BEQ 0x0024
22 9201 ST R0,Z+
23 CFFB RJMP 0x001F
24 8300 STD Z+0,R16
25 E2E6 LDI R30,0x26
26 E0F0 LDI R31,0
27 E6A0 LDI R26,0x60
28 E0B0 LDI R27,0
29 E010 LDI R17,0
2A E000 LDI R16,0
2B BF0B OUT 0x3B,R16
2C 32E6 CPI R30,0x26
2D 07F1 CPC R31,R17
2E F021 BEQ 0x0033
2F 95C8 LPM
30 9631 ADIW R30,1
31 920D ST R0,X+
32 CFF9 RJMP 0x002C
33 D0F0 RCALL _main
_exit:
34 CFFF RJMP _exit
_delay:
i --> R20
j --> R22
t --> R16
35 D105 RCALL push_xgsetF000
FILE: D:\MYDOCU~1\电子\08电信节\coding_and_decode改进\coding.c
(0001) //ICC-AVR application builder : 2008-5-2 16:02:25
(0002) // Target : M8
(0003) // Crystal: 7.3728Mhz
(0004)
(0005) #include <iom8v.h>
(0006) #include <macros.h>
(0007) unsigned int ms;
(0008)
(0009) void delay(unsigned int t)
(0010) { unsigned int i;unsigned char j;
(0011) for(i=0;i<t;i++)
36 2744 CLR R20
37 2755 CLR R21
38 C008 RJMP 0x0041
(0012) for(j=80;j>0;j--);
39 E560 LDI R22,0x50
3A C001 RJMP 0x003C
3B 956A DEC R22
3C E080 LDI R24,0
3D 1786 CP R24,R22
3E F3E0 BCS 0x003B
3F 5F4F SUBI R20,0xFF
40 4F5F SBCI R21,0xFF
41 1740 CP R20,R16
42 0751 CPC R21,R17
43 F3A8 BCS 0x0039
44 C0FB RJMP pop_xgsetF000
(0013) }
(0014)
(0015) void port_init(void)
(0016) {
(0017) PORTB = 0x01;
_port_init:
45 E081 LDI R24,1
46 BB88 OUT 0x18,R24
(0018) DDRB = 0x01;
47 BB87 OUT 0x17,R24
(0019) PORTC = 0x00; //m103 output only
48 2422 CLR R2
49 BA25 OUT 0x15,R2
(0020) DDRC = 0x00;
4A BA24 OUT 0x14,R2
(0021) PORTD = 0x00;
4B BA22 OUT 0x12,R2
(0022) DDRD = 0x00;
4C BA21 OUT 0x11,R2
4D 9508 RET
(0023)
(0024) }
(0025)
(0026) //TIMER1 initialize - prescale:1
(0027) // WGM: 0) Normal, TOP=0xFFFF
(0028) // desired value: 500uSec
(0029) // actual value: 499.946uSec (0.0%)
(0030) void timer1_init(void)
(0031) {
(0032) TCCR1B = 0x00; //stop
_timer1_init:
4E 2422 CLR R2
4F BC2E OUT 0x2E,R2
(0033) TCNT1H = 0xF1; //setup
50 EF81 LDI R24,0xF1
51 BD8D OUT 0x2D,R24
(0034) TCNT1L = 0x9A;
52 E98A LDI R24,0x9A
53 BD8C OUT 0x2C,R24
(0035) OCR1AH = 0x0E;
54 E08E LDI R24,0xE
55 BD8B OUT 0x2B,R24
(0036) OCR1AL = 0x66;
56 E686 LDI R24,0x66
57 BD8A OUT 0x2A,R24
(0037) OCR1BH = 0x0E;
58 E08E LDI R24,0xE
59 BD89 OUT 0x29,R24
(0038) OCR1BL = 0x66;
5A E686 LDI R24,0x66
5B BD88 OUT 0x28,R24
(0039) ICR1H = 0x0E;
5C E08E LDI R24,0xE
5D BD87 OUT 0x27,R24
(0040) ICR1L = 0x66;
5E E686 LDI R24,0x66
5F BD86 OUT 0x26,R24
(0041) TCCR1A = 0x00;
60 BC2F OUT 0x2F,R2
(0042) TCCR1B = 0x01; //start Timer
61 E081 LDI R24,1
62 BD8E OUT 0x2E,R24
63 9508 RET
_timer1_ovf_isr:
64 938A ST R24,-Y
65 939A ST R25,-Y
66 B78F IN R24,0x3F
67 938A ST R24,-Y
(0043) }
(0044)
(0045) #pragma interrupt_handler timer1_ovf_isr:iv_TIM1_OVF
(0046) void timer1_ovf_isr(void)
(0047) {
(0048) //TIMER1 has overflowed
(0049) TCNT1H = 0xF1; //reload counter high value
68 EF81 LDI R24,0xF1
69 BD8D OUT 0x2D,R24
(0050) TCNT1L = 0x9A; //reload counter low value
6A E98A LDI R24,0x9A
6B BD8C OUT 0x2C,R24
(0051) ms++;
6C 9180 0060 LDS R24,ms
6E 9190 0061 LDS R25,ms+1
70 9601 ADIW R24,1
71 9390 0061 STS ms+1,R25
73 9380 0060 STS ms,R24
75 9189 LD R24,Y+
76 BF8F OUT 0x3F,R24
77 9199 LD R25,Y+
78 9189 LD R24,Y+
79 9518 RETI
(0052) }
(0053)
(0054) //call this routine to initialize all peripherals
(0055) void init_devices(void)
(0056) {
(0057) //stop errant interrupts until set up
(0058) CLI(); //disable all interrupts
_init_devices:
7A 94F8 BCLR 7
(0059) port_init();
7B DFC9 RCALL _port_init
(0060) timer1_init();
7C DFD1 RCALL _timer1_init
(0061)
(0062) MCUCR = 0x00;
7D 2422 CLR R2
7E BE25 OUT 0x35,R2
(0063) GICR = 0x00;
7F BE2B OUT 0x3B,R2
(0064) TIMSK = 0x05; //timer interrupt sources
80 E085 LDI R24,5
81 BF89 OUT 0x39,R24
(0065) SEI(); //re-enable interrupts
82 9478 BSET 7
83 9508 RET
(0066) //all peripherals are now initialized
(0067) }
(0068)
(0069) void signal_0(void)
(0070) {
(0071) ms=0;
_signal_0:
84 2422 CLR R2
85 2433 CLR R3
86 9230 0061 STS ms+1,R3
88 9220 0060 STS ms,R2
8A C003 RJMP 0x008E
(0072) while(ms==0) PORTB=PORTB&0xfe;
8B B388 IN R24,0x18
8C 7F8E ANDI R24,0xFE
8D BB88 OUT 0x18,R24
8E 9020 0060 LDS R2,ms
90 9030 0061 LDS R3,ms+1
92 2022 TST R2
93 F411 BNE 0x0096
94 2033 TST R3
95 F3A9 BEQ 0x008B
(0073) ms=0;
96 2422 CLR R2
97 2433 CLR R3
98 9230 0061 STS ms+1,R3
9A 9220 0060 STS ms,R2
9C C001 RJMP 0x009E
(0074) while(ms==0) PORTB=PORTB|0X01;
9D 9AC0 SBI 0x18,0
9E 9020 0060 LDS R2,ms
A0 9030 0061 LDS R3,ms+1
A2 2022 TST R2
A3 F411 BNE 0x00A6
A4 2033 TST R3
A5 F3B9 BEQ 0x009D
A6 9508 RET
(0075)
(0076) }
(0077)
(0078) void signal_1(void)
(0079) {
(0080) ms=0;
_signal_1:
A7 2422 CLR R2
A8 2433 CLR R3
A9 9230 0061 STS ms+1,R3
AB 9220 0060 STS ms,R2
AD C003 RJMP 0x00B1
(0081) while(ms==0) PORTB=PORTB&0xfe;
AE B388 IN R24,0x18
AF 7F8E ANDI R24,0xFE
B0 BB88 OUT 0x18,R24
B1 9020 0060 LDS R2,ms
B3 9030 0061 LDS R3,ms+1
B5 2022 TST R2
B6 F411 BNE 0x00B9
B7 2033 TST R3
B8 F3A9 BEQ 0x00AE
(0082) ms=0;
B9 2422 CLR R2
BA 2433 CLR R3
BB 9230 0061 STS ms+1,R3
BD 9220 0060 STS ms,R2
BF C001 RJMP 0x00C1
(0083) while(ms<3) PORTB=PORTB|0x01;
C0 9AC0 SBI 0x18,0
C1 9180 0060 LDS R24,ms
C3 9190 0061 LDS R25,ms+1
C5 3083 CPI R24,3
C6 E0E0 LDI R30,0
C7 079E CPC R25,R30
C8 F3B8 BCS 0x00C0
C9 9508 RET
(0084)
(0085) }
(0086)
(0087) void signal_init(void)
(0088) {
(0089) ms=0;
_signal_init:
CA 2422 CLR R2
CB 2433 CLR R3
CC 9230 0061 STS ms+1,R3
CE 9220 0060 STS ms,R2
D0 C003 RJMP 0x00D4
(0090) while(ms<4) PORTB=PORTB&0xfe;
D1 B388 IN R24,0x18
D2 7F8E ANDI R24,0xFE
D3 BB88 OUT 0x18,R24
D4 9180 0060 LDS R24,ms
D6 9190 0061 LDS R25,ms+1
D8 3084 CPI R24,4
D9 E0E0 LDI R30,0
DA 079E CPC R25,R30
DB F3A8 BCS 0x00D1
(0091) ms=0;
DC 2422 CLR R2
DD 2433 CLR R3
DE 9230 0061 STS ms+1,R3
E0 9220 0060 STS ms,R2
E2 C001 RJMP 0x00E4
(0092) while(ms<4) PORTB=PORTB|0x01;
E3 9AC0 SBI 0x18,0
E4 9180 0060 LDS R24,ms
E6 9190 0061 LDS R25,ms+1
E8 3084 CPI R24,4
E9 E0E0 LDI R30,0
EA 079E CPC R25,R30
EB F3B8 BCS 0x00E3
EC 9508 RET
(0093)
(0094) }
(0095)
(0096) void signal_end(void)
(0097) { ms=0;
_signal_end:
ED 2422 CLR R2
EE 2433 CLR R3
EF 9230 0061 STS ms+1,R3
F1 9220 0060 STS ms,R2
F3 C003 RJMP 0x00F7
(0098) while(ms==0) PORTB=PORTB&0xfe;
F4 B388 IN R24,0x18
F5 7F8E ANDI R24,0xFE
F6 BB88 OUT 0x18,R24
F7 9020 0060 LDS R2,ms
F9 9030 0061 LDS R3,ms+1
FB 2022 TST R2
FC F411 BNE 0x00FF
FD 2033 TST R3
FE F3A9 BEQ 0x00F4
(0099)
(0100) PORTB=PORTB|0x01;
FF 9AC0 SBI 0x18,0
100 9508 RET
_coding:
m --> R20
j --> R20
i --> R22
num --> R10
101 D043 RCALL push_xgsetF00C
102 2EA0 MOV R10,R16
(0101) }
(0102)
(0103) void coding(unsigned char num)
(0104) { unsigned char i,j,m;
(0105) for(j=0;j<6;j++)
103 2744 CLR R20
104 C002 RJMP 0x0107
(0106) {
(0107) signal_init();
105 DFC4 RCALL _signal_init
106 9543 INC R20
107 3046 CPI R20,6
108 F3E0 BCS 0x0105
(0108) }
(0109)
(0110) for(m=0;m<1;m++)
109 2744 CLR R20
10A C015 RJMP 0x0120
(0111) {
(0112)
(0113) signal_0();
10B DF78 RCALL _signal_0
(0114) signal_1();
10C DF9A RCALL _signal_1
(0115) signal_0();
10D DF76 RCALL _signal_0
(0116) signal_1();
10E DF98 RCALL _signal_1
(0117)
(0118) for(i=0;i<8;i++)
10F 2766 CLR R22
110 C00A RJMP 0x011B
(0119) {
(0120)
(0121) if( ( num&(0x01<<i) )!=0)
111 E001 LDI R16,1
112 2F16 MOV R17,R22
113 D03F RCALL lsl8
114 2C2A MOV R2,R10
115 2220 AND R2,R16
116 F011 BEQ 0x0119
(0122) signal_1();
117 DF8F RCALL _signal_1
118 C001 RJMP 0x011A
(0123) else
(0124) signal_0();
119 DF6A RCALL _signal_0
11A 9563 INC R22
11B 3068 CPI R22,0x8
11C F3A0 BCS 0x0111
(0125)
(0126) }
(0127) signal_init();
11D DFAC RCALL _signal_init
(0128) signal_init();
11E DFAB RCALL _signal_init
11F 9543 INC R20
120 3041 CPI R20,1
121 F348 BCS 0x010B
(0129) }
(0130)
(0131) signal_end();
122 DFCA RCALL _signal_end
123 C028 RJMP pop_xgsetF00C
(0132) }
(0133) //
(0134) void main(void)
(0135) {unsigned code;
(0136) unsigned t=0;
_main:
code --> Y,+1
t --> R20
124 2744 CLR R20
125 2755 CLR R21
(0137) init_devices();
126 DF53 RCALL _init_devices
(0138) DDRD=0x00;
127 2422 CLR R2
128 BA21 OUT 0x11,R2
(0139) PORTD=0x01;
129 E081 LDI R24,1
12A BB82 OUT 0x12,R24
12B C00D RJMP 0x0139
(0140)
(0141) //insert your functional code here...
(0142)
(0143) while(1)
(0144) {
(0145)
(0146) /*
(0147)
(0148) while(PIND!=0x01) ;
(0149) while(PIND==0x01) coding(0x11);
(0150) coding(0xff);
(0151) delay(2000);
(0152) */
(0153) t++;
12C 5F4F SUBI R20,0xFF
12D 4F5F SBCI R21,0xFF
(0154) if(t==0xff) t=0;
12E 3F4F CPI R20,0xFF
12F E0E0 LDI R30,0
130 075E CPC R21,R30
131 F411 BNE 0x0134
132 2744 CLR R20
133 2755 CLR R21
(0155) coding(t);
134 2F04 MOV R16,R20
135 DFCB RCALL _coding
(0156) delay(50000);
FILE: <library>
136 E500 LDI R16,0x50
137 EC13 LDI R17,0xC3
138 DEFC RCALL _delay
139 CFF2 RJMP 0x012C
13A 9508 RET
push_xgsetF000:
13B 937A ST R23,-Y
13C 936A ST R22,-Y
13D 935A ST R21,-Y
13E 934A ST R20,-Y
13F 9508 RET
pop_xgsetF000:
140 9149 LD R20,Y+
141 9159 LD R21,Y+
142 9169 LD R22,Y+
143 9179 LD R23,Y+
144 9508 RET
push_xgsetF00C:
145 937A ST R23,-Y
146 936A ST R22,-Y
147 935A ST R21,-Y
148 934A ST R20,-Y
149 92BA ST R11,-Y
14A 92AA ST R10,-Y
14B 9508 RET
pop_xgsetF00C:
14C 90A9 LD R10,Y+
14D 90B9 LD R11,Y+
14E 9149 LD R20,Y+
14F 9159 LD R21,Y+
150 9169 LD R22,Y+
151 9179 LD R23,Y+
152 9508 RET
lsl8:
153 2311 TST R17
154 F019 BEQ 0x0158
155 0F00 LSL R16
156 951A DEC R17
157 CFFB RJMP lsl8
158 9508 RET
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -