cc1100.s
来自「主要是通过AMEGAL88 来控制cc1100」· S 代码 · 共 1,494 行 · 第 1/2 页
S
1,494 行
.dbline 154
; NOP();
nop
L115:
.dbline 155
.dbline 155
out 0x2e,R16
.dbline 155
L121:
.dbline 155
L122:
.dbline 155
in R2,0x2d
sbrs R2,7
rjmp L121
.dbline 155
L119:
.dbline 155
.dbline 155
L116:
.dbline 155
; SPI_TX(addr);
L124:
.dbline 156
.dbline 156
out 0x2e,R18
.dbline 156
L130:
.dbline 156
L131:
.dbline 156
in R2,0x2d
sbrs R2,7
rjmp L130
.dbline 156
L128:
.dbline 156
.dbline 156
L125:
.dbline 156
; SPI_TX(value);
.dbline 157
; NOP();
nop
.dbline 158
; SPI_OFF();
sbi 0x5,2
.dbline -2
L111:
.dbline 0 ; func end
ret
.dbsym r value 18 c
.dbsym r addr 16 c
.dbend
.dbfunc e spiWriteBurstReg _spiWriteBurstReg fV
; i -> R20
; count -> R22
; buffer -> R18,R19
; addr -> R16
.even
_spiWriteBurstReg::
rcall push_gset2
ldd R22,y+4
.dbline -1
.dbline 162
; }
;
; void spiWriteBurstReg(BYTE addr, BYTE *buffer, BYTE count)
; {
.dbline 164
; UINT8 i;
; SPI_ON();
cbi 0x5,2
L134:
.dbline 165
L135:
.dbline 165
; while((PORT_SPI&1<<MISO));
sbic 0x5,4
rjmp L134
L137:
.dbline 166
.dbline 166
mov R24,R16
ori R24,64
out 0x2e,R24
.dbline 166
L143:
.dbline 166
L144:
.dbline 166
in R2,0x2d
sbrs R2,7
rjmp L143
.dbline 166
L141:
.dbline 166
.dbline 166
L138:
.dbline 166
; SPI_TX(addr | WRITE_BURST);
.dbline 167
; for (i = 0; i < count; i++)
clr R20
rjmp L149
L146:
.dbline 168
; {
L150:
.dbline 169
.dbline 169
mov R30,R20
clr R31
add R30,R18
adc R31,R19
ldd R2,z+0
out 0x2e,R2
.dbline 169
L156:
.dbline 169
L157:
.dbline 169
in R2,0x2d
sbrs R2,7
rjmp L156
.dbline 169
L154:
.dbline 169
.dbline 169
L151:
.dbline 169
.dbline 170
L147:
.dbline 167
inc R20
L149:
.dbline 167
cp R20,R22
brlo L146
.dbline 171
; SPI_TX(buffer[i]);
; }
; SPI_OFF();
sbi 0x5,2
.dbline -2
L133:
rcall pop_gset2
.dbline 0 ; func end
ret
.dbsym r i 20 c
.dbsym r count 22 c
.dbsym r buffer 18 pc
.dbsym r addr 16 c
.dbend
.dbfunc e spiWriteRfSettings _spiWriteRfSettings fV
.even
_spiWriteRfSettings::
sbiw R28,1
.dbline -1
.dbline 179
; }
;
;
;
;
;
; void spiWriteRfSettings()
; {
.dbline 183
;
; // Write register settings
;
; spiWriteReg(CC1100_FSCTRL1, rfSettings.FSCTRL1);
lds R18,_rfSettings
ldi R16,11
rcall _spiWriteReg
.dbline 184
; spiWriteReg(CC1100_FSCTRL0, rfSettings.FSCTRL0);
lds R18,_rfSettings+1
ldi R16,12
rcall _spiWriteReg
.dbline 185
; spiWriteReg(CC1100_FREQ2, rfSettings.FREQ2);
lds R18,_rfSettings+2
ldi R16,13
rcall _spiWriteReg
.dbline 186
; spiWriteReg(CC1100_FREQ1, rfSettings.FREQ1);
lds R18,_rfSettings+3
ldi R16,14
rcall _spiWriteReg
.dbline 187
; spiWriteReg(CC1100_FREQ0, rfSettings.FREQ0);
lds R18,_rfSettings+4
ldi R16,15
rcall _spiWriteReg
.dbline 188
; spiWriteReg(CC1100_MDMCFG4, rfSettings.MDMCFG4);
lds R18,_rfSettings+5
ldi R16,16
rcall _spiWriteReg
.dbline 189
; spiWriteReg(CC1100_MDMCFG3, rfSettings.MDMCFG3);
lds R18,_rfSettings+6
ldi R16,17
rcall _spiWriteReg
.dbline 190
; spiWriteReg(CC1100_MDMCFG2, rfSettings.MDMCFG2);
lds R18,_rfSettings+7
ldi R16,18
rcall _spiWriteReg
.dbline 191
; spiWriteReg(CC1100_MDMCFG1, rfSettings.MDMCFG1);
lds R18,_rfSettings+8
ldi R16,19
rcall _spiWriteReg
.dbline 192
; spiWriteReg(CC1100_MDMCFG0, rfSettings.MDMCFG0);
lds R18,_rfSettings+9
ldi R16,20
rcall _spiWriteReg
.dbline 193
; spiWriteReg(CC1100_CHANNR, rfSettings.CHANNR);
lds R18,_rfSettings+10
ldi R16,10
rcall _spiWriteReg
.dbline 194
; spiWriteReg(CC1100_DEVIATN, rfSettings.DEVIATN);
lds R18,_rfSettings+11
ldi R16,21
rcall _spiWriteReg
.dbline 195
; spiWriteReg(CC1100_FREND1, rfSettings.FREND1);
lds R18,_rfSettings+12
ldi R16,33
rcall _spiWriteReg
.dbline 196
; spiWriteReg(CC1100_FREND0, rfSettings.FREND0);
lds R18,_rfSettings+13
ldi R16,34
rcall _spiWriteReg
.dbline 197
; spiWriteReg(CC1100_MCSM0 , rfSettings.MCSM0 );
lds R18,_rfSettings+14
ldi R16,24
rcall _spiWriteReg
.dbline 198
; spiWriteReg(CC1100_FOCCFG, rfSettings.FOCCFG);
lds R18,_rfSettings+15
ldi R16,25
rcall _spiWriteReg
.dbline 199
; spiWriteReg(CC1100_BSCFG, rfSettings.BSCFG);
lds R18,_rfSettings+16
ldi R16,26
rcall _spiWriteReg
.dbline 200
; spiWriteReg(CC1100_AGCCTRL2, rfSettings.AGCCTRL2);
lds R18,_rfSettings+17
ldi R16,27
rcall _spiWriteReg
.dbline 201
; spiWriteReg(CC1100_AGCCTRL1, rfSettings.AGCCTRL1);
lds R18,_rfSettings+18
ldi R16,28
rcall _spiWriteReg
.dbline 202
; spiWriteReg(CC1100_AGCCTRL0, rfSettings.AGCCTRL0);
lds R18,_rfSettings+19
ldi R16,29
rcall _spiWriteReg
.dbline 203
; spiWriteReg(CC1100_FSCAL3, rfSettings.FSCAL3);
lds R18,_rfSettings+20
ldi R16,35
rcall _spiWriteReg
.dbline 204
; spiWriteReg(CC1100_FSCAL2, rfSettings.FSCAL2);
lds R18,_rfSettings+21
ldi R16,36
rcall _spiWriteReg
.dbline 205
; spiWriteReg(CC1100_FSCAL1, rfSettings.FSCAL1);
lds R18,_rfSettings+22
ldi R16,37
rcall _spiWriteReg
.dbline 206
; spiWriteReg(CC1100_FSCAL0, rfSettings.FSCAL0);
lds R18,_rfSettings+23
ldi R16,38
rcall _spiWriteReg
.dbline 207
; spiWriteReg(CC1100_FSTEST, rfSettings.FSTEST);
lds R18,_rfSettings+24
ldi R16,41
rcall _spiWriteReg
.dbline 208
; spiWriteReg(CC1100_TEST2, rfSettings.TEST2);
lds R18,_rfSettings+25
ldi R16,44
rcall _spiWriteReg
.dbline 209
; spiWriteReg(CC1100_TEST1, rfSettings.TEST1);
lds R18,_rfSettings+26
ldi R16,45
rcall _spiWriteReg
.dbline 210
; spiWriteReg(CC1100_TEST0, rfSettings.TEST0);
lds R18,_rfSettings+27
ldi R16,46
rcall _spiWriteReg
.dbline 213
;
; // Set Syn Byte
; spiWriteReg(CC1100_SYNC1, 0x12);
ldi R18,18
ldi R16,4
rcall _spiWriteReg
.dbline 214
; spiWriteReg(CC1100_SYNC0, 0x34);
ldi R18,52
ldi R16,5
rcall _spiWriteReg
.dbline 215
; spiWriteBurstReg(CC1100_PATABLE, paTable, sizeof(paTable));
ldi R24,8
std y+0,R24
ldi R18,<_paTable
ldi R19,>_paTable
ldi R16,62
rcall _spiWriteBurstReg
.dbline -2
L159:
adiw R28,1
.dbline 0 ; func end
ret
.dbend
.dbfunc e spiSendPacket _spiSendPacket fV
; status -> R20
; size -> R22
; txBuffer -> R20,R21
.even
_spiSendPacket::
rcall push_gset2
mov R22,R18
movw R20,R16
sbiw R28,1
.dbline -1
.dbline 219
; }
;
; void spiSendPacket(BYTE *txBuffer, UINT8 size)
; {
.dbline 223
; BYTE status;
;
; // 写发送缓冲区
; spiWriteBurstReg(CC1100_TXFIFO, txBuffer, size);
std y+0,R22
movw R18,R20
ldi R16,63
rcall _spiWriteBurstReg
.dbline 224
; spiStrobe(CC1100_STX);
ldi R16,53
rcall _spiStrobe
.dbline 226
;
; fCC1100 = SEND;
ldi R24,1
sts _fCC1100,R24
rjmp L189
L188:
.dbline 230
; // 循环直到数据发送完成
;
; while(1)
; {
.dbline 231
; status = spiReadStatus(0x35);
ldi R16,53
rcall _spiReadStatus
mov R20,R16
.dbline 232
; if(status == 1)
cpi R16,1
brne L191
.dbline 233
; break;
rjmp L190
L191:
.dbline 234
L189:
.dbline 229
rjmp L188
L190:
.dbline 240
; }
; /*
;
; while(!GDO0_PIN);
; while(GDO0_PIN);
; */
; fCC1100 = IDLE;
clr R2
sts _fCC1100,R2
.dbline -2
L187:
adiw R28,1
rcall pop_gset2
.dbline 0 ; func end
ret
.dbsym r status 20 c
.dbsym r size 22 c
.dbsym r txBuffer 20 pc
.dbend
.dbfunc e spiReceivePacket _spiReceivePacket fc
; rxStatus -> y+2
; packetLength -> R20
; status -> R20
; length -> R22
; rxBuffer -> R10,R11
.even
_spiReceivePacket::
rcall push_gset3
mov R22,R18
movw R10,R16
sbiw R28,4
.dbline -1
.dbline 244
; }
;
; BOOL spiReceivePacket(BYTE *rxBuffer,UINT8 length)
; {
.dbline 248
;
; UINT8 packetLength;
; BYTE rxStatus[2];
; BYTE status = 0;
clr R20
.dbline 250
;
; memset(rxBuffer,0,10);
ldi R24,10
ldi R25,0
std y+1,R25
std y+0,R24
clr R18
clr R19
movw R16,R10
rcall _memset
.dbline 252
;
; spiStrobe(CC1100_SRX);
ldi R16,52
rcall _spiStrobe
.dbline 253
; fCC1100 = RECIEVE;
ldi R24,2
sts _fCC1100,R24
rjmp L195
L194:
.dbline 257
;
;
; while(1)
; {
.dbline 258
; status = spiReadStatus(0x35);
ldi R16,53
rcall _spiReadStatus
mov R20,R16
.dbline 260
;
; if(status == 1)
cpi R16,1
brne L197
.dbline 261
; {
.dbline 262
; break;
rjmp L196
L197:
.dbline 264
L195:
.dbline 256
rjmp L194
L196:
.dbline 265
; }
; }
; fCC1100 = IDLE;
clr R2
sts _fCC1100,R2
.dbline 267
;
; if ((spiReadStatus(CC1100_RXBYTES) & BYTES_IN_RXFIFO))
ldi R16,59
rcall _spiReadStatus
mov R24,R16
andi R24,127
breq L199
.dbline 268
; {
.dbline 270
; // Read the first byte, also is the length byte
; packetLength = spiReadReg(CC1100_RXFIFO);
ldi R16,63
rcall _spiReadReg
mov R20,R16
.dbline 273
;
; // Read data from RX FIFO and store in rxBuffer
; if (packetLength <= length)
cp R22,R16
brlo L201
.dbline 274
; {
.dbline 275
; spiReadBurstReg(CC1100_RXFIFO, rxBuffer, packetLength);
std y+0,R20
movw R18,R10
ldi R16,63
rcall _spiReadBurstReg
.dbline 276
; length = packetLength;
mov R22,R20
.dbline 277
; spiReadBurstReg(CC1100_RXFIFO, rxStatus, 2);
ldi R24,2
std y+0,R24
movw R18,R28
subi R18,254 ; offset = 2
sbci R19,255
ldi R16,63
rcall _spiReadBurstReg
.dbline 279
;
; return TRUE;
ldi R16,1
rjmp L193
L201:
.dbline 282
; }
; else
; {
.dbline 283
; length = packetLength;
mov R22,R20
.dbline 285
;
; spiStrobe(CC1100_SFRX);
ldi R16,58
rcall _spiStrobe
.dbline 286
; return FALSE;
clr R16
rjmp L193
L199:
.dbline 289
; }
; }
; return FALSE;
clr R16
.dbline -2
L193:
adiw R28,4
rcall pop_gset3
.dbline 0 ; func end
ret
.dbsym l rxStatus 2 A[2:2]c
.dbsym r packetLength 20 c
.dbsym r status 20 c
.dbsym r length 22 c
.dbsym r rxBuffer 10 pc
.dbend
.dbfunc e recPacket _recPacket fV
; rxStatus -> y+1
; packetLength -> R20
; length -> R22
; rxBuffer -> R10,R11
.even
_recPacket::
rcall push_gset3
mov R22,R18
movw R10,R16
sbiw R28,3
.dbline -1
.dbline 293
; }
;
; void recPacket(BYTE *rxBuffer,UINT8 length)
; {
.dbline 299
;
; UINT8 packetLength;
; BYTE rxStatus[2];
;
;
; if ((spiReadStatus(CC1100_RXBYTES) & BYTES_IN_RXFIFO))
ldi R16,59
rcall _spiReadStatus
mov R24,R16
andi R24,127
breq L204
.dbline 300
; {
.dbline 301
; packetLength = spiReadReg(CC1100_RXFIFO);
ldi R16,63
rcall _spiReadReg
mov R20,R16
.dbline 304
;
; // Read data from RX FIFO and store in rxBuffer
; if (packetLength <= length)
cp R22,R16
brlo L206
.dbline 305
; {
.dbline 306
; spiReadBurstReg(CC1100_RXFIFO, rxBuffer, packetLength);
std y+0,R20
movw R18,R10
ldi R16,63
rcall _spiReadBurstReg
.dbline 307
; length = packetLength;
mov R22,R20
.dbline 308
; spiReadBurstReg(CC1100_RXFIFO, rxStatus, 2);
ldi R24,2
std y+0,R24
movw R18,R28
subi R18,255 ; offset = 1
sbci R19,255
ldi R16,63
rcall _spiReadBurstReg
.dbline 312
;
;
;
; }
rjmp L207
L206:
.dbline 314
; else
; {
.dbline 315
; length = packetLength;
mov R22,R20
.dbline 319
;
;
;
; }
L207:
.dbline 320
; }
L204:
.dbline 321
; spiStrobe(CC1100_SFRX);
ldi R16,58
rcall _spiStrobe
.dbline 322
; fCC1100 = IDLE;
clr R2
sts _fCC1100,R2
.dbline -2
L203:
adiw R28,3
rcall pop_gset3
.dbline 0 ; func end
ret
.dbsym l rxStatus 1 A[2:2]c
.dbsym r packetLength 20 c
.dbsym r length 22 c
.dbsym r rxBuffer 10 pc
.dbend
.dbfunc e initWorMode _initWorMode fV
.even
_initWorMode::
.dbline -1
.dbline 326
; }
;
; void initWorMode(void)
; {
.dbline 330
; // Enable automatic initial calibration of RCosc.
; // Set T_event1 ~ 1.4 ms, enough for XOSC stabilize and FS calibration before RX.
; // Enable RC oscillator before starting with WOR (or else it will not wake up).
; spiWriteReg(CC1100_WORCTRL, 0x78); // Not using AUTO_SYNC function.
ldi R18,120
ldi R16,32
rcall _spiWriteReg
.dbline 336
;
; // Set Event0 timeout = 1 s (RX polling interval)
; // WOR_RES = 0
; // T_event0 = 750 / f_xosc * EVENT0 * 2^(5*WOR_RES) = 1 s,f_xosc = 27 MHz
; // => EVENT0 = 0x8CA0
; spiWriteReg(CC1100_WOREVT1, 0x8C); // High byte Event0 timeout
ldi R18,140
ldi R16,30
rcall _spiWriteReg
.dbline 337
; spiWriteReg(CC1100_WOREVT0, 0xA0); // Low byte Event0 timeout.
ldi R18,160
ldi R16,31
rcall _spiWriteReg
.dbline 342
;
; // Setting Rx_timeout =2.596 ms.
; // MCSM2.RX_TIME = 000b
; // => Rx_timeout = EVENT0*C(RX_TIME, WOR_RES)
; spiWriteReg(CC1100_MCSM2, 0x00);
clr R18
ldi R16,22
rcall _spiWriteReg
.dbline 345
;
; // Enable automatic FS calibration when going from IDLE to RX/TX/FSTXON (in between EVENT0 and EVENT1)
; spiWriteReg(CC1100_MCSM0, 0x18);
ldi R18,24
ldi R16,24
rcall _spiWriteReg
.dbline 347
;
; spiStrobe(CC1100_SWORRST);
ldi R16,60
rcall _spiStrobe
.dbline 348
; spiStrobe(CC1100_SWOR);
ldi R16,56
rcall _spiStrobe
.dbline 350
;
; fCC1100 = SLEEP;
ldi R24,3
sts _fCC1100,R24
.dbline -2
L208:
.dbline 0 ; func end
ret
.dbend
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?