📄 avrcc1100.lst
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012D E201 LDI R16,0x21
012E DF9F RCALL _spiWriteReg
(0196) spiWriteReg(CC1100_FREND0, rfSettings.FREND0);
012F 9120010D LDS R18,0x10D
0131 E202 LDI R16,0x22
0132 DF9B RCALL _spiWriteReg
(0197) spiWriteReg(CC1100_MCSM0 , rfSettings.MCSM0 );
0133 9120010E LDS R18,0x10E
0135 E108 LDI R16,0x18
0136 DF97 RCALL _spiWriteReg
(0198) spiWriteReg(CC1100_FOCCFG, rfSettings.FOCCFG);
0137 9120010F LDS R18,0x10F
0139 E109 LDI R16,0x19
013A DF93 RCALL _spiWriteReg
(0199) spiWriteReg(CC1100_BSCFG, rfSettings.BSCFG);
013B 91200110 LDS R18,0x110
013D E10A LDI R16,0x1A
013E DF8F RCALL _spiWriteReg
(0200) spiWriteReg(CC1100_AGCCTRL2, rfSettings.AGCCTRL2);
013F 91200111 LDS R18,0x111
0141 E10B LDI R16,0x1B
0142 DF8B RCALL _spiWriteReg
(0201) spiWriteReg(CC1100_AGCCTRL1, rfSettings.AGCCTRL1);
0143 91200112 LDS R18,0x112
0145 E10C LDI R16,0x1C
0146 DF87 RCALL _spiWriteReg
(0202) spiWriteReg(CC1100_AGCCTRL0, rfSettings.AGCCTRL0);
0147 91200113 LDS R18,0x113
0149 E10D LDI R16,0x1D
014A DF83 RCALL _spiWriteReg
(0203) spiWriteReg(CC1100_FSCAL3, rfSettings.FSCAL3);
014B 91200114 LDS R18,0x114
014D E203 LDI R16,0x23
014E DF7F RCALL _spiWriteReg
(0204) spiWriteReg(CC1100_FSCAL2, rfSettings.FSCAL2);
014F 91200115 LDS R18,0x115
0151 E204 LDI R16,0x24
0152 DF7B RCALL _spiWriteReg
(0205) spiWriteReg(CC1100_FSCAL1, rfSettings.FSCAL1);
0153 91200116 LDS R18,0x116
0155 E205 LDI R16,0x25
0156 DF77 RCALL _spiWriteReg
(0206) spiWriteReg(CC1100_FSCAL0, rfSettings.FSCAL0);
0157 91200117 LDS R18,0x117
0159 E206 LDI R16,0x26
015A DF73 RCALL _spiWriteReg
(0207) spiWriteReg(CC1100_FSTEST, rfSettings.FSTEST);
015B 91200118 LDS R18,0x118
015D E209 LDI R16,0x29
015E DF6F RCALL _spiWriteReg
(0208) spiWriteReg(CC1100_TEST2, rfSettings.TEST2);
015F 91200119 LDS R18,0x119
0161 E20C LDI R16,0x2C
0162 DF6B RCALL _spiWriteReg
(0209) spiWriteReg(CC1100_TEST1, rfSettings.TEST1);
0163 9120011A LDS R18,0x11A
0165 E20D LDI R16,0x2D
0166 DF67 RCALL _spiWriteReg
(0210) spiWriteReg(CC1100_TEST0, rfSettings.TEST0);
0167 9120011B LDS R18,0x11B
0169 E20E LDI R16,0x2E
016A DF63 RCALL _spiWriteReg
(0211)
(0212) // Set Syn Byte
(0213) spiWriteReg(CC1100_SYNC1, 0x12);
016B E122 LDI R18,0x12
016C E004 LDI R16,4
016D DF60 RCALL _spiWriteReg
(0214) spiWriteReg(CC1100_SYNC0, 0x34);
016E E324 LDI R18,0x34
016F E005 LDI R16,5
0170 DF5D RCALL _spiWriteReg
(0215) spiWriteBurstReg(CC1100_PATABLE, paTable, sizeof(paTable));
0171 E088 LDI R24,0x8
0172 8388 STD Y+0,R24
0173 E12D LDI R18,0x1D
0174 E031 LDI R19,1
0175 E30E LDI R16,0x3E
0176 DF67 RCALL _spiWriteBurstReg
0177 9621 ADIW R28,1
0178 9508 RET
_spiSendPacket:
status --> R20
size --> R22
txBuffer --> R20
0179 D18A RCALL push_gset2
017A 2F62 MOV R22,R18
017B 01A8 MOVW R20,R16
017C 9721 SBIW R28,1
(0216) }
(0217)
(0218) void spiSendPacket(BYTE *txBuffer, UINT8 size)
(0219) {
(0220) BYTE status;
(0221)
(0222) // 写发送缓冲区
(0223) spiWriteBurstReg(CC1100_TXFIFO, txBuffer, size);
017D 8368 STD Y+0,R22
017E 019A MOVW R18,R20
017F E30F LDI R16,0x3F
0180 DF5D RCALL _spiWriteBurstReg
(0224) spiStrobe(CC1100_STX);
0181 E305 LDI R16,0x35
0182 DF3F RCALL _spiStrobe
(0225)
(0226) fCC1100 = SEND;
0183 E081 LDI R24,1
0184 93800225 STS fCC1100,R24
0186 C006 RJMP 0x018D
(0227) // 循环直到数据发送完成
(0228)
(0229) while(1)
(0230) {
(0231) status = spiReadStatus(0x35);
0187 E305 LDI R16,0x35
0188 DF02 RCALL _spiReadStatus
0189 2F40 MOV R20,R16
(0232) if(status == 1)
018A 3001 CPI R16,1
018B F409 BNE 0x018D
(0233) break;
018C C001 RJMP 0x018E
018D CFF9 RJMP 0x0187
(0234) }
(0235) /*
(0236)
(0237) while(!GDO0_PIN);
(0238) while(GDO0_PIN);
(0239) */
(0240) fCC1100 = IDLE;
018E 2422 CLR R2
018F 92200225 STS fCC1100,R2
0191 9621 ADIW R28,1
0192 D167 RCALL pop_gset2
0193 9508 RET
_spiReceivePacket:
rxStatus --> Y+2
packetLength --> R20
status --> R20
length --> R22
rxBuffer --> R10
0194 D16D RCALL push_gset3
0195 2F62 MOV R22,R18
0196 0158 MOVW R10,R16
0197 9724 SBIW R28,4
(0241) }
(0242)
(0243) BOOL spiReceivePacket(BYTE *rxBuffer,UINT8 length)
(0244) {
(0245)
(0246) UINT8 packetLength;
(0247) BYTE rxStatus[2];
(0248) BYTE status = 0;
0198 2744 CLR R20
(0249)
(0250) memset(rxBuffer,0,10);
0199 E08A LDI R24,0xA
019A E090 LDI R25,0
019B 8399 STD Y+1,R25
019C 8388 STD Y+0,R24
019D 2722 CLR R18
019E 2733 CLR R19
019F 0185 MOVW R16,R10
01A0 D14E RCALL _memset
(0251)
(0252) spiStrobe(CC1100_SRX);
01A1 E304 LDI R16,0x34
01A2 DF1F RCALL _spiStrobe
(0253) fCC1100 = RECIEVE;
01A3 E082 LDI R24,2
01A4 93800225 STS fCC1100,R24
01A6 C006 RJMP 0x01AD
(0254)
(0255)
(0256) while(1)
(0257) {
(0258) status = spiReadStatus(0x35);
01A7 E305 LDI R16,0x35
01A8 DEE2 RCALL _spiReadStatus
01A9 2F40 MOV R20,R16
(0259)
(0260) if(status == 1)
01AA 3001 CPI R16,1
01AB F409 BNE 0x01AD
(0261) {
(0262) break;
01AC C001 RJMP 0x01AE
01AD CFF9 RJMP 0x01A7
(0263) }
(0264) }
(0265) fCC1100 = IDLE;
01AE 2422 CLR R2
01AF 92200225 STS fCC1100,R2
(0266)
(0267) if ((spiReadStatus(CC1100_RXBYTES) & BYTES_IN_RXFIFO))
01B1 E30B LDI R16,0x3B
01B2 DED8 RCALL _spiReadStatus
01B3 2F80 MOV R24,R16
01B4 778F ANDI R24,0x7F
01B5 F0C1 BEQ 0x01CE
(0268) {
(0269) // Read the first byte, also is the length byte
(0270) packetLength = spiReadReg(CC1100_RXFIFO);
01B6 E30F LDI R16,0x3F
01B7 DEBE RCALL _spiReadReg
01B8 2F40 MOV R20,R16
(0271)
(0272) // Read data from RX FIFO and store in rxBuffer
(0273) if (packetLength <= length)
01B9 1760 CP R22,R16
01BA F070 BCS 0x01C9
(0274) {
(0275) spiReadBurstReg(CC1100_RXFIFO, rxBuffer, packetLength);
01BB 8348 STD Y+0,R20
01BC 0195 MOVW R18,R10
01BD E30F LDI R16,0x3F
01BE DEE3 RCALL _spiReadBurstReg
(0276) length = packetLength;
01BF 2F64 MOV R22,R20
(0277) spiReadBurstReg(CC1100_RXFIFO, rxStatus, 2);
01C0 E082 LDI R24,2
01C1 8388 STD Y+0,R24
01C2 019E MOVW R18,R28
01C3 5F2E SUBI R18,0xFE
01C4 4F3F SBCI R19,0xFF
01C5 E30F LDI R16,0x3F
01C6 DEDB RCALL _spiReadBurstReg
(0278)
(0279) return TRUE;
01C7 E001 LDI R16,1
01C8 C006 RJMP 0x01CF
(0280) }
(0281) else
(0282) {
(0283) length = packetLength;
01C9 2F64 MOV R22,R20
(0284)
(0285) spiStrobe(CC1100_SFRX);
01CA E30A LDI R16,0x3A
01CB DEF6 RCALL _spiStrobe
(0286) return FALSE;
01CC 2700 CLR R16
01CD C001 RJMP 0x01CF
(0287) }
(0288) }
(0289) return FALSE;
01CE 2700 CLR R16
01CF 9624 ADIW R28,4
01D0 D12B RCALL pop_gset3
01D1 9508 RET
_recPacket:
rxStatus --> Y+1
packetLength --> R20
length --> R22
rxBuffer --> R10
01D2 D12F RCALL push_gset3
01D3 2F62 MOV R22,R18
01D4 0158 MOVW R10,R16
01D5 9723 SBIW R28,3
(0290) }
(0291)
(0292) void recPacket(BYTE *rxBuffer,UINT8 length)
(0293) {
(0294)
(0295) UINT8 packetLength;
(0296) BYTE rxStatus[2];
(0297)
(0298)
(0299) if ((spiReadStatus(CC1100_RXBYTES) & BYTES_IN_RXFIFO))
01D6 E30B LDI R16,0x3B
01D7 DEB3 RCALL _spiReadStatus
01D8 2F80 MOV R24,R16
01D9 778F ANDI R24,0x7F
01DA F099 BEQ 0x01EE
(0300) {
(0301) packetLength = spiReadReg(CC1100_RXFIFO);
01DB E30F LDI R16,0x3F
01DC DE99 RCALL _spiReadReg
01DD 2F40 MOV R20,R16
(0302)
(0303) // Read data from RX FIFO and store in rxBuffer
(0304) if (packetLength <= length)
01DE 1760 CP R22,R16
01DF F068 BCS 0x01ED
(0305) {
(0306) spiReadBurstReg(CC1100_RXFIFO, rxBuffer, packetLength);
01E0 8348 STD Y+0,R20
01E1 0195 MOVW R18,R10
01E2 E30F LDI R16,0x3F
01E3 DEBE RCALL _spiReadBurstReg
(0307) length = packetLength;
01E4 2F64 MOV R22,R20
(0308) spiReadBurstReg(CC1100_RXFIFO, rxStatus, 2);
01E5 E082 LDI R24,2
01E6 8388 STD Y+0,R24
01E7 019E MOVW R18,R28
01E8 5F2F SUBI R18,0xFF
01E9 4F3F SBCI R19,0xFF
01EA E30F LDI R16,0x3F
01EB DEB6 RCALL _spiReadBurstReg
(0309)
(0310)
(0311)
(0312) }
01EC C001 RJMP 0x01EE
(0313) else
(0314) {
(0315) length = packetLength;
01ED 2F64 MOV R22,R20
(0316)
(0317)
(0318)
(0319) }
(0320) }
(0321) spiStrobe(CC1100_SFRX);
01EE E30A LDI R16,0x3A
01EF DED2 RCALL _spiStrobe
(0322) fCC1100 = IDLE;
01F0 2422 CLR R2
01F1 92200225 STS fCC1100,R2
01F3 9623 ADIW R28,3
01F4 D107 RCALL pop_gset3
01F5 9508 RET
(0323) }
(0324)
(0325) void initWorMode(void)
(0326) {
(0327) // Enable automatic initial calibration of RCosc.
(0328) // Set T_event1 ~ 1.4 ms, enough for XOSC stabilize and FS calibration before RX.
(0329) // Enable RC oscillator before starting with WOR (or else it will not wake up).
(0330) spiWriteReg(CC1100_WORCTRL, 0x78); // Not using AUTO_SYNC function.
_initWorMode:
01F6 E728 LDI R18,0x78
01F7 E200 LDI R16,0x20
01F8 DED5 RCALL _spiWriteReg
(0331)
(0332) // Set Event0 timeout = 1 s (RX polling interval)
(0333) // WOR_RES = 0
(0334) // T_event0 = 750 / f_xosc * EVENT0 * 2^(5*WOR_RES) = 1 s,f_xosc = 27 MHz
(0335) // => EVENT0 = 0x8CA0
(0336) spiWriteReg(CC1100_WOREVT1, 0x8C); // High byte Event0 timeout
01F9 E82C LDI R18,0x8C
01FA E10E LDI R16,0x1E
01FB DED2 RCALL _spiWriteReg
(0337) spiWriteReg(CC1100_WOREVT0, 0xA0); // Low byte Event0 timeout.
01FC EA20 LDI R18,0xA0
01FD E10F LDI R16,0x1F
01FE DECF RCALL _spiWriteReg
(0338)
(0339) // Setting Rx_timeout =2.596 ms.
(0340) // MCSM2.RX_TIME = 000b
(0341) // => Rx_timeout = EVENT0*C(RX_TIME, WOR_RES)
(0342) spiWriteReg(CC1100_MCSM2, 0x00);
01FF 2722 CLR R18
0200 E106 LDI R16,0x16
0201 DECC RCALL _spiWriteReg
(0343)
(0344) // Enable automatic FS calibration when going from IDLE to RX/TX/FSTXON (in between EVENT0 and EVENT1)
(0345) spiWriteReg(CC1100_MCSM0, 0x18);
0202 E128 LDI R18,0x18
0203 E108 LDI R16,0x18
0204 DEC9 RCALL _spiWriteReg
(0346)
(0347) spiStrobe(CC1100_SWORRST);
0205 E30C LDI R16,0x3C
0206 DEBB RCALL _spiStrobe
(0348) spiStrobe(CC1100_SWOR);
0207 E308 LDI R16,0x38
0208 DEB9 RCALL _spiStrobe
(0349)
(0350) fCC1100 = SLEEP;
0209 E083 LDI R24,3
020A 93800225 STS fCC1100,R24
020C 9508 RET
_setPktType:
regVal --> R20
pktType --> R22
020D D0F6 RCALL push_gset2
020E 2F60 MOV R22,R16
FILE: H:\work\myWork\AVR-CC1100\protocol.h
(0001) /*
(0002) *
(0003) * 文件名 ： protocol.c
(0004) *
(0005) * 程序描述：有关CC1100之间通信过程的相关定义
(0006) *
(0007) * author : 陈思
(0008) *
(0009) */
(0010)
(0011) #ifndef PROTOCOL_H
(0012) #define PROTOCOL_H
(0013)
(0014) #include "cc1100.h"
(0015)
(0016) // 设置GDO2 为外部中断0，用来检测数据发送和接收检测
(0017) #define GDO2_INT0() do{ spiWriteReg(CC1100_IOCFG2,0x06); }while(0)
(0018) // 设置USART数据接收完成中断
(0019) #define USART_RECINT_ENABLE() do{ UCSR0B |= (1<<RXCIE0); }while(0)
(0020) // 关闭此中断
(0021) #define USART_RECINT_DISABLE() do{ UCSR0B &= ~(1<<RXCIE0); }while(0)
(0022)
(0023)
(0024)
(0025) // 设置数据报类型函数
(0026) BOOL setPktType( PacketType pktType)
(0027) {
(0028) BYTE regVal;
(0029) //ErroState ret;
(0030) regVal = spiReadReg(CC1100_PKTCTRL0); // 读取PKTCTRL0
020F E008 LDI R16,0x8
0210 DE65 RCALL _spiReadReg
0211 2F40 MOV R20,R16
(0031)
(0032) if(pktType == FIX_LENGTH)
0212 2366 TST R22
0213 F419 BNE 0x0217
(0033) {
(0034) regVal |= 0x03;
0214 6043 ORI R20,3
(0035) regVal &= 0xFC; // 设置数据报为固定长度，需要配置PKTLEN寄存器
0215 7F4C ANDI R20,0xFC
(0036) }
0216 C007 RJMP 0x021E
(0037)
(0038) else if(pktType == DEFINED_LENGTH)
0217 3061 CPI R22,1
0218 F419 BNE 0x021C
(0039) {
(0040) regVal |= 0x03;
0219 6043 ORI R20,3
(0041) regVal &= 0xFD;
021A 7F4D ANDI R20,0xFD
(0042) }
021B C002 RJMP 0x021E
(0043)
(0044) else
(0045) return FALSE;
021C 2700 CLR R16
021D C004 RJMP 0x0222
(0046)
(0047) spiWriteReg(CC1100_PKTCTRL0,regVal);
021E 2F24 MOV R18,R20
021F E008 LDI R16,0x8
0220 DEAD RCALL _spiWriteReg
(0048)
(0049) //ret = NO_ERRO;
(0050) return TRUE;
0221 E001 LDI R16,1
0222 D0D7 RCALL pop_gset2
0223 9508 RET
_setPktLen:
pktLength --> R20
0224 D0E1 RCALL push_gset1
0225 2F40 MOV R20,R16
(0051) }
(0052)
(0053) // 在固定数据报长度时，配置数据报的长度
(0054) // 如果有地址域，则地址也要占用一个BYTE
(0055) BOOL setPktLen(BYTE pktLength)
(0056) {
(0057) //ErroState ret;
(0058) if(pktLength >1 && pktLength <= 255)
0226 E081 LDI R24,1
0227 1784 CP R24,R20
0228 F438 BCC 0x0230
0229 EF8F LDI R24,0xFF
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