communicate.h

驱动128芯片 完成基本的 PORTA亮灯调试功能

#define uint8_t 	unsigned char
#define uint16_t	int
/* @brief register settings for cc1000 */
#define MAIN_PARAM       0x11 
#define FREQ2A_PARAM     0x7C // 914.9988 Mhz
#define FREQ1A_PARAM     0x20
#define FREQ0A_PARAM     0x00
#define FREQ2B_PARAM     0x5D
#define FREQ1B_PARAM     0x0B
#define FREQ0B_PARAM     0x43
//from here to FS_DELAY_PARAM gets written sequentially

#define FSEP1_PARAM      0x03
#define FSEP0_PARAM      0xE3

#define RX_CURRENT_PARAM 0x8C
#define FRONT_END_PARAM  0x30
#define PA_POW_PARAM     0xFF
#define PLL_RX_PARAM     0x70
#define LOCK_PARAM       0x10
#define CAL_PARAM        0x26
#define MODEM2_PARAM     0x90
#define MODEM1_PARAM     0x6F

#define MODEM0_PARAM     0x55 //19.2kbps

#define MATCH_PARAM      0x20
#define FSCTRL_PARAM     0x01
#define FSHAPE7_PARAM    0x00
#define FSHAPE6_PARAM    0x00
#define FSHAPE5_PARAM    0x00
#define FSHAPE4_PARAM    0x00
#define FSHAPE3_PARAM    0x00
#define FSHAPE2_PARAM    0x00
#define FSHAPE1_PARAM    0x00
#define FSDELAY_PARAM    0x00
#define PRESCALER_PARAM  0x00
#define TEST6_PARAM      0x00
#define TEST5_PARAM      0x00
#define TEST4_PARAM      0x3F
#define TEST3_PARAM      0x00
#define TEST2_PARAM      0x00
#define TEST1_PARAM      0x00
#define TEST0_PARAM      0x00
#define TX_CURRENT_PARAM 0xF3
#define PLL_TX_PARAM     0x70

uint8_t cc1000_params[30][6] =
{
   {  // 902.265, 19.2 kBoudrate      0x00
      0xD6,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03			
      0xD6,0x07,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  // 902.791, 19.2 kBoudrate 902.79156759906759906759906759885     0x01
      0xD6,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03      
      0xD6,0x27,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  // 903.318, 19.2 kBoudrate 903.31828379953379953379953379931     0x02
      0xD6,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03 
      0xD6,0x47,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  // 903.845, 19.2 kBoudrate        0x03  
      0xD6,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD6,0x67,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  // 904.371, 19.2 kBoudrate       0x04
      0xD6,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03      
      0xD6,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06		
   },
   {  // 904.898, 19.2 kBoudrate       0x05
      0xD6,0xa0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03   
      0xD6,0xa7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  // 905.43f, 19.2 kBoudrate       0x06  
      0xD6,0xc0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD6,0xc7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_905_951_MHZ        0x07  
      0xD6,0xE0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD6,0xE7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_906_478_MHZ	0x08  
      0xD7,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD7,0x07,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_907_004_MHZ        0x0a
      0xD7,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD7,0x27,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_907_531_MHZ        0x0a
      0xD7,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03				
      0xD7,0x47,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_908_058_MHZ        0x0b
      0xD7,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03	
      0xD7,0x67,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_908_584_MHZ	0x0c
      0xD7,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD7,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_909_111_MHZ	0x0d  
      0xD7,0xA0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD7,0xA7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_909_638_MHZ        0x0e
      0xD7,0xc0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD7,0xc7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_910_164_MHZ        0x0f
      0xD7,0xE0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD7,0xE7,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_910_691_MHZ	0x10
      0xD8,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD8,0x07,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_911_217_MHZ	0x11
      0xD8,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD8,0x27,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_911_744_MHZ        0x12
      0xD8,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03				
      0xD8,0x47,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_912_271_MHZ        0x13
      0xD8,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD8,0x67,0x2B// FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_912_797_MHZ	0x14
      0xD8,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03	
      0xD8,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_913_324_MHZ	0x15
      0xD8,0xA0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD8,0xA7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_913_851_MHZ        0x16
      0xD8,0xc0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD8,0xc7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_914_377_MHZ        0x17
      0xD8,0xE0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD8,0xE7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {   //#define FREQ_914_907_MHZ        0x18
      0xD9,0x00,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD9,0x07,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_915_430_MHZ        0x19
      0xD9,0x20,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD9,0x27,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_915_957_MHZ        0x1a
      0xD9,0x40,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD9,0x47,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_916_484_MHZ        0x1b
      0xD9,0x60,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD9,0x67,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_917_010_MHZ        0x1c
      0xD9,0x80,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03
      0xD9,0x87,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   }, 
   {  //#define FREQ_917_537_MHZ        0x1d
      0xD9,0xA0,0x00,// FREQ2A,FREQ1A,FREQ0A 01 - 03       
      0xD9,0xA7,0x2B // FREQ2B,FREQ1B,FREQ0B 04 - 06
   } 
}; 

// The registers defined in the CC1000 data sheet
#define CC1000_MAIN            0x00
#define CC1000_FREQ_2A         0x01
#define CC1000_FREQ_1A         0x02
#define CC1000_FREQ_0A         0x03
#define CC1000_FREQ_2B         0x04
#define CC1000_FREQ_1B         0x05
#define CC1000_FREQ_0B         0x06
#define CC1000_FSEP1           0x07
#define CC1000_FSEP0           0x08
#define CC1000_CURRENT         0x09
#define CC1000_FRONT_END       0x0A
#define CC1000_PA_POW          0x0B
#define CC1000_PLL             0x0C
#define CC1000_LOCK            0x0D
#define CC1000_CAL             0x0E
#define CC1000_MODEM2          0x0F
#define CC1000_MODEM1          0x10
#define CC1000_MODEM0          0x11
#define CC1000_MATCH           0x12
#define CC1000_FSCTRL          0x13
#define CC1000_FSHAPE7         0x14
#define CC1000_FSHAPE6         0x15
#define CC1000_FSHAPE5         0x16
#define CC1000_FSHAPE4         0x17
#define CC1000_FSHAPE3         0x18
#define CC1000_FSHAPE2         0x19
#define CC1000_FSHAPE1         0x1A
#define CC1000_FSDELAY         0x1B
#define CC1000_PRESCALER       0x1C
#define CC1000_TEST6           0x40
#define CC1000_TEST5           0x41
#define CC1000_TEST4           0x42
#define CC1000_TEST3           0x43
#define CC1000_TEST2           0x44
#define CC1000_TEST1           0x45
#define CC1000_TEST0           0x46

// The bit definitions in the MAIN register
#define CC1000_RXTX			7
#define CC1000_F_REG		6
#define CC1000_RX_PD		5
#define CC1000_TX_PD		4
#define CC1000_FS_PD		3
#define CC1000_CORE_PD		2
#define CC1000_BIAS_PD		1
#define CC1000_RESET_N		0

// The bit definitions in the CURRENT register
//CURRENT[7-4],  control of current in VCO core for TX and RX
#define CC1000_VCO_CURRENT	4
//control of current in VCO buffer for LO drive
#define CC1000_LO_DRIVE		2
//control of current in VCO buffer for PA
#define CC1000_PA_DRIVE		0

// The bit definitions in the FRONT_END register
#define CC1000_BUF_CURRENT	5
#define CC1000_LNA_CURRENT	3
#define CC1000_IF_RSSI		1
#define CC1000_XOSC_BYPASS	0

// The bit definitions in the PA_POW register
#define CC1000_PA_HIGHPOWER	4
#define CC1000_PA_LOWPOWER	0

// The bit definitions in the PLL register
#define CC1000_EXT_FILTER	7
#define CC1000_REFDIV		3
#define CC1000_ALARM_DISABLE	2
#define CC1000_ALARM_H		1
#define CC1000_ALARM_L		0

// The Bit Definitions in the LOCK register
#define CC1000_LOCK_SELECT	4
#define CC1000_PLL_LOCK_ACCURACY	3
#define CC1000_PLL_LOCK_LENGTH	2
#define CC1000_LOCK_INSTANT	1
#define CC1000_LOCK_CONTINUOUS	0

// Bit Definitions in the CAL register 
#define CC1000_CAL_START	7
#define CC1000_CAL_DUAL		6
#define CC1000_CAL_WAIT		5
#define CC1000_CAL_CURRENT	4
#define CC1000_CAL_COMPLETE	3
#define CC1000_CAL_ITERATE	0  //3 bits

// Bit definitions in the MODEM2 register
#define CC1000_PEAKDETECT		7 
#define CC1000_PEAK_LEVEL_OFFSET	0 //7 bits

// Bit Definitions in MODEM1 Register 
#define CC1000_MLIMIT		5
#define CC1000_LOCK_AVG_IN	4
#define CC1000_LOCK_AVG_MODE	3
#define CC1000_SETTLING		1
#define CC1000_MODEM_RESET_N	0

// Bit Definitions in  MODEM0 Register 
#define CC1000_BAUDRATE		4
#define CC1000_DATA_FORMAT	2
#define CC1000_XOSC_FREQ	0

// Bit Definitions in MATCH Register 
#define CC1000_RX_MATCH		4
#define CC1000_TX_MATCH		0

// Bit Definitions in FSCTLR Register 
#define CC1000_DITHER1		3
#define CC1000_DITHER0		2
#define CC1000_SHAPE		1
#define CC1000_FS_RESET_N	0

// Bit Definitions in PRESCALER Register 
#define CC1000_PRE_SWING		6
#define CC1000_PRE_CURRENT	4
#define CC1000_IF_INPUT		3
#define CC1000_IF_FRONT		2

//Pin definitions
#define PALE             4
#define PDATA            7
#define PCLK             6

// Mode definitions
#define CC1000_MODE_RX    0x00
#define CC1000_MODE_TX    0x01
#define CC1000_MODE_PD    0x02
#define CC1000_MODE_SLEEP 0x03

/* CC1000 ioctl requests */
/* set transmit power, takes uint8_t argument */
#define CC1000_TX_POWER 0
#define CC1000_RSSI     1
#define CC1000_FREQ     2
#define CC1000_RTS      3
#define CC1000_NO_RTS   4
#define CC1000_GET_TX_POWER 5

/** @brief Radio is on. */
#define MODE_ON 0 
/** @brief Radio is off.*/ 
#define MODE_OFF 1 

/*some constants*/
#define FREQ 0x03

/** @brief Number of preamble bytes you need to see. */
#define PREAMBLE_THRESH 6
/** @brief Number of preamble bytes you need to send. */ 
#define PREAMBLE_LEN 16
/** @brief Actual byte to send as preamble */
#define PREAMBLE_BYTE 0xAA

#define FLUSH_BYTE 0xff

//Declaration of function
void cc1000_write(uint8_t, uint8_t);
uint8_t cc1000_read(uint8_t);
void cc1000_calibrate(void);
void cc1000_reset(void);
void cc1000_mode(uint8_t);