pagedef.h

T-kernel 的extension源代码

/*
 *----------------------------------------------------------------------
 *    T-Kernel / Standard Extension
 *
 *    Copyright (C) 2006 by Ken Sakamura. All rights reserved.
 *    T-Kernel / Standard Extension is distributed 
 *      under the T-License for T-Kernel / Standard Extension.
 *----------------------------------------------------------------------
 *
 *    Version:   1.00.00
 *    Released by T-Engine Forum(http://www.t-engine.org) at 2006/8/11.
 *
 *----------------------------------------------------------------------
 */

/*
 *	pagedef.h (memory)
 *
 *	Page-related definitions
 */

#ifndef _PM_PAGEDEF_H_
#define _PM_PAGEDEF_H_


/* ------------------------------------------------------------------------ */
/*
 *	Cache control function
 *
 *	Since the actual effect of cache control functions depends on the hardware, it is
 *	not identical to the function specifications. For example, if cache cannot be
 *	controlled on a page basis, it will be controlled as a whole.
 *
 *	Depending on the model, the following cache control functions are reset
 *	and redefined as necessary. (model/cpu.h)
 */

/*
 * Synchronization between instruction and data caches (in any area)
 *	void SyncIDCacheArea( VP laddr, W size, UW lsid )
 *
 *	Synchronize contents of the instruction and data caches in an area of size bytes
 *	(starting from a logical address laddr) in logical space lsid. 
 *	It may include areas that are not paged in.
 */
#define	SyncIDCacheArea(laddr, size, lsid)	/* NOP */

/*
 * Write back data cache (one page)
 *	void WriteBackDCachePage( VP laddr, UW lsid )
 *
 *	Cancel data cache content of one page that includes a logical
 *	address laddr in lsid logical space by writing the content
 *	to memory for synchronization.
 *	(whether to cancel the instruction cache depends on the model)
 *	It is necessary that the page including laddr has been paged in.
 *
 *	Same as InvalidateCachePage() in the case of write-through cache.
 */
#define	WriteBackDCachePage(laddr, lsid)    InvalidateCachePage(laddr, lsid)

/*
 * Cancel cache (one page)
 *	void InvalidateCachePage( VP laddr, UW lsid )
 *
 *	Cancel cache content of one page that includes a logical
 *	address laddr in lsid logical space.
 *	Data cache is not written back.
 *	(It may be written back depending on the model.)
 *	It is necessary that the page including laddr has been paged in.
 */
#define	InvalidateCachePage(laddr, lsid)	/* NOP */

/* ------------------------------------------------------------------------ */

#include <sys/memdef.h>
#include "cpu.h"

/*
 * Page size
 *	PageCount	Obtain the number of pages
 *	RoundPage	Round up on a page basis
 */
Inline UW PageCount( UW byte_sz )
{
	return (byte_sz + (PAGESIZE - 1)) / PAGESIZE;
}
Inline UW RoundPage( UW byte_sz )
{
	return (byte_sz + (PAGESIZE - 1)) & ~(UW)(PAGESIZE - 1);
}

/*
 * Page address
 *	PageOffset	Offset within page
 *	PageAlignL	Align on the lower page boundary
 *	PageAlignU	Align on the upper page boundary
 *	NextPage	Address of space located one page forward
 */
Inline UW PageOffset( VP addr )
{
	return (UW)addr & (PAGESIZE - 1);
}
Inline VP PageAlignL( VP addr )
{
	return (VP)((UW)addr & ~(UW)(PAGESIZE - 1));
}
Inline VP PageAlignU( VP addr )
{
	return (VP)(((UW)addr + (PAGESIZE - 1)) & ~(UW)(PAGESIZE - 1));
}
Inline VP NextPage( VP addr )
{
	return (VB*)addr + PAGESIZE;
}

#endif