cpu_asm.s

T-kernel 的extension源代码

/*
 *----------------------------------------------------------------------
 *    T-Kernel / Standard Extension
 *
 *    Copyright (C) 2006 by Ken Sakamura. All rights reserved.
 *    T-Kernel / Standard Extension is distributed 
 *      under the T-License for T-Kernel / Standard Extension.
 *----------------------------------------------------------------------
 *
 *    Version:   1.00.00
 *    Released by T-Engine Forum(http://www.t-engine.org) at 2006/8/11.
 *
 *----------------------------------------------------------------------
 */

/*
 *	cpu_arm.S (memory)
 *
 *	S1C38K (ARM7)-dependent functions
 */

#define _in_asm_source_
#include <machine.h>
#include <tk/asm.h>
#include <sys/sysinfo.h>
#include <sys/memdef.h>

/*
 * Call system program
 * ER CallSysProgInit( INT ac, UB *av[], FP entry )
 */
	.text
	.balign	4
	.globl	Csym(CallSysProgInit)
Csym(CallSysProgInit):
	stmfd	sp!, {r4-r10, fp, lr}	// Save register
	mov	lr, pc
	bx	r2			// call entry(ac, av)
	ldmfd	sp!, {r4-r10, fp, pc}	// Restore register

/* ------------------------------------------------------------------------ */

/*
 * Prefetch abort handler entry
 *	TA_ASM-format handler
 */
	.text
	.balign	4
	.globl	Csym(asmIAbortHdr)
Csym(asmIAbortHdr):
	mov	ip, sp			// ip = ABT mode stack position

	msr	cpsr_c, #PSR_SVC|PSR_DI	// Move to SVC mode, interrupt-disabled

	stmfd	sp!, {r0-r3, lr}	// Save register
	mov	r1, ip			// r1 = ExcStack position

	ldr	ip, =TASKINDP
	ldr	r3, [ip]
	add	r3, r3, #1		// Enter into task-independent section
	str	r3, [ip]

	ldr	r0, =EIT_IABORT
	bl	Csym(PageFaultHdr)	// call PageFaultHdr(vecno, sp)

	msr	cpsr_c, #PSR_SVC|PSR_DI	// Interrupt-disabled

	ldr	ip, =TASKINDP
	ldr	r3, [ip]
	sub	r3, r3, #1		// Exit form task-independent section
	str	r3, [ip]

	cmp	r0, #0
	ldmfd	sp!, {r0-r3, lr}	// Restore register
	bne	ia_goto_monitor

	TK_RET_INT PSR_ABT		// tk_ret_int()

  ia_goto_monitor:
	msr	cpsr_c, #PSR_ABT|PSR_DI
	ldr	lr, =Csym(DefaultHandlerEntry)
	ldr	lr, [lr]
	ldr	ip, =EITVEC(EIT_IABORT)
	bx	lr

/*
 * Data abort handler entry
 *	TA_ASM-format handler
 */
	.text
	.balign	4
	.globl	Csym(asmDAbortHdr)
Csym(asmDAbortHdr):
	mov	ip, sp			// ip = ABT mode stack position

	msr	cpsr_c, #PSR_SVC|PSR_DI	// Move to SVC mode, interrupt-disabled

	stmfd	sp!, {r0-r3, lr}	// Save register
	mov	r1, ip			// r1 = ExcStack position

	bl	DAbortAdj		// Restoration processing of base registers

	ldr	ip, =TASKINDP
	ldr	r3, [ip]
	add	r3, r3, #1		// Enter into task-independent section
	str	r3, [ip]

	ldr	r0, =EIT_DABORT
	bl	Csym(PageFaultHdr)	// call PageFaultHdr(vecno, sp)

	msr	cpsr_c, #PSR_SVC|PSR_DI	// Interrupt-disabled

	ldr	ip, =TASKINDP
	ldr	r3, [ip]
	sub	r3, r3, #1		// Exit from task-independent section
	str	r3, [ip]

	cmp	r0, #0
	ldmfd	sp!, {r0-r3, lr}	// Restore register
	bne	da_goto_monitor

	TK_RET_INT PSR_ABT		// tk_ret_int()

  da_goto_monitor:
	msr	cpsr_c, #PSR_ABT|PSR_DI
	ldr	lr, =Csym(DefaultHandlerEntry)
	ldr	lr, [lr]
	ldr	ip, =EITVEC(EIT_DABORT)
	bx	lr

/* ------------------------------------------------------------------------ */
/*
 *	Provisional abort handler
 *
 *	Used provisionally until T-Kernel starts.
 *	Switched to a regular abort handler after T-Kernel startup.
 */

/*
 * Provisional data abort handler
 */
	.text
	.balign	4
	.globl	Csym(TmpDAbortHdr)
Csym(TmpDAbortHdr):
	mov	ip, sp			// ip = ABT mode stack position
	msr	cpsr_c, #PSR_SVC|PSR_DI	// Move to SVC mode, interrupt-disabled
	stmfd	sp!, {r0-r3, lr}	// Save register

	mov	r1, ip			// r1 = ExcStack position
	bl	DAbortAdj		// Restoration processing of base registers

	mrc	p15, 0, r0, cr6, c0	// Intended address
	ldr	r1, =0
	bl	Csym(PageIn)		// call PageIn(laddr, lsid=0)

	ldmfd	sp!, {r0-r3, lr}	// Restore register
	msr	cpsr_c, #PSR_ABT|PSR_DI
	EXC_RETURN

/* ------------------------------------------------------------------------ */

/*
 * Restoration processing of base registers in case of data abort
 *	r1 = ExcStack position
 *	sp = Location where r0 to r3 and r14_svc are saved
 *		+---------------+
 *	  r1 ->	|SPSR		| Register saved through entry
 *		|R12=ip		| processing of abort exceptions
 *		|R14_abt=lr	|
 *		+---------------+
 *		+---------------+
 *	  sp ->	|R0		| Registers saved by data abort handler
 *		|R1		|
 *		|R2		|
 *		|R3		|
 *		|R14_svc=lr	|
 *		+---------------+
 *	Other registers than mentioned above are not saved.
 *
 *	Do not destroy other resisters than r0, r2, r3 and ip.
 */
	.text
	.balign	4
DAbortAdj:
	stmfd	sp!, {lr}
	ldr	ip, =0
	swi	SWI_MONITOR	// Call tm_monitor() monitor.
	ldmfd	sp!, {lr}

	bx	lr

/* ------------------------------------------------------------------------ */

/*
 * Handler for receiving process forced termination requests
 *	Called by SWI 11 in the same format as in tk_ret_int().
 *
 *	Exception and interrupt stacks in processor mode that caused monitoring
 *		+---------------+
 *    sp_xxx ->	| R14_svc	|
 *		| SPSR		|
 *		| R12_xxx (ip)	|
 *		| R14_xxx (lr)	| <- Return address
 *		+---------------+
 */
	.text
	.balign	4
	.globl	Csym(asmKillProcHdr)
Csym(asmKillProcHdr):
	/* SVC mode, interrupt-disabled CPSR.I=1 F=? */
	stmfd	sp!, {r0-r3}		// Save register

	ldr	ip, =TASKINDP
	ldr	r3, [ip]
	add	r3, r3, #1		// Enter into task-independent section
	str	r3, [ip]

	ldr	ip, [sp, #4*4]		// SPSR
	and	ip, ip, #PSR_M(31)
	cmp	ip, #PSR_USR		// Calls from USR or SYS mode
	cmpne	ip, #PSR_SYS		// is not considered as a process forced termination request.
	beq	no_killproc

	orr	ip, ip, #PSR_DI
	msr	cpsr_c, ip		// Reset to original mode.

	ldr	r0, =-SWI_KILLPROC	// r0 = dintno
	add	r1, sp, #1*4		// r1 = sp

	msr	cpsr_c, #PSR_SVC|PSR_DI	// To SVC mode

	bl	Csym(SysExcHdr)		// call SysExcHdr(dintno, sp)

	msr	cpsr_c, #PSR_SVC|PSR_DI	// Interrupt-disabled

	ldr	ip, =TASKINDP
	ldr	r3, [ip]
	sub	r3, r3, #1		// Exit form task-independent section
	str	r3, [ip]

	ldmfd	sp!, {r0-r3}		// Restore register
	ldmfd	sp!, {lr}		// SPSR
	orr	lr, lr, #PSR_DI
	ldmfd	sp!, {ip}		// Restore ip
	add	sp, sp, #4		// Discard lr_svc.
	msr	cpsr_c, lr		// Reset to original mode.
	swi	SWI_RETINT		// tk_ret_int()

  no_killproc:
	ldr	r0, =SWI_KILLPROC	// r0 = dintno
	add	r1, sp, #4*4		// r1 = sp

	bl	Csym(SysExcHdr)		// call SysExcHdr(dintno, sp)

	msr	cpsr_c, #PSR_SVC|PSR_DI	// Interrupt-disabled

	ldr	ip, =TASKINDP
	ldr	r3, [ip]
	sub	r3, r3, #1		// Exit form task-independent section
	str	r3, [ip]

	ldmfd	sp!, {r0-r3}		// Restore register
	TK_RET_INT PSR_SVC

/* ------------------------------------------------------------------------ */