audiocfg_c.c

基于dsp5416的图像处理程序源码。已调试通过

/*   Do *not* directly modify this file.  It was    */
/*   generated by the Configuration Tool; any  */
/*   changes risk being overwritten.                */

/* INPUT audio.cdb */

/*  Include Header File  */
#include "audiocfg.h"


#ifdef __cplusplus
#pragma CODE_SECTION(".text:CSL_cfgInit")
#else
#pragma CODE_SECTION(CSL_cfgInit,".text:CSL_cfgInit")
#endif


#ifdef __cplusplus
#pragma FUNC_EXT_CALLED()
#else
#pragma FUNC_EXT_CALLED(CSL_cfgInit)
#endif


/*  Config Structures */
DMA_Config dmaMcbspRx = {
    0x0000,        /*  Channel Priority (0x0000 or 0x0001)  */
    0x0000,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    0x4045,        /*  Transfer Mode Control Register (DMMCR)  */
    0x3000,        /*  Sync Event and Frame Count Register (DMSFC)  */
    (DMA_AdrPtr)0x0031,        /*  Source Address Register (DMSRC) - Numeric  */
    (DMA_AdrPtr)0x0000,        /*  Destination Address Register (DMDST) - Numeric  */
    0x0000,        /*  Element Count Register (DMCTR)  */
    (DMA_AdrPtr)0x0000,        /*  Global Source Address Reload Register (DMGSA) - Numeric  */
    (DMA_AdrPtr)0x0000,        /*  Global Destination Address Reload Register (DMGDA) - Numeric  */
    0x0000,        /*  Global Element Count Reload Register (DMGCR)  */
    0x0000         /*  Global Frame Count Reload Register (DMGFR)  */
};

DMA_Config dmaMcbspTx = {
    0x0000,        /*  Channel Priority (0x0000 or 0x0001)  */
    0x0000,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    0x4141,        /*  Transfer Mode Control Register (DMMCR)  */
    0x4000,        /*  Sync Event and Frame Count Register (DMSFC)  */
    (DMA_AdrPtr)0x0000,        /*  Source Address Register (DMSRC) - Numeric  */
    (DMA_AdrPtr)0x0033,        /*  Destination Address Register (DMDST) - Numeric  */
    0x0000,        /*  Element Count Register (DMCTR)  */
    (DMA_AdrPtr)0x0000,        /*  Global Source Address Reload Register (DMGSA) - Numeric  */
    NULL,        /*  Global Destination Address Reload Register (DMGDA) - Symbolic  */
    0x0000,        /*  Global Element Count Reload Register (DMGCR)  */
    0x0000         /*  Global Frame Count Reload Register (DMGFR)  */
};

DMA_GblConfig gDMAConfig0 = {
    0x0,        /*  Breakpoint Emulation Behavior (FREE)  */
    0x0000,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    0x00,        /*  Source Program Page Address Register (DMSRCP) - Numeric  */
    0x00,        /*  Destination Program Page Address Register (DMDSTP) - Numeric  */
    0x0000,        /*  Element Address Index Register 0 (DMIDX0)  */
    0x0000,        /*  Frame Address Index Register 0 (DMFRI0)  */
    0x0000,        /*  Element Address Index Register 1 (DMIDX1)  */
    0x0000,        /*  Frame Address Index Register 1 (DMFRI1)  */
    0x00,        /*  Extended Source Data Page Register (DMSRCDP) - Numeric  */
    0x00         /*  Extended Destination Data Page Register (DMDSTDP) - Numeric  */
};

DMA_GblConfig gDMAConfig1 = {
    0x0,        /*  Breakpoint Emulation Behavior (FREE)  */
    0x0000,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    0x00,        /*  Source Program Page Address Register (DMSRCP) - Numeric  */
    0x00,        /*  Destination Program Page Address Register (DMDSTP) - Numeric  */
    0x0000,        /*  Element Address Index Register 0 (DMIDX0)  */
    0x0000,        /*  Frame Address Index Register 0 (DMFRI0)  */
    0x0000,        /*  Element Address Index Register 1 (DMIDX1)  */
    0x0000,        /*  Frame Address Index Register 1 (DMFRI1)  */
    0x00,        /*  Extended Source Data Page Register (DMSRCDP) - Numeric  */
    0x00         /*  Extended Destination Data Page Register (DMDSTDP) - Numeric  */
};

MCBSP_Config mcbspCfg0 = {
    0x2000,        /*  Serial Port Control Register 1   */
    0x0200,        /*  Serial Port Control Register 2   */
    0x0340,        /*  Receive Control Register 1   */
    0x0340,        /*  Receive Control Register 2   */
    0x0340,        /*  Transmit Control Register 1   */
    0x0340,        /*  Transmit Control Register 2   */
    0x1f00,        /*  Sample Rate Generator Register 1   */
    0x2000,        /*  Sample Rate Generator Register 2   */
    0x0001,        /*  Multichannel Control Register 1   */
    0x0001,        /*  Multichannel Control Register 2   */
    0x0003,        /*  Pin Control Register   */
    0x0005,        /*  Receive Channel Enable Register Partition A   */
    0x0000,        /*  Receive Channel Enable Register Partition B   */
    0x0000,        /*  Receive Channel Enable Register Partition C   */
    0x0000,        /*  Receive Channel Enable Register Partition D   */
    0x0000,        /*  Receive Channel Enable Register Partition E   */
    0x0000,        /*  Receive Channel Enable Register Partition F   */
    0x0000,        /*  Receive Channel Enable Register Partition G   */
    0x0000,        /*  Receive Channel Enable Register Partition H   */
    0x000a,        /*  Transmit Channel Enable Register Partition A   */
    0x0000,        /*  Transmit Channel Enable Register Partition B   */
    0x0000,        /*  Transmit Channel Enable Register Partition C   */
    0x0000,        /*  Transmit Channel Enable Register Partition D   */
    0x0000,        /*  Transmit Channel Enable Register Partition E   */
    0x0000,        /*  Transmit Channel Enable Register Partition F   */
    0x0000,        /*  Transmit Channel Enable Register Partition G   */
    0x0000         /*  Transmit Channel Enable Register Partition H   */
};

/*  Handles  */
DMA_Handle C54XX_DMA_MCBSP_hDmaTx;
DMA_Handle C54XX_DMA_MCBSP_hDmaRx;
MCBSP_Handle C54XX_DMA_MCBSP_hMcbsp;

/*
 *  ======== CSL_cfgInit() ========  
 */
void CSL_cfgInit()
{
    C54XX_DMA_MCBSP_hDmaTx = DMA_open(DMA_CHA4, DMA_OPEN_RESET);
    C54XX_DMA_MCBSP_hDmaRx = DMA_open(DMA_CHA5, DMA_OPEN_RESET);
    C54XX_DMA_MCBSP_hMcbsp = MCBSP_open(MCBSP_PORT2, MCBSP_OPEN_RESET);
    DMA_config(C54XX_DMA_MCBSP_hDmaTx, &dmaMcbspTx);
    DMA_globalConfig(0x0FFFF, &gDMAConfig1);
    DMA_config(C54XX_DMA_MCBSP_hDmaRx, &dmaMcbspRx);
    DMA_globalConfig(0x0FFFF, &gDMAConfig0);
    MCBSP_config(C54XX_DMA_MCBSP_hMcbsp, &mcbspCfg0);




}