regs.asm

用于DSK5416的程序

**********************************************************************
*
* regs.asm
*
* This module defines constants for the TMS320C54xx DSP and
* the C5416 DSK Board.
*
* Adapted from regs1.h available in TI literature
*
* Author:       Avtar Singh, SJSU
*      
**********************************************************************

                .mmregs

*
* McBSP0 Registers
*
MCBSP0_DRR2     .set        0020h           ; McBSP0 Data Rx Reg2
MCBSP0_DRR1     .set        0021h           ; McBSP0 Data Rx Reg1
MCBSP0_DXR2     .set        0022h           ; McBSP0 Data Tx Reg2
MCBSP0_DXR1     .set        0023h           ; McBSP0 Data Tx Reg1
MCBSP0_SPSA     .set        0038h           ; McBSP0 Sub Bank Addr Reg
MCBSP0_SPSD     .set        0039h           ; McBSP0 Sub Bank Data Reg

*
* McBSP1 Registers
*
MCBSP1_DRR2     .set        0040h           ; McBSP1 Data Rx Reg2
MCBSP1_DRR1     .set        0041h           ; McBSP1 Data Rx Reg1
MCBSP1_DXR2     .set        0042h           ; McBSP1 Data Tx Reg2
MCBSP1_DXR1     .set        0043h           ; McBSP1 Data Tx Reg1
MCBSP1_SPSA     .set        0048h           ; McBSP1 Sub Bank Addr Reg
MCBSP1_SPSD     .set        0049h           ; McBSP1 Sub Bank Data Reg

*
* McBSP2 Registers
*
MCBSP2_DRR2     .set        0030h           ; McBSP2 Data Rx Reg2
MCBSP2_DRR1     .set        0031h           ; McBSP2 Data Rx Reg1
MCBSP2_DXR2     .set        0032h           ; McBSP2 Data Tx Reg2
MCBSP2_DXR1     .set        0033h           ; McBSP2 Data Tx Reg1
MCBSP2_SPSA     .set        0034h           ; McBSP2 Sub Bank Addr Reg
MCBSP2_SPSD     .set        0035h           ; McBSP2 Sub Bank Data Reg

*
* McBSP0, McBSP1 and McBSP2 Subbank Addressed Registers
*
SPCR1           .set        0000h           ; Ser Port Ctrl Reg1
SPCR2           .set        0001h           ; Ser Port Ctrl Reg2
RCR1            .set        0002h           ; Rx Ctrl Reg1
RCR2            .set        0003h           ; Rx Ctrl Reg2
XCR1            .set        0004h           ; Tx Ctrl Reg1
XCR2            .set        0005h           ; Tx Ctrl Reg2
SRGR1           .set        0006h           ; Sample Rate Gen Reg1
SRGR2           .set        0007h           ; Sample Rate Gen Reg2
MCR1            .set        0008h           ; Multichan Reg1
MCR2            .set        0009h           ; Multichan Reg2
RCERA           .set        000Ah           ; Rx Chan Enable Reg Part A
RCERB           .set        000Bh           ; Rx Chan Enable Reg Part B
XCERA           .set        000Ch           ; Tx Chan Enable Reg Part A
XCERB           .set        000Dh           ; Tx Chan Enable Reg Part B
PCR             .set        000Eh           ; Pin Ctrl Reg

*
* CPLD Registers (DSK5416)
*
DSK_CPLD_USER_REG   .set    0000h           ; User LEDs and Switches Reg
DSK_CPLD_DC_REG     .set    0001h           ; Daughter Card Register
DSK_CPLD_CODEC_L    .set    0002h           ; CODEC_L_CMD Register
DSK_CPLD_CODEC_H    .set    0003h           ; CODEC_H_CMD Register
DSK_CPLD_VERSION    .set    0004h           ; Version Register
DSK_CPLD_DM_CNTL    .set    0005h           ; Memory Control Register
DSK_CPLD_MISC       .set    0006h           ; Miscellaneous Register
DSK_CPLD_CODEC_CLK  .set    0007h           ; CODEC Clock Register