📄 psocconfigtbl.lis
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00EB ECO_TR: equ EBh ; External Oscillator Trim Register (W)
0000
0000 ;;=============================================================================
0000 ;; M8C System Macros
0000 ;; These macros should be used when their functions are needed.
0000 ;;=============================================================================
0000
0000 ;----------------------------------------------------
0000 ; Swapping Register Banks
0000 ;----------------------------------------------------
0000 macro M8C_SetBank0
0000 and F, ~FLAG_XIO_MASK
0000 macro M8C_SetBank1
0000 or F, FLAG_XIO_MASK
0000 macro M8C_EnableGInt
0000 or F, FLAG_GLOBAL_IE
0000 macro M8C_DisableGInt
0000 and F, ~FLAG_GLOBAL_IE
0000 macro M8C_DisableIntMask
0000 and reg[@0], ~@1 ; disable specified interrupt enable bit
0000 macro M8C_EnableIntMask
0000 or reg[@0], @1 ; enable specified interrupt enable bit
0000 macro M8C_ClearIntFlag
0000 mov reg[@0], ~@1 ; clear specified interrupt enable bit
0000 macro M8C_EnableWatchDog
0000 and reg[CPU_SCR0], ~CPU_SCR0_PORS_MASK
0000 macro M8C_ClearWDT
0000 mov reg[RES_WDT], 00h
0000 macro M8C_ClearWDTAndSleep
0000 mov reg[RES_WDT], 38h
0000 macro M8C_Stall
0000 or reg[ASY_CR], ASY_CR_SYNCEN
0000 macro M8C_Unstall
0000 and reg[ASY_CR], ~ASY_CR_SYNCEN
0000 macro M8C_Sleep
0000 or reg[CPU_SCR0], CPU_SCR0_SLEEP_MASK
0000 ; The next instruction to be executed depends on the state of the
0000 ; various interrupt enable bits. If some interrupts are enabled
0000 ; and the global interrupts are disabled, the next instruction will
0000 ; be the one that follows the invocation of this macro. If global
0000 ; interrupts are also enabled then the next instruction will be
0000 ; from the interrupt vector table. If no interrupts are enabled
0000 ; then the CPU sleeps forever.
0000 macro M8C_Stop
0000 ; In general, you probably don't want to do this, but here's how:
0000 or reg[CPU_SCR0], CPU_SCR0_STOP_MASK
0000 ; Next instruction to be executed is located in the interrupt
0000 ; vector table entry for Power-On Reset.
0000 macro M8C_Reset
0000 ; Restore CPU to the power-on reset state.
0000 mov A, 0
0000 SSC
0000 ; Next non-supervisor instruction will be at interrupt vector 0.
0000 macro Suspend_CodeCompressor
0000 or F, 0
0000 macro Resume_CodeCompressor
0000 add SP, 0
export LoadConfigTBL_code
AREA psoc_config(rom, rel)
0000 LoadConfigTBL_code:
0000 ; Ordered Global Register values
0000 7110 or F, FLAG_XIO_MASK
0002 620000 mov reg[00h], 00h ; Port_0_DriveMode_0 register (PRT0DM0)
0005 6201FF mov reg[01h], ffh ; Port_0_DriveMode_1 register (PRT0DM1)
0008 70EF and F, ~FLAG_XIO_MASK
000A 6203FF mov reg[03h], ffh ; Port_0_DriveMode_2 register (PRT0DM2)
000D 620200 mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS)
0010 7110 or F, FLAG_XIO_MASK
0012 620200 mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0)
0015 620300 mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1)
0018 70EF and F, ~FLAG_XIO_MASK
001A 620100 mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE)
001D 7110 or F, FLAG_XIO_MASK
001F 620400 mov reg[04h], 00h ; Port_1_DriveMode_0 register (PRT1DM0)
0022 6205EF mov reg[05h], efh ; Port_1_DriveMode_1 register (PRT1DM1)
0025 70EF and F, ~FLAG_XIO_MASK
0027 6207EF mov reg[07h], efh ; Port_1_DriveMode_2 register (PRT1DM2)
002A 620600 mov reg[06h], 00h ; Port_1_GlobalSelect register (PRT1GS)
002D 7110 or F, FLAG_XIO_MASK
002F 620600 mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0)
0032 620700 mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1)
0035 70EF and F, ~FLAG_XIO_MASK
0037 620500 mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE)
003A 7110 or F, FLAG_XIO_MASK
003C 62080F mov reg[08h], 0fh ; Port_2_DriveMode_0 register (PRT2DM0)
003F 6209F0 mov reg[09h], f0h ; Port_2_DriveMode_1 register (PRT2DM1)
0042 70EF and F, ~FLAG_XIO_MASK
0044 620BF0 mov reg[0bh], f0h ; Port_2_DriveMode_2 register (PRT2DM2)
0047 620A00 mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS)
004A 7110 or F, FLAG_XIO_MASK
004C 620A00 mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0)
004F 620B00 mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1)
0052 70EF and F, ~FLAG_XIO_MASK
0054 620900 mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE)
0057 7110 or F, FLAG_XIO_MASK
0059 620C00 mov reg[0ch], 00h ; Port_3_DriveMode_0 register (PRT3DM0)
005C 620D00 mov reg[0dh], 00h ; Port_3_DriveMode_1 register (PRT3DM1)
005F 70EF and F, ~FLAG_XIO_MASK
0061 620F00 mov reg[0fh], 00h ; Port_3_DriveMode_2 register (PRT3DM2)
0064 620E00 mov reg[0eh], 00h ; Port_3_GlobalSelect register (PRT3GS)
0067 7110 or F, FLAG_XIO_MASK
0069 620E00 mov reg[0eh], 00h ; Port_3_IntCtrl_0 register (PRT3IC0)
006C 620F00 mov reg[0fh], 00h ; Port_3_IntCtrl_1 register (PRT3IC1)
006F 70EF and F, ~FLAG_XIO_MASK
0071 620D00 mov reg[0dh], 00h ; Port_3_IntEn register (PRT3IE)
0074 7110 or F, FLAG_XIO_MASK
0076 621000 mov reg[10h], 00h ; Port_4_DriveMode_0 register (PRT4DM0)
0079 621100 mov reg[11h], 00h ; Port_4_DriveMode_1 register (PRT4DM1)
007C 70EF and F, ~FLAG_XIO_MASK
007E 621300 mov reg[13h], 00h ; Port_4_DriveMode_2 register (PRT4DM2)
0081 621200 mov reg[12h], 00h ; Port_4_GlobalSelect register (PRT4GS)
0084 7110 or F, FLAG_XIO_MASK
0086 621200 mov reg[12h], 00h ; Port_4_IntCtrl_0 register (PRT4IC0)
0089 621300 mov reg[13h], 00h ; Port_4_IntCtrl_1 register (PRT4IC1)
008C 70EF and F, ~FLAG_XIO_MASK
008E 621100 mov reg[11h], 00h ; Port_4_IntEn register (PRT4IE)
0091 7110 or F, FLAG_XIO_MASK
0093 621400 mov reg[14h], 00h ; Port_5_DriveMode_0 register (PRT5DM0)
0096 621500 mov reg[15h], 00h ; Port_5_DriveMode_1 register (PRT5DM1)
0099 70EF and F, ~FLAG_XIO_MASK
009B 621700 mov reg[17h], 00h ; Port_5_DriveMode_2 register (PRT5DM2)
009E 621600 mov reg[16h], 00h ; Port_5_GlobalSelect register (PRT5GS)
00A1 7110 or F, FLAG_XIO_MASK
00A3 621600 mov reg[16h], 00h ; Port_5_IntCtrl_0 register (PRT5IC0)
00A6 621700 mov reg[17h], 00h ; Port_5_IntCtrl_1 register (PRT5IC1)
00A9 70EF and F, ~FLAG_XIO_MASK
00AB 621500 mov reg[15h], 00h ; Port_5_IntEn register (PRT5IE)
00AE 70EF and F, ~FLAG_XIO_MASK
00B0 ; Global Register values
00B0 626028 mov reg[60h], 28h ; AnalogColumnInputSelect register (AMX_IN)
00B3 626600 mov reg[66h], 00h ; AnalogComparatorControl1 register (CMP_CR1)
00B6 626305 mov reg[63h], 05h ; AnalogReferenceControl register (ARF_CR)
00B9 626500 mov reg[65h], 00h ; AnalogSyncControl register (ASY_CR)
00BC 62E600 mov reg[e6h], 00h ; DecimatorControl_0 register (DEC_CR0)
00BF 62E700 mov reg[e7h], 00h ; DecimatorControl_1 register (DEC_CR1)
00C2 62D600 mov reg[d6h], 00h ; I2CConfig register (I2CCFG)
00C5 62B000 mov reg[b0h], 00h ; Row_0_InputMux register (RDI0RI)
00C8 62B100 mov reg[b1h], 00h ; Row_0_InputSync register (RDI0SYN)
00CB 62B200 mov reg[b2h], 00h ; Row_0_LogicInputAMux register (RDI0IS)
00CE 62B333 mov reg[b3h], 33h ; Row_0_LogicSelect_0 register (RDI0LT0)
00D1 62B433 mov reg[b4h], 33h ; Row_0_LogicSelect_1 register (RDI0LT1)
00D4 62B500 mov reg[b5h], 00h ; Row_0_OutputDrive_0 register (RDI0SRO0)
00D7 62B600 mov reg[b6h], 00h ; Row_0_OutputDrive_1 register (RDI0SRO1)
00DA 62B855 mov reg[b8h], 55h ; Row_1_InputMux register (RDI1RI)
00DD 62B900 mov reg[b9h], 00h ; Row_1_InputSync register (RDI1SYN)
00E0 62BA10 mov reg[bah], 10h ; Row_1_LogicInputAMux register (RDI1IS)
00E3 62BB33 mov reg[bbh], 33h ; Row_1_LogicSelect_0 register (RDI1LT0)
00E6 62BC33 mov reg[bch], 33h ; Row_1_LogicSelect_1 register (RDI1LT1)
00E9 62BD00 mov reg[bdh], 00h ; Row_1_OutputDrive_0 register (RDI1SRO0)
00EC 62BE00 mov reg[beh], 00h ; Row_1_OutputDrive_1 register (RDI1SRO1)
00EF ; Instance name E2PROM, User Module E2PROM
00EF ; Instance name Timer, User Module Timer8
00EF ; Instance name Timer, Block Name TIMER8(DBB00)
00EF 622304 mov reg[23h], 04h ;Timer_CONTROL_REG(DBB00CR0)
00F2 6221C8 mov reg[21h], c8h ;Timer_PERIOD_REG(DBB00DR1)
00F5 622201 mov reg[22h], 01h ;Timer_COMPARE_REG(DBB00DR2)
00F8 7110 or F, FLAG_XIO_MASK
00FA ; Global Register values
00FA 626100 mov reg[61h], 00h ; AnalogClockSelect1 register (CLK_CR1)
00FD 626900 mov reg[69h], 00h ; AnalogClockSelect2 register (CLK_CR2)
0100 626000 mov reg[60h], 00h ; AnalogColumnClockSelect register (CLK_CR0)
0103 626200 mov reg[62h], 00h ; AnalogIOControl_0 register (ABF_CR0)
0106 626733 mov reg[67h], 33h ; AnalogLUTControl0 register (ALT_CR0)
0109 626833 mov reg[68h], 33h ; AnalogLUTControl1 register (ALT_CR1)
010C 626300 mov reg[63h], 00h ; AnalogModulatorControl_0 register (AMD_CR0)
010F 626600 mov reg[66h], 00h ; AnalogModulatorControl_1 register (AMD_CR1)
0112 62D100 mov reg[d1h], 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN)
0115 62D300 mov reg[d3h], 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU)
0118 62D000 mov reg[d0h], 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN)
011B 62D200 mov reg[d2h], 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
011E 62E1B9 mov reg[e1h], b9h ; OscillatorControl_1 register (OSC_CR1)
0121 62E200 mov reg[e2h], 00h ; OscillatorControl_2 register (OSC_CR2)
0124 62DFC7 mov reg[dfh], c7h ; OscillatorControl_3 register (OSC_CR3)
0127 62DE02 mov reg[deh], 02h ; OscillatorControl_4 register (OSC_CR4)
012A 62DD00 mov reg[ddh], 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
012D ; Instance name E2PROM, User Module E2PROM
012D ; Instance name Timer, User Module Timer8
012D ; Instance name Timer, Block Name TIMER8(DBB00)
012D 622020 mov reg[20h], 20h ;Timer_FUNC_REG(DBB00FN)
0130 622111 mov reg[21h], 11h ;Timer_INPUT_REG(DBB00IN)
0133 622240 mov reg[22h], 40h ;Timer_OUTPUT_REG(DBB00OU)
0136 70EF and F, ~FLAG_XIO_MASK
0138 7F ret
0139
0139
0139 ; PSoC Configuration file trailer PsocConfig.asm
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