📄 rf_ntrx.h
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/* NanoStack: MCU software and PC tools for IP-based wireless sensor networking. Copyright (C) 2006-2007 Sensinode Ltd. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. Address: Sensinode Ltd. Teknologiantie 6 90570 Oulu, Finland E-mail: info@sensinode.com*//** * * \file rf_ntrx.h * \brief micro RF driver header for the Nanotron NA5TR1 radio * * Micro: RF control function headers. * * */#ifndef RF_NTRX_H#define RF_NTRX_H/** Address decoder mode value */extern portCHAR rf_init(void);extern portCHAR rf_write(buffer_t *buffer);extern portCHAR rf_rx_enable(void);extern portCHAR rf_rx_disable(void);extern portCHAR rf_mac_get(sockaddr_t *address);extern int8_t rf_power_set(uint8_t new_power);extern int8_t rf_channel_set(uint8_t channel);extern void rf_send_ack(uint8_t pending);extern int8_t rf_analyze_rssi(void);extern portCHAR rf_cca_check(uint8_t backoff_count, uint8_t slotted);extern portCHAR rf_write_no_cca(buffer_t *buffer);//extern portCHAR rf_address_decoder_mode(uint8_t param);extern void rf_set_address(sockaddr_t *address);typedef enum { TRX_STATE_IDLE, TRX_STATE_WAIT, TRX_STATE_SEND, TRX_STATE_READ, TRX_STATE_RANGING, TRX_STATE_DATA} TRX_STATE; #define NTRX_DEFAULT_CHANNEL 1#define TRUE 0x01#define FALSE 0x00#define TRX_BANDWIDTH_80MHz 0#define TRX_BANDWIDTH_22MHz 1#define TRX_SD_500ns 0x00#define TRX_SD_1us 0x01#define TRX_SD_2us 0x02#define TRX_SD_4us 0x03#define TRX_SD_8us 0x04#define TRX_SD_16us 0x05#define TRX_500k_S 0x00#define TRX_1M_S 0x01#define TRX_2M_S 0x02#define TRX_31k25_S 0x04#define TRX_62k5_S 0x05#define TRX_125k_S 0x06#define TRX_250k_S 0x07#define TRX_Version_O 0x01#define TRX_Version_MSB 0x07#define TRX_Version_LSB 0x00#define TRX_Version_I 0x05#define TRX_Revision_O 0x02#define TRX_Revision_MSB 0x07#define TRX_Revision_LSB 0x00#define TRX_Revision_I 0x01#define TRX_RamIndex_O 0x0E#define TRX_RXCmdStop 0x56#define NA_TypeCodeData_VC_C (0x0)#define NA_SpiBitOrder_B (0)#define NA_SpiTxDriver_B (1)#define NA_Version_LSB (0)#define NA_WakeUpTimeByte_LSB (0)#define NA_Revision_LSB (0)#define NA_WakeUpTimeWe_LSB (1)#define NA_BattMgmtEnable_B (7)#define NA_BattMgmtThreshold_LSB (1)#define NA_BattMgmtCompare_B (0)#define NA_DioDirection_B (0)#define NA_DioOutValueAlarmEnable_B (1)#define NA_DioAlarmStart_B (2)#define NA_DioAlarmPolarity_B (3)#define NA_DioUsePullup_B (4)#define NA_DioUsePulldown_B (5)#define NA_DioInValueAlarmStatus_LSB (0)#define NA_DioPortWe_LSB (0)#define NA_EnableWakeUpRtc_B (0)#define NA_EnableWakeUpDio_B (1)#define NA_PowerUpTime_LSB (4)#define NA_PowerDownMode_B (7)#define NA_PowerDown_B (0)#define NA_ResetBbClockGate_B (1)#define NA_ResetBbRadioCtrl_B (2)#define NA_UsePullup4Test_B (6)#define NA_UsePulldown4Test_B (7)#define NA_EnableBbCrystal_B (0)#define NA_EnableBbClock_B (1)#define NA_BypassBbCrystal_B (3)#define NA_FeatureClockFreq_LSB (4)#define NA_EnableFeatureClock_B (7)#define NA_UsePullup4Spiclk_B (0)#define NA_UsePulldown4Spiclk_B (1)#define NA_UsePullup4Spissn_B (2)#define NA_UsePulldown4Spissn_B (3)#define NA_UsePullup4Spirxd_B (4)#define NA_UsePulldown4Spirxd_B (5)#define NA_UsePullup4Spitxd_B (6)#define NA_UsePulldown4Spitxd_B (7)#define NA_UsePullup4Por_B (0)#define NA_UsePulldown4Por_B (1)#define NA_UsePullup4Pamp_B (2)#define NA_UsePulldown4Pamp_B (3)#define NA_UsePullup4Ucirq_B (4)#define NA_UsePulldown4Ucirq_B (5)#define NA_UsePullup4Ucrst_B (6)#define NA_UsePulldown4Ucrst_B (7)#define NA_WritePulls4Spi_B (0)#define NA_WritePulls4Pads_B (1)#define NA_TestModes_LSB (0)#define NA_RfTestSelect_LSB (0)#define NA_RamIndex_LSB (0)#define NA_DeviceSelect_LSB (4)#define NA_TxIrqEnable_B (0)#define NA_RxIrqEnable_B (1)#define NA_BbTimerIrqEnable_B (2)#define NA_LoIrqEnable_B (3)#define NA_TxIrqStatus_B (4)#define NA_RxIrqStatus_B (5)#define NA_BbTimerIrqStatus_B (6)#define NA_LoIrqStatus_B (7)#define NA_WakeUpTime_LSB (8)#define NA_TxIntsRawStat_LSB (0)#define NA_TxIntsReset_LSB (0)#define NA_TxTimeSlotEnd_B (5)#define NA_TxTimeSlotTOut_B (4)#define NA_TxUnderrun_B (3)#define NA_TxEnd_B (2)#define NA_TxBufferRdy_LSB (0)#define NA_RxIntsRawStat_LSB (0)#define NA_RxIntsReset_LSB (0)#define NA_RxTimeSlotEnd_B (6)#define NA_RxTimeSlotTOut_B (5)#define NA_RxOverflow_B (4)#define NA_RxHeaderEnd_B (3)#define NA_RxEnd_B (2)#define NA_RxBufferRdy_LSB (0)#define NA_LoIntsRawStat_LSB (0)#define NA_LoIntsReset_LSB (0)#define NA_LoTuningReady_B (1)#define NA_LoTuningNeeded_B (0)#define NA_TxIntsEn_LSB (0)#define NA_RxIntsEn_LSB (0)#define NA_LoIntsEn_LSB (0)#define NA_LoRxCapsValue_LSB (0)#define NA_LoTxCapsValue_LSB (0)#define NA_LoEnableFastTuning_B (0)#define NA_LoFastTuningLevel_LSB (1)#define NA_LoEnableLsbNeg_B (4)#define NA_LoEnableRecalib_B (5)#define NA_UseLoRxCaps_B (7)#define NA_LoTargetValue_LSB (0)#define NA_AgcThresHold1_LSB (0)#define NA_AgcThresHold2_LSB (0)#define NA_HoldAgcInBitSync_LSB (0)#define NA_HoldAgcInFrameSync_B (7)#define NA_AgcDeadTime_LSB (0)#define NA_AgcNregLength_LSB (6)#define NA_AgcIntTime_LSB (0)#define NA_AgcValue_LSB (0)#define NA_AgcDefaultEn_B (6)#define NA_AgcHold_B (7)#define NA_AgcRssiThres_LSB (0)#define NA_AgcGain_LSB (0)#define NA_AgcEnable_B (7)#define NA_FctClockEn_B (4)#define NA_StartFctMeasure_B (5)#define NA_EnableTx_B (7)#define NA_FctPeriod_LSB (0)#define NA_BasebandTimerStartValue_LSB (0)#define NA_SyncWord_LSB (0)#define NA_ToaOffsetMeanAck_LSB (0)#define NA_ToaOffsetMeanAckValid_B (7)#define NA_TxRespTime_LSB (0)#define NA_PhaseOffsetAck_LSB (0)#define NA_PhaseOffsetData_LSB (4)#define NA_ToaOffsetMeanData_LSB (0)#define NA_ToaOffsetMeanDataValid_B (7)#define NA_RxPacketType_LSB (0)#define NA_RxAddrMatch_LSB (4)#define NA_RxCrc1Stat_B (6)#define NA_RxCrc2Stat_B (7)#define NA_RxCorrBitErr_LSB (0)#define NA_RxCorrErrThres_LSB (4)#define NA_RxAddrSegEsMatch_B (0)#define NA_RxAddrSegIsMatch_B (1)#define NA_RxCryptEn_B (4)#define NA_RxCryptId_LSB (5)#define NA_RxCryptSeqN_B (7)#define NA_RxFec1BitErr_LSB (0)#define NA_TxTimeSlotStart_LSB (0)#define NA_TxTimeSlotEnd_LSB (0)#define NA_TxTimeSlotControl_B (0)#define NA_RxTimeSlotControl_B (1)#define NA_RxPacketSlot_LSB (0)#define NA_RxTimeSlotStart_LSB (0)#define NA_RxTimeSlotEnd_LSB (0)#define NA_TxArqCnt_LSB (0)#define NA_TxArqMax_LSB (4)#define NA_CsqUsePhaseShift_B (2)#define NA_CsqMemAddrInit_B (5)#define NA_CsqUseRam_B (6)#define NA_D3lFixnMap_B (0)#define NA_D3lPomEn_B (1)#define NA_D3lPomLen_LSB (2)#define NA_D3lUpDownEx_B (7)#define NA_LeaveMapThresh1InBitsync_LSB (0)#define NA_UseMapThresh1InFramesync_B (7)#define NA_Go2MapThresh1InBitsync_LSB (0)#define NA_D3lFixThres1MapEn_B (7)#define NA_EnableLO_B (0)#define NA_EnableLOdiv10_B (1)#define NA_EnableCsqClock_B (2)#define NA_EnableExtPA_B (4)#define NA_EnableIntPA_B (5)#define NA_EnableRxClock_B (6)#define NA_EnableRx_B (7)#define NA_LnaFreqAdjust_LSB (0)#define NA_TxPaBias_LSB (4)#define NA_TxOutputPower0_LSB (0)#define NA_TxOutputPower1_LSB (0)#define NA_RfRxCompValueI_LSB (0)#define NA_RfRxCompValueQ_LSB (0)#define NA_SymbolDur_LSB (0)#define NA_SymbolRate_LSB (4)#define NA_ModulationSystem_B (7)#define NA_UseFec_B (2)#define NA_TxRxCryptCrc2Mode_B (3)#define NA_TxRxCryptClkMode_LSB (4)#define NA_SwapBbBuffers_B (0)#define NA_TxRxBbBufferMode1_B (1)#define NA_TxRxBbBufferMode0_B (2)#define NA_FdmaEnable_B (4)#define NA_TxRxMode_B (7)#define NA_TxPreTrailMatrix0_LSB (0)#define NA_TxPreTrailMatrix1_LSB (2)#define NA_TxUnderrunIgnore_B (4)#define NA_TxMacCifsDis_B (7)#define NA_TxVCarrSens_B (0)#define NA_TxPhCarrSenseMode_LSB (1)#define NA_TxVCarrSensAck_B (3)#define NA_TxArq_B (4)#define NA_Tx3Way_B (5)#define NA_TxBackOffAlg_B (6)#define NA_TxFragPrio_B (7)#define NA_TxBackOffSeed_LSB (0)#define NA_TxCryptSeqReset_LSB (0)#define NA_TxCryptEn_B (4)#define NA_TxCryptId_LSB (5)#define NA_TxCryptSeqN_B (7)#define NA_TxScrambInit_LSB (0)#define NA_TxScrambEn_B (7)#define NA_TxTransBytes_LSB (0)#define NA_TxPacketType_LSB (0)#define NA_TxAddrSlct_B (7)#define NA_TxCmdStop_B (0)#define NA_TxCmdStart_B (1)#define NA_TxBufferCmd_LSB (2)#define NA_RxCmdStop_B (0)#define NA_RxCmdStart_B (1)#define NA_RxBufferCmd_LSB (2)#define NA_RxCryptSeqReset_LSB (0)#define NA_RxTransBytes_LSB (0)#define NA_RxTimeBCrc1Mode_B (0)#define NA_RxCrc2Mode_B (1)#define NA_RxCrc2Mode_O (0x5A)#define NA_RxArqMode_LSB (2)#define NA_RxAddrSegEsMode_B (4)#define NA_RxAddrSegIsMode_B (5)#define NA_RxAddrSegDevIdL_LSB (6)#define NA_RxDataEn_B (0)#define NA_RxBrdcastEn_B (1)#define NA_RxTimeBEn_B (2)#define NA_RxAddrMode_B (3)#define NA_RangingPulses_LSB (4)#define NA_PulseDetDelay_LSB (0)#define NA_GateAdjThreshold_LSB (0)#define NA_DownPulseDetectDis_B (4)#define NA_UpPulseDetectDis_B (5)#define NA_GateSizeUnsync_LSB (0)#define NA_GateSizeBitsync_LSB (2)#define NA_GateSizeFramesync_LSB (4)#define NA_GateAdjBitsyncEn_B (6)#define NA_GateAdjFramesyncEn_B (7)#define NA_Go2BitsyncThreshold_LSB (0)#define NA_LeaveBitsyncThreshold_LSB (4)#define NA_RtcTimeBTxAdj_LSB (0)#define NA_RtcTimeBRxAdj_LSB (0)#define NA_RtcCmdWr_B (0)#define NA_RtcCmdRd_B (1)#define NA_RtcTimeBAutoMode_B (4)#define NA_RtcTimeBTestMode_B (7)#define NA_AgcAmplitude_LSB (0)#define NA_AgcRangeOffset_LSB (0)#define NA_UseAlternativeAgc_B (7)#define NA_TxRxDigTestMode_B (0)#define NA_DebugMacRxCmd_B (2)#define NA_DebugMacTxCmd_B (3)#define NA_BistBbRamReset_B (4)#define NA_BistBbRamActive_B (5)#define NA_BistCsqRamReset_B (6)#define NA_BistCsqRamActive_B (7)#define NA_DebugMacFsm_LSB (0)#define NA_DebugMacTxRxCtrl_LSB (4)#define NA_DebugBitProcFsm_LSB (0)⌨️ 快捷键说明
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