w90p710fb.c

winbond w90p710 lcd frame buffer driver。

	outpw(REG_LCD_LCDCON, (inpw(REG_LCD_LCDCON) | LCD_LCDCON_BPP_24));
	bursty = 1;
#endif
#ifdef CONFIG_W90P710_LCD_TFT_16BPP
	outpw(REG_LCD_LCDCON, (inpw(REG_LCD_LCDCON) | LCD_LCDCON_BPP_16));						//for 16BPP
	bursty = 1 << 1;
#endif
#ifdef CONFIG_W90P710_LCD_TFT_8BPP
	outpw(REG_LCD_LCDCON, (inpw(REG_LCD_LCDCON) | LCD_LCDCON_BPP_08 | LCD_LCDCON_VDLUTEN));	//for 8BPP
	bursty = 1 << 2;
#endif 
#ifdef CONFIG_W90P710_LCD_TFT_4BPP
	outpw(REG_LCD_LCDCON, (inpw(REG_LCD_LCDCON) | LCD_LCDCON_BPP_04 | LCD_LCDCON_VDLUTEN));	//for 4BPP
	bursty = 1 << 3;
#endif
#ifdef CONFIG_W90P710_LCD_TFT_2BPP
	outpw(REG_LCD_LCDCON, (inpw(REG_LCD_LCDCON) | LCD_LCDCON_BPP_02 | LCD_LCDCON_VDLUTEN));	//for 2BPP
	bursty = 1 << 4;
#endif
#ifdef CONFIG_W90P710_LCD_TFT_1BPP
	outpw(REG_LCD_LCDCON, (inpw(REG_LCD_LCDCON) | LCD_LCDCON_BPP_01 | LCD_LCDCON_VDLUTEN));	//for 1BPP
	bursty = 1 << 5;
#endif                    	

#else	//STN panel settings

#ifdef CONFIG_W90P710_LCD_STN_16BPP
	outpw(REG_LCD_LCDCON, LCD_LCDCON_BPP_16);							//for 16BPP
	bursty = 1 << 1;
#endif
#ifdef CONFIG_W90P710_LCD_STN_8BPP
	outpw(REG_LCD_LCDCON, LCD_LCDCON_BPP_08 | LCD_LCDCON_VDLUTEN);			//for 8BPP
	bursty = 1 << 2;
#endif 
#ifdef CONFIG_W90P710_LCD_STN_4BPP
	outpw(REG_LCD_LCDCON, LCD_LCDCON_BPP_04 | LCD_LCDCON_VDLUTEN);			//for 4BPP
	bursty = 1 << 3;
#endif
#ifdef CONFIG_W90P710_LCD_STN_2BPP
	outpw(REG_LCD_LCDCON, LCD_LCDCON_BPP_02 | LCD_LCDCON_VDLUTEN);			//for 2BPP
	bursty = 1 << 4;
#endif
#ifdef CONFIG_W90P710_LCD_STN_1BPP
	outpw(REG_LCD_LCDCON, LCD_LCDCON_BPP_01 | LCD_LCDCON_VDLUTEN);			//for 1BPP
	bursty = 1 << 5;
#endif 

#endif    
            
    /* Clear the framebuffer */
    memset((void *)fbi->fb.fix.smem_start, 0xFF, FB_Size);
    //printk("FB_Size = %d \n",FB_Size);
    udelay(200);
    
    /* Configure Dummy Display Color Pattern Register */
    outpw(REG_LCD_DDISPCP, 0x00000000); 
    
    /* Configure Valid Display Window Starting Coordinate */
    outpw(REG_LCD_DISPWINS, 0x00000000);     

#ifdef CONFIG_W90P710_LCD_TFT_CASIO    
    /* Configure Valid Display Window Starting Coordinate */
    outpw(REG_LCD_DISPWINS, 0x00020008);     
    
    /* Configure Valid Display Window Ending Coordinate */
    outpw(REG_LCD_DISPWINE,(((FB_Y_RES + 2) << 16) | (FB_X_RES + 8)));
#else
	/* Configure Valid Display Window Starting Coordinate */
    outpw(REG_LCD_DISPWINS, 0x00000000);     
    
    /* Configure Valid Display Window Ending Coordinate */
    outpw(REG_LCD_DISPWINE,((FB_Y_RES << 16) | FB_X_RES));
#endif


#ifdef CONFIG_W90P710_LCD_TFT  
#ifdef CONFIG_W90P710_LCD_TFT_CASIO
	/* Configure LCD Timing Generation */
    outpw(REG_LCD_LCDTCON1, 0x0070051A);  
    outpw(REG_LCD_LCDTCON2, 0x01E800F2);  
    outpw(REG_LCD_LCDTCON3, 0x00100000);  
    outpw(REG_LCD_LCDTCON4, 0x00060101);  
    outpw(REG_LCD_LCDTCON5, 0x00000006);
#else  
    /* Configure LCD Timing Generation */
    outpw(REG_LCD_LCDTCON1, 0x05F09C17);  
    outpw(REG_LCD_LCDTCON2, 0x027F01E0);  
    outpw(REG_LCD_LCDTCON3, 0x0030840A);  
    outpw(REG_LCD_LCDTCON4, 0x00060101);  
    outpw(REG_LCD_LCDTCON5, 0x00000006);    
#endif

#ifdef CONFIG_W90P710_LCD_TFT_AUO960240
	outpw(REG_LCD_LCDTCON1, 0x0003B166);  
    outpw(REG_LCD_LCDTCON2, 0x03BF00F1);  
    outpw(REG_LCD_LCDTCON3, 0x00105401);  
    //outpw(REG_LCD_LCDTCON2, 0x03BF00F0);  
    //outpw(REG_LCD_LCDTCON3, 0x00207401);  
    outpw(REG_LCD_LCDTCON4, 0x00020101);  
    outpw(REG_LCD_LCDTCON5, 0x0000000E);
#endif    

#ifdef CONFIG_W90P710_LCD_TFT_TOPPOLY240320
	outpw(REG_LCD_LCDTCON1, 0x00904C09);
    outpw(REG_LCD_LCDTCON2, 0x00F10140);  
    outpw(REG_LCD_LCDTCON3, 0x00200802);  
    outpw(REG_LCD_LCDTCON4, 0x000C0101);  
    outpw(REG_LCD_LCDTCON5, 0x0000000E);  
#endif

#else

    /* Configure LCD Timing Generation */
    outpw(REG_LCD_LCDTCON1, 0x00F00401);  
    outpw(REG_LCD_LCDTCON2, 0x014200F0);  
    outpw(REG_LCD_LCDTCON3, 0x00000000);  
    outpw(REG_LCD_LCDTCON4, 0x000A0103);  
    outpw(REG_LCD_LCDTCON5, 0x00000000);  
    outpw(REG_LCD_LCDTCON6, 0x00000000);      

    /* Configure TMED Dithering Pattern */
    outpw(REG_LCD_TMDDITHP1 , 0x01010001);        
    outpw(REG_LCD_TMDDITHP2 , 0x030380C0);      
    outpw(REG_LCD_TMDDITHP3 , 0xE0E0C0E0);      
    outpw(REG_LCD_TMDDITHP4 , 0xF0F0E0F0);   
    outpw(REG_LCD_TMDDITHP5 , 0xF8F8F8F0);       
    outpw(REG_LCD_TMDDITHP6 , 0xFCFCFCF8);      
    outpw(REG_LCD_TMDDITHP7 , 0xFFFCFFF8);     
#endif   
		
	/* Make sure the TRANSBURSTY can be divided by 8(data burst) * 1(word) */
	if(((FB_X_RES / bursty) % 16) == 0)
	{
		/* Configure LCD FIFO1 transfer parameters */
    	outpw(REG_LCD_FIFO1PRM, LCD_FIFO1PRM_F1BURSTY_16DATABURST | LCD_FIFO1PRM_F1TRANSZ_4BYTE);    
	}
	else if(((FB_X_RES / bursty) % 8) == 0)
    {	
    	/* Configure LCD FIFO1 transfer parameters */
    	outpw(REG_LCD_FIFO1PRM, LCD_FIFO1PRM_F1BURSTY_08DATABURST | LCD_FIFO1PRM_F1TRANSZ_4BYTE);    
    }
    else
    {
    	/* Select another transfer type */
    	/* Configure LCD FIFO1 transfer parameters */
    	outpw(REG_LCD_FIFO1PRM, LCD_FIFO1PRM_F1BURSTY_04DATABURST | LCD_FIFO1PRM_F1TRANSZ_4BYTE);    
    }
	
	/* Configure LCD Interrupt Enable Register */
    outpw(REG_LCD_LCDINTENB,LCD_LCDINTENB_VSEN); 
    
    /* Configure LCD Interrupt Clear Register */
    outpw(REG_LCD_LCDINTC, LCD_LCDINTC_VSIC);

#ifdef CONFIG_W90P710_LCD_TFT_24BPP    
    /* FIFO1 transfer data count register */
    outpw(REG_LCD_F1DREQCNT, (FB_X_RES << 16) | FB_Y_RES);
    
    /* FIFO 1 real column count register */
    outpw(REG_LCD_FIFO1RELACOLCNT, FB_X_RES);
#endif           
#if defined(CONFIG_W90P710_LCD_TFT_16BPP) || defined(CONFIG_W90P710_LCD_STN_16BPP)   
    /* FIFO1 transfer data count register */
    outpw(REG_LCD_F1DREQCNT, ((FB_X_RES << 16) >> 1) | FB_Y_RES); 
    
    /* FIFO 1 real column count register */
    outpw(REG_LCD_FIFO1RELACOLCNT, FB_X_RES >> 1);
#endif
#if defined(CONFIG_W90P710_LCD_TFT_8BPP) || defined(CONFIG_W90P710_LCD_STN_8BPP) 
	 /* FIFO1 transfer data count register */
    outpw(REG_LCD_F1DREQCNT, ((FB_X_RES << 16) >> 2) | FB_Y_RES);   
    
    /* FIFO 1 real column count register */
    outpw(REG_LCD_FIFO1RELACOLCNT, FB_X_RES >> 2);
#endif
#if defined(CONFIG_W90P710_LCD_TFT_4BPP) || defined(CONFIG_W90P710_LCD_STN_4BPP) 
	 /* FIFO1 transfer data count register */
    outpw(REG_LCD_F1DREQCNT, ((FB_X_RES << 16) >> 3) | FB_Y_RES); 
    
    /* FIFO 1 real column count register */
    outpw(REG_LCD_FIFO1RELACOLCNT, FB_X_RES >> 3);
    
    /* Setting palette */ 
    outpw(REG_LCD_LUTENTY1, 0x03020100);
	outpw(REG_LCD_LUTENTY2, 0x07060504);
	outpw(REG_LCD_LUTENTY3, 0x0B0A0908);
	outpw(REG_LCD_LUTENTY4, 0x0F0E0D0C);	
#endif
#if defined(CONFIG_W90P710_LCD_TFT_2BPP) || defined(CONFIG_W90P710_LCD_STN_2BPP) 
	 /* FIFO1 transfer data count register */
    outpw(REG_LCD_F1DREQCNT, ((FB_X_RES << 16) >> 4) | FB_Y_RES); 
    
    /* FIFO 1 real column count register */
    outpw(REG_LCD_FIFO1RELACOLCNT, FB_X_RES >> 4);
    
    /* Setting palette */ 
    outpw(REG_LCD_LUTENTY1, 0x03020100); 
#endif
#if defined(CONFIG_W90P710_LCD_TFT_1BPP) || defined(CONFIG_W90P710_LCD_STN_1BPP) 
	 /* FIFO1 transfer data count register */
    outpw(REG_LCD_F1DREQCNT, ((FB_X_RES << 16) >> 5) | FB_Y_RES); 
    
    /* FIFO 1 real column count register */
    outpw(REG_LCD_FIFO1RELACOLCNT, FB_X_RES >> 5);
    
    /* Setting palette */   
    outpw(REG_LCD_LUTENTY1, 0x00000100);
#endif 
                       
    Enable_LCD();

    
#ifdef CONFIG_W90P710_LCD_TFT_AUO960240
	/*Init AUO panel */
	InitAUOLCD();
	
	
#endif
    LEAVE();
   
}

int __init w90p710fb_init(void)
{
    struct w90p710fb_info *fbi;
    int ret;
    //unsigned int status = 0;
	
	ENTER();
	    
    fbi = w90p710fb_init_fbinfo();
    ret = -ENOMEM;
    if (!fbi)
	goto failed;

    ret = w90p710fb_map_video_memory(fbi);
    if (ret)
	goto failed;

#if 1    
    ret = request_irq(INT_LCD , w90p710fb_handle_irq, SA_INTERRUPT,
			  fbi->fb.fix.id, fbi);
	if (ret) {
		printk(KERN_ERR "w90p710fb: request_irq failed: %d\n", ret);
		goto failed;
	}
#endif
	
    w90p710_lcd_init(fbi);
    w90p710fb_set_var(&fbi->fb.var, -1, &fbi->fb);
	
	ret = register_framebuffer(&fbi->fb);
    if (ret < 0)
      goto failed;

    printk("Installed W90P710 frame buffer\n");
	
    MOD_INC_USE_COUNT ;
    
    LEAVE();
    
    return 0;

failed:
    if (fbi)
	kfree(fbi);
    return ret;
}


int __init w90p710fb_setup(char *options)
{
    return 0;
}

#if 1
/*
 *  w90p710fb_handle_irq: Handle 'LCD DONE' interrupts.
 */
static void w90p710fb_handle_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	unsigned int interruptStatus;    
		
	//spin_lock_irq( &wb_osd_lock);    
    interruptStatus = inpw(REG_LCD_LCDINTS);
	/* It's Timing Generator output a VSYNC pulse */
        
    /* It's Timing Generator output a VSYNC pulse */
    if(interruptStatus & LCD_LCDINTS_VSIS)
    {
	    _lcd_VSYNC = 1;
        _lcd_VSYNCCount++;
    
	    /* Write one to clear this interrupt status */	            
        outpw(REG_LCD_LCDINTC, ~interruptStatus | LCD_LCDINTC_VSIC); 	    
    } 
    //printk("I \n");
}
#endif

void Disable_LCD(void)
{
	ENTER();
	
	 /* Disable FIFO */
    outpw(REG_LCD_FIFOCON, inpw(REG_LCD_FIFOCON) & ~(LCD_FIFOCON_FIFOEN_FIFO1 | LCD_FIFOCON_FIFOEN_FIFO2)); 
    
    /* Disable LCD Controller */
    outpw(REG_LCD_LCDCON, inpw(REG_LCD_LCDCON) & ~LCD_LCDCON_LCDCEN);
    
    /* Reset LCD Controller */
    outpw(REG_LCD_LCDCON, LCD_LCDCON_LCDRST);
    
    LEAVE();
}

void Enable_LCD(void)
{
	ENTER();
	
	/* Configure LCD FIFOs controller register and tigger the engine */
    outpw(REG_LCD_FIFOCON, LCD_FIFOCON_FIFOEN_FIFO1); 
   
    /* LCD Controller Enable */
    outpw(REG_LCD_LCDCON, inpw(REG_LCD_LCDCON) | LCD_LCDCON_LCDCEN);
    
    LEAVE();
}

#ifdef CONFIG_W90P710_LCD_TFT_CASIO

void InitCasioLCD(void)
{
	UINT32 GPIO_Value = 0;
	
	ENTER();
	
	/* using USI interface */
	// set environment
	GPIO_Value = inpw(REG_GPIO_CFG5);
	GPIO_Value = GPIO_Value & 0xFFF00FFF;
	GPIO_Value = GPIO_Value | 0x000AA000;
	outpw(REG_GPIO_CFG5, GPIO_Value);

	//outpw(REG_USI_DIVIDER, 0x3);	// SCK = PCLK/8 (10MHz)
	//outpw(REG_USI_DIVIDER, 0x4);	// SCK = PCLK/10 (8MHz)
	outpw(REG_USI_DIVIDER, 0x27);	// SCK = PCLK/80 (1MHz)
	outpw(REG_USI_SSR, 0x00);		// CS active low
	outpw(REG_USI_CNTRL, 0x64);	// Tx: rising edge, Rx: rising edge
									// Tx_BIT_LEN = 12 bit, Tx_NUM = 1
	
	/* sending command to panel */
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active

	// configure VDISP
	outpw(REG_USI_Tx0, 0xC80);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active
	
	// configure PANEL3
	outpw(REG_USI_Tx0, 0xAFB);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active
	
	// configure FUNC1
	outpw(REG_USI_Tx0, 0x618);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active
	
	// configure FUNC2
	outpw(REG_USI_Tx0, 0xE20);
	usiIsBusy();

	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active
	
	// configure BRIGHT
	outpw(REG_USI_Tx0, 0x022);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	
	/* Select pixel format */
	outpw(REG_LCD_LCDCON, inpw(REG_LCD_LCDCON) | LCD_LCDCON_CASIOSHOWTYPE_R1G2B3R4G5B6);	
	
	LEAVE();
}
#endif

#ifdef CONFIG_W90P710_LCD_TFT_AUO960240
void InitAUOLCD(void)
{
	
	int i;
	UINT32 GPIO_Value = 0;
	UINT16 delay = 10;
	ENTER();
	
	/* using USI interface */
	// set environment
	GPIO_Value = inpw(REG_GPIO_CFG5);
	GPIO_Value = GPIO_Value & 0xFFF00FFF;
	GPIO_Value = GPIO_Value | 0x000AA000;
	outpw(REG_GPIO_CFG5, GPIO_Value);
	
	outpw(REG_USI_DIVIDER, 0x27);	// SCK = PCLK/80 (1MHz)
	outpw(REG_USI_SSR, 0x00);		// CS active low
	outpw(REG_USI_CNTRL, 0x84);		// Tx: rising edge, Rx: rising edge
									// Tx_BIT_LEN = 16 bit, Tx_NUM = 1
	
	for(i=0;i<delay;i++);
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active

	outpw(REG_USI_Tx0, 0x516);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	

	for(i=0;i<delay;i++);
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active

	outpw(REG_USI_Tx0, 0x408);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive

	
	for(i=0;i<delay;i++);
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active

	outpw(REG_USI_Tx0, 0x7F1);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	
	for(i=0;i<delay;i++);
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active

	outpw(REG_USI_Tx0, 0x8C0);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	
	for(i=0;i<delay;i++);
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active

	outpw(REG_USI_Tx0, 0x616);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	
	//configure R5
	for(i=0;i<delay;i++);
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0 active

	outpw(REG_USI_Tx0, 0x5D7);
	usiIsBusy();
	
	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0 deactive
	
	LEAVE();
}
#endif

int usiIsBusy(void)
{
	outpw(REG_USI_CNTRL, inpw(REG_USI_CNTRL)|0x01);
	while(inpw(REG_USI_CNTRL) & 0x01);

	return 1;
}


#ifdef MODULE
module_init(w90p710fb_init);
#endif