add_cmp_select.v

（2

//this module do two state's metric compare; 0,1; 2,3; 
module add_cmp_select(path, cmet0_out, cmet1_out, cmet0_in, cmet1_in, metric0, metric1);//, clk, reset);
output [1:0] path;
output [15:0] cmet0_out,cmet1_out;			//output the metrics
input  [15:0] cmet0_in, cmet1_in;
input [4:0] metric0, metric1;			//input the two 0-1metrics
//input clk;
//input reset;

wire [15:0] cmet0_out,cmet1_out;
wire [1:0] path;
wire [15:0]midvar0, midvar1, midvar3, midvar2;
assign midvar0 = cmet0_in + {10'b0, metric0};
assign midvar1 = cmet1_in + {10'b0, metric1};
assign midvar2 = cmet0_in + {10'b0, metric1};
assign midvar3 = cmet1_in + {10'b0, metric0};
    
assign {cmet0_out,path[0]} = ((cmet0_in + {10'b0, metric0}) > (cmet1_in + {10'b0, metric1})) ? {(cmet1_in + {10'b0, metric1}),1'b1} : {(cmet0_in + {10'b0, metric0}),1'b0}; 
assign {cmet1_out,path[1]} = ((cmet0_in + {10'b0, metric1}) > (cmet1_in + {10'b0, metric0})) ? {(cmet1_in + {10'b0, metric0}),1'b1} : {(cmet0_in + {10'b0, metric1}),1'b0}; 
 
//always @(posedge clk)
//  if(reset)
//    begin
//      cmet0_out <= 0;
//      cmet1_out <= 0;
//      path <= 0;
//    end
//  else
//  begin
//   {cmet0_out,path[0]} <= (midvar0 > midvar1) ? {midvar1,1'b1} : {midvar0,1'b0};
//   {cmet1_out,path[1]} <= (midvar2 > midvar3) ? {midvar3,1'b1} : {midvar2,1'b0};
//  end
//
endmodule