📄 cc6.lst
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218 1
219 1 CCU6_CC61SRL = 0x00; // load CCU6 capture/compare shadow register
220 1 // low for channel 1
221 1 CCU6_CC61SRH = 0x80; // load CCU6 capture/compare shadow register
222 1 // high for channel 1
223 1
224 1
225 1 /// -----------------------------------------------------------------------
226 1 /// Configuration of CCU6 Channel 2:
227 1 /// -----------------------------------------------------------------------
228 1 /// - compare mode 3 is selected
229 1 /// - T12 modulation for output CC62 is enabled
230 1 /// - T13 modulation for output CC62 is disabled
231 1 /// - the trap functionality of the pin CC62 is disabled
232 1 /// - the compare output CC62 drives passive level while CC62ST is '0'
233 1 /// - the passive level of the output CC62 is '1'
234 1 /// - T12 modulation for output COUT62 is enabled
235 1 /// - T13 modulation for output COUT62 is disabled
236 1 /// - the trap functionality of the pin COUT62 is disabled
237 1 /// - the compare output COUT62 drives passive level while CC62ST is '1'
238 1 /// - the passive level of the output COUT62 is '1'
239 1 /// - dead time generation is enabled
240 1
241 1 /// - generation interrupt on flag ICC62R is disabled
C51 COMPILER V8.04b CC6 03/23/2008 23:18:05 PAGE 5
242 1 /// - generation interrupt on flag ICC62F is disabled
243 1
244 1 CCU6_CC62SRL = 0x00; // load CCU6 capture/compare shadow register
245 1 // low for channel 2
246 1 CCU6_CC62SRH = 0x40; // load CCU6 capture/compare shadow register
247 1 // high for channel 2
248 1
249 1
250 1 /// -----------------------------------------------------------------------
251 1 /// Configuration of CCU6 Channel 3:
252 1 /// -----------------------------------------------------------------------
253 1 /// - T13 output is not inverted
254 1
255 1
256 1 CCU6_CC63SRL = 0x00; // load CCU6 capture/compare shadow register
257 1 // low for channel 3
258 1 CCU6_CC63SRH = 0x00; // load CCU6 capture/compare shadow register
259 1 // high for channel 3
260 1
261 1
262 1 /// -----------------------------------------------------------------------
263 1 /// Configuration of Multi-Channel Mode Output Register
264 1 /// -----------------------------------------------------------------------
265 1
266 1 CCU6_MCMOUTSL = 0x00; // load CCU6 multi channel mode output
267 1 // control register low
268 1 CCU6_MCMOUTSH = 0x00; // load CCU6 multi channel mode output
269 1 // control register high
270 1
271 1 SFR_PAGE(_cc2, noSST); // switch to page 2
272 1
273 1 /// -----------------------------------------------------------------------
274 1 /// Configuration of Timer Control Register
275 1 /// -----------------------------------------------------------------------
276 1
277 1 CCU6_TCTR2L = 0x00; // load CCU6 timer control register 2 low
278 1 CCU6_TCTR2H = 0x00; // load CCU6 timer control register 2 high
279 1
280 1 /// -----------------------------------------------------------------------
281 1 /// Configuration of CCU6 trap control:
282 1 /// -----------------------------------------------------------------------
283 1 /// - a trap can only be generated by SW by setting the bit TRPF
284 1 /// - the trap state is left when a zero-match of T12 (while counting up)
285 1 /// is detected (synchronization to T12)
286 1 /// - bit TRPF is automatically cleared by HW (according to TRPPEN, TRPM0
287 1 /// and TRPM1)
288 1 /// - trap interrupt is disabled
289 1
290 1 CCU6_TRPCTRL = 0x00; // load CCU6 trap control register low
291 1 CCU6_TRPCTRH = 0x00; // load CCU6 trap control register high
292 1
293 1 /// -----------------------------------------------------------------------
294 1 /// Configuration of Multi Channel Mode:
295 1 /// -----------------------------------------------------------------------
296 1 /// - multi channel mode is disabled
297 1
298 1 CCU6_MODCTRL = 0x3F; // load CCU6 modulation control register low
299 1 CCU6_MODCTRH = 0x00; // load CCU6 modulation control register high
300 1
301 1 /// -----------------------------------------------------------------------
302 1 /// Configuration of Multi_Channel Mode Control Register
303 1 /// -----------------------------------------------------------------------
C51 COMPILER V8.04b CC6 03/23/2008 23:18:05 PAGE 6
304 1
305 1 CCU6_MCMCTR = 0x00; // load CCU6 multi channel mode control
306 1 // register
307 1
308 1 /// -----------------------------------------------------------------------
309 1 /// Configuration of T12 Capture/Compare Mode Select Register
310 1 /// -----------------------------------------------------------------------
311 1
312 1 CCU6_T12MSELL = 0x33; // load CCU6 T12 campture/compare mode
313 1 // select register low
314 1
315 1 CCU6_T12MSELH = 0x03; // load CCU6 T12 campture/compare mode
316 1 // select register high
317 1 /// -----------------------------------------------------------------------
318 1 /// Configuration of Passive State Level Register
319 1 /// -----------------------------------------------------------------------
320 1
321 1 CCU6_PSLR = 0x3F; // load CCU6 passive state level register low
322 1
323 1 /// -----------------------------------------------------------------------
324 1 /// Configuration of CCU6 interrupt control:
325 1 /// -----------------------------------------------------------------------
326 1 /// - for channel 0 interrupts is node I0 selected
327 1 /// - for channel 1 interrupts is node I0 selected
328 1 /// - for channel 2 interrupts is node I0 selected
329 1 /// - for correct hall event interrupt is node I0 selected
330 1 /// - for error interrupts is node I0 selected
331 1 /// - for T12 interrupts is node I0 selected
332 1 /// - for T13 interrupts is node I0 selected
333 1
334 1 CCU6_INPL = 0x00; // load CCU6 capture/compare interrupt node
335 1 // pointer register low
336 1 CCU6_INPH = 0x00; // load CCU6 capture/compare interrupt node
337 1 // pointer register high
338 1
339 1 CCU6_IENL = 0x00; // load CCU6 capture/compare interrupt
340 1 // enable register low
341 1 CCU6_IENH = 0x00; // load CCU6 capture/compare interrupt
342 1 // enable register high
343 1
344 1 SFR_PAGE(_cc3, noSST); // switch to page 3
345 1
346 1 /// -----------------------------------------------------------------------
347 1 /// Configuration of Compare State Register
348 1 /// -----------------------------------------------------------------------
349 1
350 1 CCU6_CMPSTATH = 0x2A; // load CCU6 compare status register high
351 1
352 1 /// -----------------------------------------------------------------------
353 1 /// Configuration of CCU6 module input signals:
354 1 /// -----------------------------------------------------------------------
355 1 /// - signal CC60_0 is used as output
356 1 /// - signal CC61_0 is used as output
357 1 /// - signal CC62_0 is used as output
358 1 /// - signal #CTRAP is not used
359 1
360 1 CCU6_PISEL0L = 0x00; // load CCU6 Port Input Select Register 0 Low
361 1
362 1 /// - signal CCPOS0 is not used
363 1 /// - signal CCPOS1 is not used
364 1 /// - signal CCPOS2 is not used
365 1 /// - signal T12HR is not used
C51 COMPILER V8.04b CC6 03/23/2008 23:18:05 PAGE 7
366 1
367 1 CCU6_PISEL0H = 0x00; // load CCU6 Port Input Select Register 0
368 1 // High
369 1
370 1 /// - signal T13HR is not used
371 1
372 1 CCU6_PISEL2 = 0x00; // load CCU6 Port Input Select Register 2
373 1
374 1
375 1 /// Pin P3.0 is used as CC60_0 Output
376 1 /// Pin P3.1 is used as COUT60_0 Output
377 1 /// Pin P3.2 is used as CC61_0 Output
378 1 /// Pin P3.3 is used as COUT61_0 Output
379 1 /// Pin P3.4 is used as CC62_0 Output
380 1 /// Pin P3.5 is used as COUT62_0 Output
381 1
382 1 SFR_PAGE(_pp2, noSST); // switch to page 2
383 1
384 1 P3_ALTSEL0 |= 0x3F; // set AltSel0
385 1 P3_ALTSEL1 &= ~(ubyte)0x3F; // set AltSel1
386 1
387 1 SFR_PAGE(_pp0, noSST); // switch to page 0
388 1 P3_DIR |= 0x3F; // set Direction as Output
389 1
390 1
391 1 /// -----------------------------------------------------------------------
392 1 /// Configuration of the used CCU6 Channels Interrupts:
393 1 /// -----------------------------------------------------------------------
394 1 /// - capture/compare interrupt node 0 is disabled
395 1 /// - capture/compare interrupt node 1 is disabled
396 1 /// - capture/compare interrupt node 2 is disabled
397 1 /// - capture/compare interrupt node 3 is disabled
398 1
399 1 SFR_PAGE(_cc0, noSST); // switch to page 0
400 1
401 1 /// -----------------------------------------------------------------------
402 1 /// Timer Control Register
403 1 /// -----------------------------------------------------------------------
404 1 /// - enable shadow transfer to T12 and T13
405 1
406 1 CCU6_TCTR4L = 0x40; // load CCU6 timer control register 4 low
407 1
408 1 CCU6_TCTR4H = 0x40; // load CCU6 timer control register 4 high
409 1
410 1 /// Start timer settings
411 1
412 1 CCU6_TCTR4L = 0x02; // start timer 12
413 1
414 1
415 1 // USER CODE BEGIN (Init,3)
416 1
417 1 // USER CODE END
418 1
419 1 } // End of function CC6_vInit
420
421
422 // USER CODE BEGIN (CCU6_General,10)
423
424 // USER CODE END
425
C51 COMPILER V8.04b CC6 03/23/2008 23:18:05 PAGE 8
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 124 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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