📄 algebra_loop.mdl
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Model {
Name "algebra_loop"
Version 4.00
SampleTimeColors off
LibraryLinkDisplay "none"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowStorageClass off
ExecutionOrder off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
BlockNameDataTip off
BlockParametersDataTip on
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
Created "Tue Mar 30 14:30:47 1999"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "Yongchun"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Thu Dec 06 16:32:42 2001"
ModelVersionFormat "1.%<AutoIncrement:4>"
ConfigurationManager "none"
SimParamPage "Solver"
StartTime "0.0"
StopTime "10"
SolverMode "SingleTasking"
Solver "VariableStepDiscrete"
RelTol "1e-3"
AbsTol "1e-6"
Refine "1"
MaxStep "1"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "1"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[]"
SaveTime off
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput off
OutputSaveName "yout"
LoadInitialState off
InitialState "[]"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
LimitDataPoints off
MaxDataPoints "1000"
Decimation "1"
AlgebraicLoopMsg "none"
MinStepSizeMsg "warning"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
SingleTaskRateTransMsg "none"
MultiTaskRateTransMsg "error"
IntegerOverflowMsg "warning"
CheckForMatrixSingularity "none"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
InvalidFcnCallConnMsg "error"
SignalLabelMismatchMsg "none"
LinearizationMsg "none"
VectorMatrixConversionMsg "none"
SfunCompatibilityCheckMsg "none"
BlockPriorityViolationMsg "warning"
ArrayBoundsChecking "none"
ConsistencyChecking "none"
ZeroCross on
Profile off
SimulationMode "normal"
RTWSystemTargetFile "grt.tlc"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
TLCProfiler off
TLCDebug off
TLCCoverage off
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "oneshot"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect off
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
OptimizeBlockIOStorage on
BufferReuse on
ParameterPooling on
BlockReductionOpt off
RTWExpressionDepthLimit 5
BooleanDataType off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "algebra_loop"
Location [165, 247, 624, 450]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Constant
Name "Constant"
Position [30, 85, 50, 105]
Value "1"
VectorParams1D on
}
Block {
BlockType Display
Name "Display"
Ports [1]
Position [225, 80, 315, 110]
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType Gain
Name "Gain"
Position [125, 139, 170, 171]
Orientation "left"
ShowName off
Gain "1"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
Port {
PortNumber 1
Name "x"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Gain
Name "Gain1"
Position [120, 15, 170, 45]
Orientation "left"
ShowName off
Gain "1"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
Port {
PortNumber 1
Name "x"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
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}
Block {
BlockType Sum
Name "Sum"
Ports [3, 1]
Position [75, 75, 115, 115]
ShowName off
IconShape "round"
Inputs "-+-"
SaturateOnIntegerOverflow on
Port {
PortNumber 1
Name "x"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Line {
SrcBlock "Constant"
SrcPort 1
DstBlock "Sum"
DstPort 2
}
Line {
Name "x"
Labels [0, 0]
SrcBlock "Gain1"
SrcPort 1
Points [-20, 0]
DstBlock "Sum"
DstPort 1
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Line {
Name "x"
Labels [0, 0]
SrcBlock "Gain"
SrcPort 1
Points [-25, 0]
DstBlock "Sum"
DstPort 3
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Line {
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Labels [0, 0]
SrcBlock "Sum"
SrcPort 1
Points [75, 0]
Branch {
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Branch {
DstBlock "Display"
DstPort 1
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Branch {
Points [0, 60]
DstBlock "Gain"
DstPort 1
}
}
Branch {
Points [0, -65]
DstBlock "Gain1"
DstPort 1
}
}
}
}
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