📄 uss_dpopns.s
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/* Copyright 1991-1992 Wind River Systems, Inc. */ .data .globl _copyright_wind_river .long _copyright_wind_river/*modification history--------------------01h,04sep98,yh fixed DAINT for floor function.01g,14mar95,tmk inverted conditional assembly logic for 68000/10 to allow for CPUs other than 68020.01f,23aug92,jcf changed bxxx to jxx.01e,26may92,rrr the tree shuffle01d,30mar92,kdl added include of "uss_fp.h"; commented-out ".set" directives (SPR #1398).01c,04oct91,rrr passed through the ansification filter -changed ASMLANGUAGE to _ASMLANGUAGE -changed copyright notice01b,29jan91,kdl added include of vxWorks.h for conditional assembly.01a,28jan91,kdl modified original US Software version to use conditional assembly for 68000/10 multiply and divide operations.*//*DESCRIPTION| ttl FPAC 68K/DPOPNS: IEEE Double Precision Operations|DPOPNS idnt 1,0 ; IEEE Double Precision Operations| ; DPOPNS.A68|| * * * * * * * * * *|| Copyright (c) 1985,1989 by| United States Software Corporation| 14215 N.W. Science Park Drive| Portland, Oregon 97229|| This software is furnished under a license and may be used| and copied only in accordance with the terms of such license| and with the inclusion of the above copyright notice.| This software or any other copies thereof may not be provided| or otherwise made available to any other person. No title to| and ownership of the software is hereby transferred.|| The information in this software is subject to change without| notice and should not be construed as a commitment by United| States Software Corporation.|| Released: 12 January 1989 V2.0|| * * * * * * * * * *||NOMANUAL*/#define _ASMLANGUAGE#include "vxWorks.h"#include "uss_fp.h"| .set comp64,0 |flag for 64 bit multiply/divide| opt BRS ; Default to forward branches SHORT| .globl DFLOAT .globl DFIX .globl DINT .globl DAINT .globl DPADD .globl DPMUL .globl DPDIV .globl DPRDIV .globl DPCMP| .globl DNANRS .globl DINFRS .globl DUNFRS .globl DZERRS| .globl GETDP1,DOPRSL|||| .set DBIAS,1023 | Double precision format exponent bias||| .set CCRC,0x01 | Carry bit in CCR| .set CCRV,0x02 | Overflow bit in CCR| .set CCRZ,0x04 | Zero bit in CCR| .set CCRN,0x08 | Negative bit in CCR| .set CCRX,0x10 | Extend bit in CCR||| .set ERNAN,3| .set EROVF,2| .set ERUNF,1|| xref FPERR| xref NANFLG| xref INFFLG| xref UNFFLG|| .text|/*| page|| DFLOAT| ======| Float the integer value in D0:D1 into a double precision floating| point value on the stack.|*/DFLOAT: moveal sp@+,a0 | Return addr into a0 subal a2,a2 | Set a2 = 0 andl d0,d0 jne DFLT01 | J/ value <> 0 andl d1,d1 jne DFLT02 | J/ value > 0| movel d0,sp@- | Place 0 value on stack movel d0,sp@- jmp a0@ | Return|DFLT01: jge DFLT02 | J/ value > 0 subql #1,a2 | Set a2 = -1 negl d1 negxl d0|DFLT02: movel #DBIAS+63,d2 | Default bias value andl d0,d0 jne DFLT03 | J/ 32 bit shift not required| subw #32,d2 | Reduce exponent exg d0,d1 | Do shift (since d0 is zero)|DFLT03: cmpil #0x0000FFFF,d0 jhi DFLT04 | J/ 16 bit shift not required| swap d0 | Do the shift swap d1 movew d1,d0 clrw d1 subiw #16,d2|DFLT04: andl d0,d0 jmi DFLT07 | J/ value normalized|DFLT05: subqw #1,d2 | Dec exponent, shift mantissa asll #1,d1 roxll #1,d0 jpl DFLT05 | J/ more shifts to do|DFLT07: exg d0,d2 | Position to standard d0/d2:d3/a2 form movel d1,d3 jra DOPRSL | J/ double precision result (w/ round)/*|| page|| DFIX| ====| Routine to convert the double precision argument on the stack| to an integer value (with a dropoff flag).|*/DFIX: bsr GETDP1 | Extract/unpack one double prec val bsr DFIX00 | Use internal routine jmp a0@ | Return to caller||DFIX00: andw d0,d0 jne DFIX01 | J/ value <> 0.0| subl d0,d0 | Return a zero value, no drop off clrl d1 rts|DFIX01: cmpiw #DBIAS,d0 jcc DFIX02 | J/ abs() >= 1.0 [BCC == BHS]| clrl d0 | Return a zero value clrl d1 orib #CCRC+CCRX,ccr | Set carry/extend bits| ## ORI #$11,CCR rts|DFIX02: subiw #DBIAS+63,d0 jlt DFIX03 | J/ abs() < 2^63| moveq #-1,d0 | Set d0:d1 to the maximum integer value moveq #-1,d1 lsrl #1,d0 | d0:d1 = 0x7FFFFFFFFFFFFFFF movel a2,d2 subl d2,d1 | Account for the sign of the arg. subxl d2,d0 rts|DFIX03: clrl d1 | Clear bit drop off accum| negw d0 | Positive shift count cmpiw #32,d0 jlt DFIX04 | J/ less than a word shift| andl d3,d3 sne d1 | Set d1 = 0FFH if d3 <> 0| movel d2,d3 clrl d2| subiw #32,d0|DFIX04: cmpiw #16,d0 jlt DFIX05 | J/ less than a swap left| orw d3,d1 | Accum any bits dropped off| movew d2,d3 | Do a swap shift (16 bits) swap d3 clrw d2 swap d2| subiw #16,d0|DFIX05: subqw #1,d0 jlt DFIX07 | J/ shifting complete|DFIX06: lsrl #1,d2 roxrl #1,d3| roxll #1,d1| dbra d0,DFIX06|DFIX07: cmpaw #0,a2 | Check for negative value jeq DFIX08 | J/ positive| negl d3 negxl d2|DFIX08: moveq #-1,d0 addl d1,d0 | Set carry if bits lost| exg d2,d0 | Move integer result to d0:d1 exg d3,d1 rts/*|| page|| DINT| ====| Return the largest integer smaller than the argument provided|*/DINT: bsr GETDP1 bsr DFIX00| jcc DINT00 | J/ no bits lost cmpaw #0,a2 jeq DINT00 | J/ not negative subql #1,d1 | Decrement integer value jcc DINT00 | J/ no borrow subql #1,d0DINT00: jmp a0@/*|| page|| DAINT| =====| Floating point corollary to the DINT function|*/DAINT: bsr GETDP1 cmpiw #DBIAS+52,d0 | Check for value too large jcc DAIN10 | J/ return with same value| movew d0,d4 | Copy the exponent value subiw #DBIAS-1,d4 jgt DAIN02 | J/ abs() >= 1.0| cmpiw #0, d2 | check if mantissa is zero jne DAIN09 cmpiw #0, d3 jeq DAIN08DAIN09: movew a2,d4 jne DAIN01 | J/ 0.0 > value > -1.0|DAIN08: clrl sp@- | Return a zero value clrl sp@- jmp a0@|DAIN01: clrl sp@- | Return -1.0 movel #0xBFF00000,sp@- jmp a0@|DAIN02: moveq #-1,d1 | Fill d1 with ones| cmpiw #32,d4 | See which word needs to be masked jle DAIN03 | J/ low order word zeroed, mask hi wd| subiw #32,d4 lsrl d4,d1 | Adjust mask movel d3,d4 andl d1,d4 | Extract bits to drop jeq DAIN10 | J/ no drop off, return as provided| eorl d4,d3 | Strip the bits cmpaw #0,a2 jeq DAIN10 | J/ positive number| clrl d4 | (for ADDX below) addql #1,d1 | Change mask to increment value addl d1,d3 addxl d4,d2 | Perform any carry jra DAIN04 | J/ rejoin flow|DAIN03: lsrl d4,d1 | Adjust high word mask movel d2,d4 andl d1,d4 | Get bits to strip eorl d4,d2 | Strip bits| orl d3,d4 | Record any dropped bits from lo word clrl d3 | Clear the low word| tstl d4 jeq DAIN10 | J/ no dropoff cmpaw #0,a2 jeq DAIN10 | J/ positive number| addql #1,d1 | Turn mask into increment value addl d1,d2|DAIN04: jcc DAIN10 | J/ no overflow| roxrl #1,d2 | Right shift the mantissa|** ROXR.L #1,D3 ; (not nec -> mantissa = 80..00) addqw #1,d0 | Bump the exponent|DAIN10: jra DOPRSL | Return computed value/*|| page|| DPADD| =====| Double precision add routine|*/DPADD: bsr GETDP2 | Fetch both operands cmpiw #0x7FF,d0| jne DPA010 | J/ operand not NaN/INF| lsll #1,d2 | Remove implicit bit jne DNANRS | J/ ? + NaN -> NaN| cmpiw #0x7FF,d1 jne DINFRS | J/ 0,num + INF -> INF| lsll #1,d4 | Remove implicit bit jne DNANRS | J/ INF + NaN -> NaN| cmpal a2,a3
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