dbgarchlib.c

VXWORKS源代码

    printf ("\n    Rounding Precision: ");
    switch ((fsrValue & FSR_RP) >> FSR_RP_SHIFT)
	{
	case (RP_DBLEXT):
	    printf ("double-extended.");
	    break;

	case (RP_SINGLE):
	    printf ("single.");
	    break;

	case (RP_DOUBLE):
	    printf ("double.");
	    break;

	case (RP_RESERVED):
	    printf ("unused and reserved.");
	    break;
	}

    printf ("    Trap Enable Mask:");
    fsrExcShow ((fsrValue & FSR_TEM) >> FSR_TEM_SHIFT);

    printf ("    Floating-point Trap Type: ");
    switch ((fsrValue & FSR_FTT) >> FSR_FTT_SHIFT)
	{
	case (FTT_NONE):
	    printf ("none.");
	    break;

	case (FTT_IEEE):
	    printf ("IEEE exception.");
	    break;

	case (FTT_UNFIN):
	    printf ("unfinished fpop.");
	    break;

	case (FTT_UNIMP):
	    printf ("unimplemented fpop.");
	    break;

	case (FTT_SEQ):
	    printf ("sequence error.");
	    break;

	case (FTT_ALIGN):
	    printf ("alignment, by software convention.");
	    break;

	case (FTT_DFAULT):
	    printf ("data fault, by software convention.");
	    break;

	default:
	    printf ("unknown exception %x.",
		(fsrValue & FSR_FTT_SHIFT) >> FSR_FTT_SHIFT);
	}

    printf ("\n    Queue Not Empty: ");
    if (fsrValue & FSR_QNE)
	printf ("TRUE");
    else
	printf ("FALSE");
    printf ("\n    Partial Remainder: ");
    if (fsrValue & FSR_PR)
	printf ("TRUE");
    else
	printf ("FALSE");
    printf ("\n    Condition Codes: ");
    if ((fsrValue & FSR_FCC) == FSR_FCC_EQUAL)
	printf ("equal.");
    if ((fsrValue & FSR_FCC) == FSR_FCC_LT)
	printf ("less than.");
    if ((fsrValue & FSR_FCC) == FSR_FCC_GT)
	printf ("greater than.");
    if ((fsrValue & FSR_FCC) == FSR_FCC_UNORD)
	printf ("unordered.");

    printf ("\n    Accumulated exceptions:");
    fsrExcShow ((fsrValue & FSR_AEXC) >> FSR_AEXC_SHIFT);

    printf ("    Current exceptions:");
    fsrExcShow (fsrValue & FSR_CEXC);
    }

/*******************************************************************************
*
* fsrExcShow - display the meaning of a specified `fsr' exception field
*
* This routine displays the meaning of all the fields in a specified `fsr'
* exception field, symbolically.
*
* SEE ALSO: SPARC Architecture manual.
*
* NOMANUAL
*/

LOCAL void fsrExcShow (fsrExcField)
    UINT fsrExcField;

    {
    printf ("       ");
    if ((fsrExcField & FSR_CEXC) == 0)
	printf ("none");
    else
	{
	if (fsrExcField & FSR_CEXC_NX)
	    printf (" inexact");
	if (fsrExcField & FSR_CEXC_DZ)
	    printf (" divide-by-zero");
	if (fsrExcField & FSR_CEXC_UF)
	    printf (" underflow");
	if (fsrExcField & FSR_CEXC_OF)
	    printf (" overflow");
	if (fsrExcField & FSR_CEXC_NV)
	    printf (" invalid");
	}
    printf (".\n");
    }
/*******************************************************************************
*
* getOneReg - return the contents of one register
*
* Given a task's ID, this routine returns the contents of the register
* specified by the register code.  This routine is used by g0(), i0(), psr(), 
* and so on.
* The register codes are defined in regsSparc.h.
*
* RETURNS: register contents, or ERROR.
*/

LOCAL int getOneReg
    (
    int taskId,		/* task ID, 0 means default task */
    int regCode		/* code for specifying register */
    )
    {
    REG_SET regSet;	/* get task's regs into here */

    taskId = taskIdFigure (taskId);	/* translate super name to ID */

    if (taskId == ERROR)		/* couldn't figure out super name */
	return (ERROR);
    taskId = taskIdDefault (taskId);	/* set the default ID */

    if (taskRegsGet (taskId, &regSet) != OK)
	return (ERROR);

    return (*(int *)((int)&regSet + regCode));
    }

/*******************************************************************************
*
* g0 - return the contents of register `g0' (also `g1' - `g7') (SPARC)
*
* This command extracts the contents of global register `g0' from the TCB of a
* specified task.  If <taskId> is omitted or 0, the current default task is
* assumed.
*
* Similar routines are provided for all global registers (`g0' - `g7'):
* g0() - g7().
*
* RETURNS: The contents of register `g0' (or the requested register).
*
* SEE ALSO:
* .pG "Target Shell"
*
* INTERNAL
* Although this routine is hereby marked NOMANUAL, it actually gets
* published, but from arch/doc/dbgArchLib.c.
* ...not any more -- SPARC no longer supported.
*
* NOMANUAL
*/

int g0
    (
    int taskId		/* task ID, 0 means default task */
    )
    
    {
    return (getOneReg (taskId, REG_SET_GLOBAL(0)));
    }

int g1 (int taskId) { return (getOneReg (taskId, REG_SET_GLOBAL(1))); }
int g2 (int taskId) { return (getOneReg (taskId, REG_SET_GLOBAL(2))); }
int g3 (int taskId) { return (getOneReg (taskId, REG_SET_GLOBAL(3))); }
int g4 (int taskId) { return (getOneReg (taskId, REG_SET_GLOBAL(4))); }
int g5 (int taskId) { return (getOneReg (taskId, REG_SET_GLOBAL(5))); }
int g6 (int taskId) { return (getOneReg (taskId, REG_SET_GLOBAL(6))); }
int g7 (int taskId) { return (getOneReg (taskId, REG_SET_GLOBAL(7))); }

/*******************************************************************************
*
* o0 - return the contents of register `o0' (also `o1' - `o7') (SPARC)
*
* This command extracts the contents of out register `o0' from the TCB of a
* specified task.  If <taskId> is omitted or 0, the current default task is
* assumed.
*
* Similar routines are provided for all out registers (`o0' - `o7'):
* o0() - o7().
*
* The stack pointer is accessed via `o6'.
*
* RETURNS: The contents of register `o0' (or the requested register).
*
* SEE ALSO:
* .pG "Target Shell"
*
* NOMANUAL
*/

int o0
    (
    int taskId		/* task ID, 0 means default task */
    )
    
    {
    return (getOneReg (taskId, REG_SET_OUT(0)));
    }

int o1 (int taskId) { return (getOneReg (taskId, REG_SET_OUT(1))); }
int o2 (int taskId) { return (getOneReg (taskId, REG_SET_OUT(2))); }
int o3 (int taskId) { return (getOneReg (taskId, REG_SET_OUT(3))); }
int o4 (int taskId) { return (getOneReg (taskId, REG_SET_OUT(4))); }
int o5 (int taskId) { return (getOneReg (taskId, REG_SET_OUT(5))); }
int o6 (int taskId) { return (getOneReg (taskId, REG_SET_OUT(6))); }
int o7 (int taskId) { return (getOneReg (taskId, REG_SET_OUT(7))); }

/*******************************************************************************
*
* l0 - return the contents of register `l0' (also `l1' - `l7') (SPARC)
*
* This command extracts the contents of local register `l0' from the TCB of a
* specified task.  If <taskId> is omitted or 0, the current default task is
* assumed.
*
* Similar routines are provided for all local registers (`l0' - `l7'):
* l0() - l7().
*
* RETURNS: The contents of register `l0' (or the requested register).
*
* SEE ALSO:
* .pG "Target Shell"
*
* NOMANUAL
*/

int l0
    (
    int taskId		/* task ID, 0 means default task */
    )
    
    {
    return (getOneReg (taskId, REG_SET_LOCAL(0)));
    }

int l1 (int taskId) { return (getOneReg (taskId, REG_SET_LOCAL(1))); }
int l2 (int taskId) { return (getOneReg (taskId, REG_SET_LOCAL(2))); }
int l3 (int taskId) { return (getOneReg (taskId, REG_SET_LOCAL(3))); }
int l4 (int taskId) { return (getOneReg (taskId, REG_SET_LOCAL(4))); }
int l5 (int taskId) { return (getOneReg (taskId, REG_SET_LOCAL(5))); }
int l6 (int taskId) { return (getOneReg (taskId, REG_SET_LOCAL(6))); }
int l7 (int taskId) { return (getOneReg (taskId, REG_SET_LOCAL(7))); }

/*******************************************************************************
*
* i0 - return the contents of register `i0' (also `i1' - `i7') (SPARC)
*
* This command extracts the contents of in register `i0' from the TCB of a
* specified task.  If <taskId> is omitted or 0, the current default task is
* assumed.
*
* Similar routines are provided for all in registers (`i0' - `i7'):
* i0() - i7().
*
* The frame pointer is accessed via `i6'.
*
* RETURNS: The contents of register `i0' (or the requested register).
*
* SEE ALSO:
* .pG "Target Shell"
*
* NOMANUAL
*/

int i0
    (
    int taskId		/* task ID, 0 means default task */
    )
    
    {
    return (getOneReg (taskId, REG_SET_IN(0)));
    }

int i1 (int taskId) { return (getOneReg (taskId, REG_SET_IN(1))); }
int i2 (int taskId) { return (getOneReg (taskId, REG_SET_IN(2))); }
int i3 (int taskId) { return (getOneReg (taskId, REG_SET_IN(3))); }
int i4 (int taskId) { return (getOneReg (taskId, REG_SET_IN(4))); }
int i5 (int taskId) { return (getOneReg (taskId, REG_SET_IN(5))); }
int i6 (int taskId) { return (getOneReg (taskId, REG_SET_IN(6))); }
int i7 (int taskId) { return (getOneReg (taskId, REG_SET_IN(7))); }

/*******************************************************************************
*
* npc - return the contents of the next program counter (SPARC)
*
* This command extracts the contents of the next program counter from the TCB
* of a specified task.  If <taskId> is omitted or 0, the current default
* task is assumed.
*
* RETURNS: The contents of the next program counter.
*
* SEE ALSO: ti()
*
* NOMANUAL
*/

int npc
    (
    int taskId                 /* task ID, 0 means default task */
    )

    {
    return (getOneReg (taskId, REG_SET_NPC));
    }

/*******************************************************************************
*
* psr - return the contents of the processor status register (SPARC)
*
* This command extracts the contents of the processor status register from
* the TCB of a specified task.  If <taskId> is omitted or 0, the default
* task is assumed.
*
* RETURNS: The contents of the processor status register.
*
* SEE ALSO: psrShow(),
* .pG "Target Shell"
*
* NOMANUAL
*/

int psr
    (
    int taskId			/* task ID, 0 means default task */
    )
    {
    return (getOneReg (taskId, REG_SET_PSR));
    }

/*******************************************************************************
*
* wim - return the contents of the window invalid mask register (SPARC)
*
* This command extracts the contents of the window invalid mask register from
* the TCB of a specified task.  If <taskId> is omitted or 0, the default
* task is assumed.
*
* RETURNS: The contents of the window invalid mask register.
*
* SEE ALSO:
* .pG "Target Shell"
*
* NOMANUAL
*/

int wim
    (
    int taskId 			/* task ID, 0 means default task */
    )

    {
    return (getOneReg (taskId, REG_SET_WIM));
    }

/*******************************************************************************
*
* y - return the contents of the `y' register (SPARC)
*
* This command extracts the contents of the `y' register from the TCB of a
* specified task.  If <taskId> is omitted or 0, the default task is assumed.
*
* RETURNS: The contents of the y register.
*
* SEE ALSO:
* .pG "Target Shell"
*
* NOMANUAL
*/

int y
    (
    int taskId 			/* task ID, 0 means default task */
    )
    {
    return (getOneReg (taskId, REG_SET_Y));
    }


/* dbgArchLib.c - Intel i960 architecture-dependent debugger library */

/* Copyright 1984-1995 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01u,10feb95,jdi  changed 80960 to i960; added missing parens to register names.
01t,13feb93,jdi  documentation cleanup for 5.1; created discrete entries
		 for register routines.
01s,10feb93,yao  installed register display routines based on 5.0.6.
01r,25sep92,wmd  fix ansi warnings.
01q,23aug92,jcf  made filenames consistant.
01p,13aug92,yao  fixed bug in dbgTraceFaultHandle() which restores register
		 sets incorrectly.
01o,10jul92,yao  changed reference of pTcb->pDbgState->pDbgSave->taskPCW
		 to pTcb->dbgPCWSave.
01n,06jul92,yao  removed dbgCacheClear().  made user uncallable globals
		 started with '_'.
01m,04jul92,jcf  scalable/ANSI/cleanup effort.
01l,09jun92,yao  made dbgInterruptPCW LOCAL.  added dbgInit(), dbgHwAdrsCheck().
		 removed dbgDsmInst(), dbgBreakInstGet(), dbgHwBpFree(), 
		 dbgHwBpList, dbgCodeInsert(), dbgHwBpGet(), dbgHwBpInit(), 
		 dbgRegSetPCGet(), dbgTaskProcStatusSave(),dbgTaskPC{S,G}et().
		 changed dbgTaskBPModeSet(), dbgTaskSStepSet() to void.  added
		 dbgArchHwBpFree().
01k,26may92,rrr  the tree shuffle
01j,23apr92,wmd  fixed ansi warnings.
01i,02mar92,wmd  added conditionals for ICE support for i960KB.
01h,04oct91,rrr  passed through the ansification filter
		  -fixed #else and #endif
		  -changed READ, WRITE and UPDATE to O_RDONLY O_WRONLY O_RDWR
		  -changed VOID to void
		  -changed copyright notice
01g,14aug91,del  changes by intel to support KA/KB processors.
01f,12jul91,gae  changed many sys{IMR,IPND,...} to vx{...} names;
		 removal of 68k code comments left for reference.
01e,20apr91,del  added code to dbgReturnAddrGet to deal with leaf procedures.
01d,19mar91,del  redesigned hardware breakpoints.
01c,08jan91,del  documentation.
01b,06jan91,del  changed to work with new REG_SET structure. cleanup.
01a,21oct89,del  written.
*/

/*
DESCRIPTION
This module provides the Intel i960-specific support functions for dbgLib.

NOMANUAL
*/

#include "vxWorks.h"
#include "private/taskLibP.h"
#include "private/windLibP.h"
#include "private/kernelLibP.h"
#include "private/dbgLibP.h"
#include "lstLib.h"
#include "symLib.h"
#include "sysSymTbl.h"
#include "logLib.h"
#include "string.h"
#include "vxLib.h"
#include "stdio.h"
#include "ioLib.h"
#include "usrLib.h"
#include "fppLib.h"

#if	CPU==I960CA
#define	REG_NUM_IPB0	0	/* instruction address breakpoint register 0 */
#define REG_NUM_IPB1	1	/* instruction  address breakpoint register 1 */
#define REG_NUM_DAB0	2	/* data address breakpoint register 0 */
#define	REG_NUM_DAB1	3	/* data address breakpoint register 1 */
#endif	/* CPU==I960CA */

#define MOV_G14_MASK	0xff87ffff	/* mov g14, gx instruction mask */
#define INST_MOV_G14	0x5c80161e	/* mov g14, gx instruction */
#define	SRC_REG_MASK	0x00f80000	/* register mask */

/* externals */
 
IMPORT	void	   dbgBreakpoint ();	/* higher level of bp handling	*/
IMPORT	void	   dbgTrace ();		/* higher level of trace handling */
IMPORT 	void 	   dbgBpStub ();	/* lowest level of bp handling	*/
IMPORT 	BRKENTRY * dbgBrkGet ();

IMPORT int         dsm960Inst ();	/* 960 disassembler routine */
IMPORT BOOL        dsmMemInstrCheck ();
IMPORT UINT32      dsmMEMInstrRefAddrGet ();
IMPORT int         dsmInstrSizeGet ();
IMPORT UINT32      sysFaultVecSet ();
IMPORT BOOL        dsmFuncCallCheck ();

IMPORT UINT32      sysCtrlTable[];
IMPORT int	   ansiFix;		/* fix ansi warnings */
/* globals */

extern char * _archHelp_msg = 		/* help message */
    "pfp, tsp, rip, fp  [task]       Display pfp, sp, rip, and fp of a task\n"
    "r3-r15, g0-g14     [task]       Display a register of a task\n"

#if	CPU == I960CA
    "bh addr[,access[,task[,count[,quite]]]] Set hardware breakpoint\n"
    "                           0 - store only       1 - load/store\n"
    "                           2 - data/inst fetch  3 - any access\n" 
    "                           4 - instruct\n"
#endif	/* CPU == I960CA */

#if (CPU == I960KB)
    "fp0-fp3            [task]  Display floating point register of a task\n"
#endif	/* CPU == I960KB */
    ;