dsmlib.c

VXWORKS源代码

    /* 
     * MOV Changes
     * see mask byte 2 changes on next entry.
     * This change is only done on entries that are extact,
     * with exception to opcode byte 2 bit 4
     *
     * {"MOVD", itMovd,         OP2|MMXREG|MODRM,0,
     *                          0x0f, 0x7e, 0x00,
     *                          0xff, 0xff, 0x00},
     */

    {"MOVD", itMovd,            OP2|MMXREG|MODRM|DISR,0,
                                0x0f, 0x6e, 0x00,       /* opcode */
				0xff, 0xef, 0x00},      /* mask */

    {"MOVQ", itMovq,            OP2|MMXREG|MMXRM|MODRM|DISR,0,
				0x0f, 0x6f, 0x00,       /* opcode */
				0xff, 0xef, 0x00},      /* mask */

    {"PACKSSDW", itPackssdw,	OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0x6b, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PACKSSWB", itPacksswb,	OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0x63, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PACKUSWB", itPackuswb,	OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0x67, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PAND", itPand,		OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xdb, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PANDN", itPandn,		OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xdf, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMADD", itPmadd,		OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xf5, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMULH", itPmulh,		OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xe5, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMULL", itPmull,		OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xd5, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"POR", itPor,		OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xeb, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PXOR", itPxor,		OP2|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xef, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"RDTSC", itRdtsc,		OP2,0,
    				0x0f, 0x31, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"RDMSR", itRdmsr,		OP2,0,
    				0x0f, 0x32, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"RDPMC", itRdpmc,		OP2,0,
    				0x0f, 0x33, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"RSM", itRsm,		OP2,0,
    				0x0f, 0xaa, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SHLD", itShldRMbyI, 	OP2|MODRM|REG|I8,0,
    				0x0f, 0xa4, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SHLD", itShldRMbyCL, 	OP2|MODRM|REG|CL,0,
    				0x0f, 0xa5, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SHRD", itShrdRMbyI, 	OP2|MODRM|REG|I8,0,
    				0x0f, 0xac, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SHRD", itShrdRMbyCL, 	OP2|MODRM|REG|CL,0,
    				0x0f, 0xad, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SYSENTER", itSysenter,	OP2,0,
    				0x0f, 0x34, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SYSEXIT", itSysexit,	OP2,0,
    				0x0f, 0x35, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"UD2", itUd2,		OP2,0,
    				0x0f, 0x0b, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"WBINVD", itWbinvd,       	OP2,0,
    				0x0f, 0x09, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"WRMSR", itWrmsr,		OP2,0,
    				0x0f, 0x30, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */


    /* SIMD Instructions - 16 bit */

    {"ADDPS", itAddps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x58, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"ANDNPS", itAndnps,	OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x55, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"ANDPS", itAndps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x54, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"CMPPS", itCmpps,		OP2|MODRM|I8,XMMREG|XMMRM,
    				0x0f, 0xc2, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"COMISS", itComiss,	OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x2f, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"CVTPI2PS", itCvtpi2ps,    OP2|MODRM|MMXRM,XMMREG,
    				0x0f, 0x2a, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"CVTPS2PI", itCvtps2pi,	OP2|MODRM|MMXREG,XMMRM,
    				0x0f, 0x2d, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"CVTTPS2PI", itCvttps2pi,	OP2|MODRM|MMXREG,XMMRM,
    				0x0f, 0x2c, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"DIVPS", itDivps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x5e, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"MAXPS", itMaxps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x5f, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"MINPS", itMinps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x5d, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"MOVAPS", itMovaps,	OP2|MODRM|DISR,XMMREG|XMMRM,
    				0x0f, 0x28, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"MOVHPS", itMovhps,	OP2|MODRM|DISR,XMMREG,
    				0x0f, 0x16, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"MOVLPS", itMovlps,	OP2|MODRM|DISR,XMMREG,
    				0x0f, 0x12, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"MOVMSKPS", itMovmskps,	OP2|MODRM|REG,XMMRM,
    				0x0f, 0x50, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"MOVUPS", itMovups,	OP2|MODRM|DISR,XMMREG|XMMRM,
    				0x0f, 0x10, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"MULPS", itMulps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x59, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"ORPS", itOrps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x56, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"RCPPS", itRcpps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x53, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"RSQRTPS", itRsqrtps,	OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x52, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SHUFPS", itShufps,	OP2|MODRM|I8,XMMREG|XMMRM,
    				0x0f, 0xc6, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SQRTPS", itSqrtps,	OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x51, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"SUBPS", itSubps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x5c, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"UCOMISS", itUcomiss,	OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x2e, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"UNPCKHPS", itUnpckhps,	OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x15, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"UNPCKLPS", itUnpcklps,	OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x14, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"XORPS", itXorps,		OP2|MODRM,XMMREG|XMMRM,
    				0x0f, 0x57, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PAVGB", itPavgb,		OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xe0, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */
				
    {"PAVGW", itPavgw,		OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xe3, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PEXTRW", itPextrw,	OP2|DISR|MODRM|MMXREG|REGRM|I8,0,
    				0x0f, 0xc5, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PINSRW", itPinsrw,	OP2|MODRM|MMXREG|REGRM|I8,0,
    				0x0f, 0xc4, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMAXSW", itPmaxsw,	OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xee, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMAXUB", itPmaxub,	OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xde, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMINSW", itPminsw,	OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xea, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMINUB", itPminub,	OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xda, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMOVMSKB", itPmovmskb,	OP2|MODRM|MMXREG|REGRM|DISR,0,
    				0x0f, 0xd7, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PMULHUW", itPmulhuw,	OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xe4, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PSADBW", itPsadbw,	OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xf6, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"PSHUFW", itPshufw,	OP2|MODRM|MMXREG|MMXRM|I8,0,
    				0x0f, 0x70, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"MASKMOVQ", itMaskmovq,	OP2|MODRM|MMXREG|MMXRM,0,
    				0x0f, 0xf7, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"MOVNTPS", itMovntps,	OP2|MODRM|DISR,XMMREG|XMMRM,
    				0x0f, 0x2b, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    {"MOVNTQ", itMovntq,	OP2|MODRM|DISR,XMMREG|XMMRM,
    				0x0f, 0xe7, 0x00,	/* opcode */
				0xff, 0xff, 0x00},	/* mask */

    /* 15 bits mask */

    {"CMPXCHG", itCmpxchg,     	OP2|WFUL|MODRM|REG,0,
    				0x0f, 0xb0, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"MOVSX", itMovsx,   	OP2|WFUL|MODRM|REG,0,
    				0x0f, 0xbe, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"MOVZX", itMovzx,   	OP2|WFUL|MODRM|REG,0,
    				0x0f, 0xb6, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REP INS", itRins,      	OP2|WFUL,0,
    				0xf3, 0x6c, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REP LODS", itRlods,    	OP2|WFUL,0,
    				0xf3, 0xac, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REP MOVS", itRmovs,    	OP2|WFUL,0,
    				0xf3, 0xa4, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REP OUTS", itRouts,    	OP2|WFUL,0,
    				0xf3, 0x6e, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REP STOS", itRstos,    	OP2|WFUL,0,
    				0xf3, 0xaa, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REPE CMPS", itRcmps,   	OP2|WFUL,0,
    				0xf3, 0xa6, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REPE SCAS", itRscas,   	OP2|WFUL,0,
    				0xf3, 0xae, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REPNE CMPS", itRNcmps, 	OP2|WFUL,0,
    				0xf2, 0xa6, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"REPNE SCAS", itRNscas, 	OP2|WFUL,0,
    				0xf2, 0xae, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    {"XADD", itXadd,       	OP2|WFUL|MODRM|REG,0,
    				0x0f, 0xc0, 0x00,	/* opcode */
				0xff, 0xfe, 0x00},	/* mask */

    /* 14 + 5 bits mask */

    {"PSLL", itPsll,		OP2|GG|MODRM|MMXRM|I8,0,
    				0x0f, 0x70, 0xf0,	/* opcode */
				0xff, 0xfc, 0xf8},	/* mask */

    {"PSRA", itPsra,		OP2|GG|MODRM|MMXRM|I8,0,
    				0x0f, 0x70, 0xe0,	/* opcode */
				0xff, 0xfc, 0xf8},	/* mask */

    {"PSRL", itPsrl,		OP2|GG|MODRM|MMXRM|I8,0,
    				0x0f, 0x70, 0xd0,	/* opcode */
				0xff, 0xfc, 0xf8},	/* mask */

    /* 14 bits mask */

    {"PADD", itPadd,		OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xfc, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PADDS", itPadds,		OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xec, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PADDUS", itPaddus,	OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xdc, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PCMPEQ", itPcmpeq,	OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0x74, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PCMPGT", itPcmpgt,	OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0x64, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PSLL", itPsll,		OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xf0, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PSRA", itPsra,		OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xe0, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PSRL", itPsrl,		OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xd0, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PSUB", itPsub,		OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xf8, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PSUBS", itPsubs,		OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xe8, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PSUBUS", itPsubus,	OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0xd8, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PUNPCKH", itPunpckh,	OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0x68, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},	/* mask */

    {"PUNPCKL", itPunpckl,	OP2|GG|MMXREG|MMXRM|MODRM,0,
    				0x0f, 0x60, 0x00,	/* opcode */
				0xff, 0xfc, 0x00},

    /* 13 bits mask */

    {"BSWAP", itBswap,       	OP1|MODRM,0,
    				0x0f, 0xc8, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVB", itFcmovb,	OP2|ST,0,
    				ESC|0x02, 0xc0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVBE", itFcmovbe,	OP2|ST,0,
    				ESC|0x02, 0xd0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVE", itFcmove,	OP2|ST,0,
    				ESC|0x02, 0xc8, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVU", itFcmovu,	OP2|ST,0,
    				ESC|0x02, 0xd8, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVNB", itFcmovnb,	OP2|ST,0,
    				ESC|0x03, 0xc0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVNBE", itFcmovnbe,	OP2|ST,0,
    				ESC|0x03, 0xd0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVNE", itFcmovne,	OP2|ST,0,
    				ESC|0x03, 0xc8, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCMOVNU", itFcmovnu,	OP2|ST,0,
    				ESC|0x03, 0xd8, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCOM", itFcomST,		OP2|ST,0,
    				ESC|0x00, 0xd0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCOMI", itFcomi,		OP2|ST,0,
    				ESC|0x03, 0xf0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FCOMP", itFcompST,	OP2|ST,0,
    				ESC|0x00, 0xd8, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FFREE", itFfree,		OP2|ST,0,
    				ESC|0x05, 0xc0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FLD", itFldST,		OP2|ST,0,
    				ESC|0x01, 0xc0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FST", itFstST,		OP2|ST,0,
    				ESC|0x05, 0xd0, 0x00,	/* opcode */
				0xff, 0xf8, 0x00},	/* mask */

    {"FSTP", itFstpST,		OP2|ST,0,