📄 interrupt_example.lst
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A51 MACRO ASSEMBLER INTERRUPT_EXAMPLE 05/26/2008 15:08:17 PAGE 1
MACRO ASSEMBLER A51 V7.09
OBJECT MODULE PLACED IN interrupt_example.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE interrupt_example.ASM SET(SMALL) DEBUG EP
LOC OBJ LINE SOURCE
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0000 14 ORG 0H ;LED: P3.4 Output: P3.5
0000 8023 15 JMP STR
0003 16 ORG 3H
0003 806D 17 JMP INTA ;SYS OFF LINE
0013 18 ORG 13H
0013 8060 19 JMP INTB ;SYS ON LINE
0023 20 ORG 23H
0023 8024 21 JMP RE
22
0025 75A895 23 STR: MOV IE,#10010101B ;set micro chip interrupt argument
0028 75B815 24 MOV IP,#00010101B
002B D288 25 SETB IT0
002D D28A 26 SETB IT1
002F 759850 27 MOV SCON,#01010000B
0032 758922 28 MOV TMOD,#00100010B
0035 758140 29 MOV SP,#40H
0038 758DFD 30 MOV TH1,#0FDH
003B D28E 31 SETB TR1
32
003D C298 33 START: CLR RI
003F C299 34 CLR TI
0041 C2B5 35 CLR P3.5 ;SYS OFF_LINE
0043 D2B4 36 SETB P3.4 ;LED INDICATE WORK
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0045 1163 38 LOOP1: CALL DELAY
0047 80FC 39 JMP LOOP1
40
0049 309903 41 RE: JNB TI,REC ;RS-232 interrupt
004C C299 42 CLR TI
004E 32 43 RETI
44
004F 109801 45 REC: JBC RI,RECE ;If receiving flag is ture than receive it
0052 32 46 RETI
47
0053 E599 48 RECE: MOV A,SBUF
0055 B44103 49 CJNE A,#41H,CHK1; IF RECEIVE "A" THAN SYS ON_LINE
0058 D2B5 50 SETB P3.5
005A 32 51 RETI
52
005B B44203 53 CHK1: CJNE A,#42H,FREEZE
005E C2B5 54 CLR P3.5 ; IF RECEIVE "B" THAN SYS OFF_LINE
0060 32 55 RETI
56
0061 E4 57 FREEZE: CLR A
0062 32 58 RETI
A51 MACRO ASSEMBLER INTERRUPT_EXAMPLE 05/26/2008 15:08:17 PAGE 2
59
0063 B2B4 60 DELAY: CPL P3.4 ;flash the PIN3.4 LED and do a little delay
0065 7804 61 MOV R0,#004H
0067 79FF 62 D1: MOV R1,#0FFH
0069 7AFF 63 D2: MOV R2,#0FFH
006B DAFE 64 D3: DJNZ R2,D3
006D D9FA 65 DJNZ R1,D2
006F D8F6 66 DJNZ R0,D1
0071 22 67 RET
68
0072 C2B5 69 INTA: CLR P3.5 ;interrupt INT0 set output PIN3.5 LOW
0074 32 70 RETI
71
0075 D2B5 72 INTB: SETB P3.5 ;interrupt INT1 set output PIN3.5 HIGH
0077 32 73 RETI
74
75 END
A51 MACRO ASSEMBLER INTERRUPT_EXAMPLE 05/26/2008 15:08:17 PAGE 3
SYMBOL TABLE LISTING
------ ----- -------
N A M E T Y P E V A L U E ATTRIBUTES
CHK1 . . . . . . . C ADDR 005BH A
D1 . . . . . . . . C ADDR 0067H A
D2 . . . . . . . . C ADDR 0069H A
D3 . . . . . . . . C ADDR 006BH A
DELAY. . . . . . . C ADDR 0063H A
FREEZE . . . . . . C ADDR 0061H A
IE . . . . . . . . D ADDR 00A8H A
INTA . . . . . . . C ADDR 0072H A
INTB . . . . . . . C ADDR 0075H A
IP . . . . . . . . D ADDR 00B8H A
IT0. . . . . . . . B ADDR 0088H.0 A
IT1. . . . . . . . B ADDR 0088H.2 A
LOOP1. . . . . . . C ADDR 0045H A
P3 . . . . . . . . D ADDR 00B0H A
RE . . . . . . . . C ADDR 0049H A
REC. . . . . . . . C ADDR 004FH A
RECE . . . . . . . C ADDR 0053H A
RI . . . . . . . . B ADDR 0098H.0 A
SBUF . . . . . . . D ADDR 0099H A
SCON . . . . . . . D ADDR 0098H A
SP . . . . . . . . D ADDR 0081H A
START. . . . . . . C ADDR 003DH A
STR. . . . . . . . C ADDR 0025H A
TH1. . . . . . . . D ADDR 008DH A
TI . . . . . . . . B ADDR 0098H.1 A
TMOD . . . . . . . D ADDR 0089H A
TR1. . . . . . . . B ADDR 0088H.6 A
REGISTER BANK(S) USED: 0
ASSEMBLY COMPLETE. 0 WARNING(S), 0 ERROR(S)
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