📄 bulkloop.c
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#pragma NOIV //注:#pragma NOIV 就是要屏蔽掉标准8051的中段,采用EZ-USB的自动向量
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h" // SYNCDELAY macro
extern BOOL GotSUD; // Received setup data flag
extern BOOL Sleep;
extern BOOL Rwuen;
extern BOOL Selfpwr;
BYTE Configuration; // Current configuration
BYTE AlternateSetting; // Alternate settings
#define VR_NAKALL_ON 0xD0
#define VR_NAKALL_OFF 0xD1
//================================================================
//注:和SLAVE FIFO 相关的寄存器
//IFCONFIG | PINFLAGAB | PINFLAGCD | FIFORESET | FIFOPINPOLAR | EPxCFG | EPxFIFOCFG
//EPxAUTOINLENH:L | EPxFIFOPFH:L : PORTACFG : INPKTEND : EPxFLAGIE : EPxFLAGIRQ
//EPxFIFOBCH:L : EPxFLAGS : EPxBUF
//================================================================
void TD_Init(void)
{
//=======================================================
//以下是和SLAVE FIFO 相关的寄存器,这里将其地址和大概的作用
//注释一下
//=======================================================
//IFCONFIG //_AT_ 0xE601; // 接口配置(端口,GPIF,SLAVE FIFO)
//PINFLAGSAB //_AT_ 0xE602; // 从属FIFO FLAGA FLAGB引脚配置
//PINFLAGSCD
//FIFORESET //_AT_ 0xE604; // FIFO复位
//FIFOPINPOLAR
//EP2CFG //_AT_ 0xE612; // 端点2配置
//EP4CFG
//EP6CFG
//EP8CFG
//EP2FIFOCFG //_AT_ 0xE618; // 端点2/SLAVE FIFO配置
//EP4FIFOCFG
//EP6FIFOCFG
//EP8FIFOCFG
//EP2AUTOINLENH //_AT_ 0xE620; // 端点2 AUTOIN包长度高位
//EP2AUTOINLENL
//EP4AUTOINLENH
//EP4AUTOINLENL
//EP6AUTOINLENH
//EP6AUTOINLENL
//EP8AUTOINLENH
//EP8AUTOINLENL
//EP2FIFOPFH //_AT_ 0xE630; // 端点2/SLAVE FIFO 可编程成级标志的高位(高速方式和全速方式)
//EP2FIFOPFL
//EP4FIFOPFH
//EP4FIFOPFL
//EP6FIFOPFH
//EP6FIFOPFL
//EP8FIFOPFH
//EP8FIFOPFL
//PORTACFG //_AT_ 0xE670; // I/O PORTA 交替配置
//INPKTEND //_AT_ 0xE648; // 强制IN包结束
//EP2FIFOIE //_AT_ 0xE650; // 端点2 SLAVE FIFO 标志中断使能(INT4)
//EP4FIFOIE
//EP6FIFOIE
//EP8FIFOIE
//EP2FIFOIRQ //_AT_ 0xE651; // 端点2 SLAVE FIFO 标志中断请求(INT4)
//EP4FIFOIRQ
//EP6FIFOIRQ
//EP8FIFOIRQ
//EP2FIFOFLAGS //_AT_ 0xE6A7; // 端点2的SLAVE FIFO 标志
//EP4FIFOFLAGS
//EP6FIFOFLAGS
//EP8FIFOFLAGS
//EP2FIFOBCH // 端点2 的 SLAVE FIFO 总字节计数高位
//EP2FIFOBCL
//EP4FIFOBCH
//EP4FIFOBCL
//EP6FIFOBCH
//EP6FIFOBCL
//EP8FIFOBCH
//EP8FIFOBCL
//EP2FIFOBUF //_AT_ 0xF000; // 512/1024字节端点2/SLAVR FIFO 缓冲
//EP4FIFOBUF
//EP6FIFOBUF
//EP8FIFOBUF
//=======================================================
//IFCONFIG //对端口、GPIF SLAVE FIFO接口模式进行配置
//PINFLAGSAB //配置SLAVE FIFO模式下的FLAGA和FLAGB引脚
//PINFLAGSCD //配置SLAVE FIFO模式下的FLAGC和FLAGD引脚
//FIFORESET //复位各个FIFO
//FIFOPINPOLAR //设置SLAVE FIFO接口的极性
//EPXCFG //对端点2、4、6、8进行配置
//EPXFIFOCFG //对端点2、4、6、8的SLAVE FIFO 进行配置
//EPXAUTOINLENH:L //端点2、4、6、8的AUTOIN包长度
//EPXFIFOPFH:L //端点2、4、6、8可变成标志位
//PORTACFG //端口A的替换配置
//INPKTEND //强制IN数据包结束
//EPXFIFOIE //对端点2、4、6、8进行中断使能
//EPXFIFOIRQ //端点2、4、6、8的中断请求
//EPXFIFOBCH:L //FIFO端点的计数
//EPXLAGS //端点2、4、6、8的标志
//EPXFIFOBUF //端点2、4、6、8的缓冲区
//=======================================================
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1);//设置CPU时钟频率为48M
IFCONFIG = 0XCB; //选择内部时钟频率为48M,FIFO/GPIF采用异步操作模式,SLAVE FIFO接口(外部主控制器)
SYNCDELAY;
REVCTL = 0X01; //版本号
SYNCDELAY;
EP2CFG = 0XA8; //使能端点2,端点方向为输出,块传输方式,端点大小512字节,端点为2重缓冲
SYNCDELAY;
FIFORESET = 0X80; //对从主机发送的数据进行握手
SYNCDELAY;
FIFORESET = 0X02; //复位FIFO
SYNCDELAY;
FIFORESET = 0X04; //复位FIFO
SYNCDELAY;
FIFORESET = 0X06; //复位FIFO
SYNCDELAY;
FIFORESET = 0X08; //复位FIFO
SYNCDELAY;
FIFORESET = 0X00; //保存操作
SYNCDELAY;
EP2FIFOCFG = 0x00;
SYNCDELAY;
EP2FIFOCFG = 0X11; //设置端点2为自动输出,选择总线数据宽度为16位
SYNCDELAY;
PINFLAGSAB = 0X00; //确定引脚FLAGA为EPX的PF标志,FLAGB为EPX的FF标志,FLAGC为EPX的EF标志
SYNCDELAY;
PINFLAGSCD = 0X00; //确定引脚FLAGA为EPX的PF标志,FLAGB为EPX的FF标志,FLAGC为EPX的EF标志
SYNCDELAY;
PORTACFG = 0X80; //设置IOPA7为CS引脚
SYNCDELAY;
FIFOPINPOLAR = 0X00; //所有引脚为低电平有效
SYNCDELAY;
EP2AUTOINLENH = 0X02; //端点2 AUTOIN包长度高字节
SYNCDELAY;
EP2AUTOINLENL = 0X00; //端点2 AUTOIN包长度高字节
SYNCDELAY;
EP2FIFOPFH = 0X80; //端点2/SLAVE FIFO 可编程成级标志的高位(高速方式和全速方式)
SYNCDELAY;
EP2FIFOPFL = 0X00; //端点2/SLAVE FIFO 可编程成级标志的高位(高速方式和全速方式)
SYNCDELAY;
OUTPKTEND =0X82; //启动OUT缓冲区
SYNCDELAY;
OUTPKTEND =0X82; //启动OUT缓冲区
SYNCDELAY;
//AUTOPTRSETUP |= 0x01; //使能自动指针
/*
CPUCS = 0x10;
IFCONFIG = 0xc3;
SYNCDELAY;
REVCTL = 0x01; //注意,我设成自动arm 端点buffer模式
SYNCDELAY;
EP2CFG = 0xA8;
SYNCDELAY;
EP4CFG = 0x20;
SYNCDELAY;
EP6CFG = 0x60;
SYNCDELAY;
EP8CFG = 0x60;
SYNCDELAY;
FIFORESET = 0x80;
SYNCDELAY;
FIFORESET = 0x02;
SYNCDELAY;
FIFORESET = 0x04;
SYNCDELAY;
FIFORESET = 0x06;
SYNCDELAY;
FIFORESET = 0x08;
SYNCDELAY;
FIFORESET = 0x00;
SYNCDELAY;
EP2FIFOCFG = 0x00;
SYNCDELAY;
EP2FIFOCFG = 0x11; //自动arm端点2FIFO
SYNCDELAY;
IFCONFIG |= 0x20;
*/
Rwuen = TRUE;
}
//================================================================
// 这个函数内部可以什么都不写,因为是采用了外部控制器直接读取
// FX2的FIFO端点的数据,而不是通过FX2CPU内部控制的。
//================================================================
void TD_Poll(void) // Called repeatedly while the device is idle
{
/*WORD i;
if(!(EP2468STAT & bmEP2FULL))
{
for( i = 0x0000; i < 0x200; i++ )
{
EP2FIFOBUF[i]=(BYTE)(0x22);
}
EP2BCH = 0x02;
SYNCDELAY;
EP2BCL = 0x00;
SYNCDELAY;
}
*/
/*
WORD i;
WORD count;
if(!(EP2468STAT & bmEP2EMPTY))
{
// check EP2 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
if(!(EP2468STAT & bmEP6FULL))
{
// check EP6 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
APTR1H = MSB( &EP2FIFOBUF );
APTR1L = LSB( &EP2FIFOBUF );
AUTOPTRH2 = MSB( &EP6FIFOBUF );
AUTOPTRL2 = LSB( &EP6FIFOBUF );
count = (EP2BCH << 8) + EP2BCL;
// loop EP2OUT buffer data to EP6IN
for( i = 0x0000; i < count; i++ )
{
// setup to transfer EP2OUT buffer to EP6IN buffer using AUTOPOINTER(s)
EXTAUTODAT2 = EXTAUTODAT1;
}
EP6BCH = EP2BCH;
SYNCDELAY;
EP6BCL = EP2BCL; // arm EP6IN
SYNCDELAY;
EP2BCL = 0x80; // re(arm) EP2OUT
}
}
if(!(EP2468STAT & bmEP4EMPTY))
{
// check EP4 EMPTY(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is empty
if(!(EP2468STAT & bmEP8FULL))
{
// check EP8 FULL(busy) bit in EP2468STAT (SFR), core set's this bit when FIFO is full
APTR1H = MSB( &EP4FIFOBUF );
APTR1L = LSB( &EP4FIFOBUF );
AUTOPTRH2 = MSB( &EP8FIFOBUF );
AUTOPTRL2 = LSB( &EP8FIFOBUF );
count = (EP4BCH << 8) + EP4BCL;
// loop EP4OUT buffer data to EP8IN
for( i = 0x0000; i < count; i++ )
{
// setup to transfer EP4OUT buffer to EP8IN buffer using AUTOPOINTER(s)
EXTAUTODAT2 = EXTAUTODAT1;
}
EP8BCH = EP4BCH;
SYNCDELAY;
EP8BCL = EP4BCL; // arm EP8IN
SYNCDELAY;
EP4BCL = 0x80; // re(arm) EP4OUT
}
}
*/
}
BOOL TD_Suspend(void) // Called before the device goes into suspend mode
{
return(TRUE);
}
BOOL TD_Resume(void) // Called after the device resumes
{
return(TRUE);
}
//================================================================
// Device Request hooks
// The following hooks are called by the end point 0 device request parser.
//================================================================
BOOL DR_GetDescriptor(void)
{
return(TRUE);
}
BOOL DR_SetConfiguration(void) // Called when a Set Configuration command is received
{
Configuration = SETUPDAT[2];
return(TRUE); // Handled by user code
}
BOOL DR_GetConfiguration(void) // Called when a Get Configuration command is received
{
EP0BUF[0] = Configuration;
EP0BCH = 0;
EP0BCL = 1;
return(TRUE); // Handled by user code
}
BOOL DR_SetInterface(void) // Called when a Set Interface command is received
{
AlternateSetting = SETUPDAT[2];
return(TRUE); // Handled by user code
}
BOOL DR_GetInterface(void) // Called when a Set Interface command is received
{
EP0BUF[0] = AlternateSetting;
EP0BCH = 0;
EP0BCL = 1;
return(TRUE); // Handled by user code
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