dm9000.c

硬件设计LPC2138+DM9000AE

/* --- includes ----------------------------------------------------------- */
#include <string.h>
//#include <interrup.h>
#include <stdlib.h>
//#include <semaphor.h>
//#include <debug.h>
//#include <task.h>
//#include "stddefs.h"
//#include <move2d.h>

extern int Reset_Params_PIO2;
extern int PIO_BIT_4;
extern int STPIO_BIT_OUTPUT;
extern int NO_ERROR;
extern int BACK_PRESSURE_THRESHOLD;
extern int FLOWCONTROL_THRESHOLD;
extern int TX_RX_FLOWCONTROL;
extern int RXCTL_DEFAULT;
extern int IMR_DEFAULT;
extern int NG_IFF_RUNNING;
extern int TASK_HARDWARE_RECEIVE_DATA_PRIORITY;
extern int DM9000_PHY;
extern int EEPROM_PHY_ADR_REG;
extern int EEPROM_PHY_CTL_REG;
extern int EEPROM_READ_COMMAND;
extern int EE_PHY_L_REG;
extern int EE_PHY_H_REG;
extern int PAB0_REG;
extern int PAB1_REG;
extern int PAB2_REG;
extern int PAB3_REG;
extern int PAB4_REG;
extern int PAB5_REG;
extern int IMR_DIS_ALL;
extern int tx_counter;
extern int DM9000_PKT_RDY;
extern int reg_save;
extern int int_status;
extern int DM9000_TX_INTR;
extern int tx_status;
extern int DM9000_RX_INTR;
unsigned char DM9000_WORD_MODE;
unsigned char DM9000_BYTE_MODE;

#define TRUE			1
#define FALSE			0
#define DM9000_BYTE_MODE    2;
#define DM9000_WORD_MODE    0;

typedef unsigned int task_t;
typedef unsigned char boolean;
typedef unsigned int U32;
typedef unsigned int PIO_Handle_t;
typedef unsigned char U8;
typedef unsigned short U16;
typedef unsigned int ErrorCode_t;
typedef unsigned int task_flags_t;
typedef struct
{int ReservedBits;
 int BitConfigure[6];
}STPIO_OpenParams_t;
typedef struct 
{int semaphore_count;
}semaphore_t;
struct netif 
{int flags;
 void( * set_multicalist)();
 struct dev_mc_list * mc_list;
 int mc_count;
 int hwaddr[6];
};
struct dev_mc_list
{void * dmi_addr;
 struct dev_mc_list * next;
};
struct pbuf
{int tot_len;
 struct pbuf * next;
 struct pbuf * payload;
 int len;
};

#define WriteRegDev32(Address_p, Value) (*((U32 *) (Address_p)) = (U32) (Value))
#define ReadRegDev32(Address_p) *((U32 *) (Address_p))


/*--------- defines-------------------------------------------------------- */
#define AUTO_RELEASE  	         		/* auto release transmitted packet*/
#define MANUAL
#define MOVE2D 	
#define TASK_MODE	
/*#define LOOP_BACK*/

#ifdef TASK_MODE
static task_t * Task;
//static boolean task_run;     
//#define task_run TRUE;
static boolean task_run=TRUE;           /*ԭΪ static boolean task_run=TRUE;*/
static semaphore_t * CopyGo;
static U32 rows_num; 	
#endif

#ifdef MUTEX_RD
static semaphore_t * mutex_wr_dm9k;
#endif

static  PIO_Handle_t Reset_Handle;
/*--------- globales variables ---------------------------------------------*/
/*static NGbuf * bufpstatic;  	 the buffer to be send on the IRQ handler*/
static U32 pktsize;				/* to save the packet size for stat*/
/*Spenser-----------------------------------------*/
U32 iobase = 0x60000000;
U32 iodata = 0x60000008;
static U8 mac_addr[6];
static U8 tx_pkt_cnt;
static U8 dm9000_iomode;
static int queue_pkt_len;
static U8 device_wait_reset;

 U32 IO_base=0x60000000;
 U16 ETHER_Address_Shift;
 U16 ETHER_DM9000_Interrupt;
 U16 ETHER_Interrupt_Level;
 U16 ETHER_USE16bit;
 U8  ETHER_TRANS_Len;


 /*Interrupt Pin-----------------------------------------*/
#define DAVCOMInterrupt 48 

#define ILCBaseAddress				0x20111000
#define EX0EnableRegAdr				ILCBaseAddress + 0x404
#define EXOInputREGAdr 				ILCBaseAddress + 0x084 

#define InterconnectBaseAddress 		0x20010000
#define CONFIG_CONTROL_B_RegAdr	InterconnectBaseAddress + 0x04

#define ILC_STATUS_2_RegAdr 			ILCBaseAddress + 0x204
#define ILC_CLEAR_STATUS_2_RegAdr 		ILCBaseAddress + 0x284

#define ILC_PRIORITY_DAVCOMInterrupt_RegAdr	ILCBaseAddress + 0x800 + 	DAVCOMInterrupt* 8
#define ILC_Mode_DAVCOMInterrupt_RegAdr		ILCBaseAddress + 0x800 + 	DAVCOMInterrupt* 8 + 4
#define ILC_WAKEUP_ACTIVE_LEVEL_RegAdr		ILCBaseAddress + 0x684



#if PROCESS_RD_ANOTHER_TASK
#else
extern void ethernetif_input( struct netif *netif,  struct pbuf *p);
#endif


unsigned long CrcTable[256] = {
	0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL,
	0x076DC419L, 0x706AF48FL, 0xE963A535L, 0x9E6495A3L,
	0x0EDB8832L, 0x79DCB8A4L, 0xE0D5E91EL, 0x97D2D988L,
	0x09B64C2BL, 0x7EB17CBDL, 0xE7B82D07L, 0x90BF1D91L,
	0x1DB71064L, 0x6AB020F2L, 0xF3B97148L, 0x84BE41DEL,
	0x1ADAD47DL, 0x6DDDE4EBL, 0xF4D4B551L, 0x83D385C7L,
	0x136C9856L, 0x646BA8C0L, 0xFD62F97AL, 0x8A65C9ECL,
	0x14015C4FL, 0x63066CD9L, 0xFA0F3D63L, 0x8D080DF5L,
	0x3B6E20C8L, 0x4C69105EL, 0xD56041E4L, 0xA2677172L,
	0x3C03E4D1L, 0x4B04D447L, 0xD20D85FDL, 0xA50AB56BL,
	0x35B5A8FAL, 0x42B2986CL, 0xDBBBC9D6L, 0xACBCF940L,
	0x32D86CE3L, 0x45DF5C75L, 0xDCD60DCFL, 0xABD13D59L,
	0x26D930ACL, 0x51DE003AL, 0xC8D75180L, 0xBFD06116L,
	0x21B4F4B5L, 0x56B3C423L, 0xCFBA9599L, 0xB8BDA50FL,
	0x2802B89EL, 0x5F058808L, 0xC60CD9B2L, 0xB10BE924L,
	0x2F6F7C87L, 0x58684C11L, 0xC1611DABL, 0xB6662D3DL,
	0x76DC4190L, 0x01DB7106L, 0x98D220BCL, 0xEFD5102AL,
	0x71B18589L, 0x06B6B51FL, 0x9FBFE4A5L, 0xE8B8D433L,
	0x7807C9A2L, 0x0F00F934L, 0x9609A88EL, 0xE10E9818L,
	0x7F6A0DBBL, 0x086D3D2DL, 0x91646C97L, 0xE6635C01L,
	0x6B6B51F4L, 0x1C6C6162L, 0x856530D8L, 0xF262004EL,
	0x6C0695EDL, 0x1B01A57BL, 0x8208F4C1L, 0xF50FC457L,
	0x65B0D9C6L, 0x12B7E950L, 0x8BBEB8EAL, 0xFCB9887CL,
	0x62DD1DDFL, 0x15DA2D49L, 0x8CD37CF3L, 0xFBD44C65L,
	0x4DB26158L, 0x3AB551CEL, 0xA3BC0074L, 0xD4BB30E2L,
	0x4ADFA541L, 0x3DD895D7L, 0xA4D1C46DL, 0xD3D6F4FBL,
	0x4369E96AL, 0x346ED9FCL, 0xAD678846L, 0xDA60B8D0L,
	0x44042D73L, 0x33031DE5L, 0xAA0A4C5FL, 0xDD0D7CC9L,
	0x5005713CL, 0x270241AAL, 0xBE0B1010L, 0xC90C2086L,
	0x5768B525L, 0x206F85B3L, 0xB966D409L, 0xCE61E49FL,
	0x5EDEF90EL, 0x29D9C998L, 0xB0D09822L, 0xC7D7A8B4L,
	0x59B33D17L, 0x2EB40D81L, 0xB7BD5C3BL, 0xC0BA6CADL,
	0xEDB88320L, 0x9ABFB3B6L, 0x03B6E20CL, 0x74B1D29AL,
	0xEAD54739L, 0x9DD277AFL, 0x04DB2615L, 0x73DC1683L,
	0xE3630B12L, 0x94643B84L, 0x0D6D6A3EL, 0x7A6A5AA8L,
	0xE40ECF0BL, 0x9309FF9DL, 0x0A00AE27L, 0x7D079EB1L,
	0xF00F9344L, 0x8708A3D2L, 0x1E01F268L, 0x6906C2FEL,
	0xF762575DL, 0x806567CBL, 0x196C3671L, 0x6E6B06E7L,
	0xFED41B76L, 0x89D32BE0L, 0x10DA7A5AL, 0x67DD4ACCL,
	0xF9B9DF6FL, 0x8EBEEFF9L, 0x17B7BE43L, 0x60B08ED5L,
	0xD6D6A3E8L, 0xA1D1937EL, 0x38D8C2C4L, 0x4FDFF252L,
	0xD1BB67F1L, 0xA6BC5767L, 0x3FB506DDL, 0x48B2364BL,
	0xD80D2BDAL, 0xAF0A1B4CL, 0x36034AF6L, 0x41047A60L,
	0xDF60EFC3L, 0xA867DF55L, 0x316E8EEFL, 0x4669BE79L,
	0xCB61B38CL, 0xBC66831AL, 0x256FD2A0L, 0x5268E236L,
	0xCC0C7795L, 0xBB0B4703L, 0x220216B9L, 0x5505262FL,
	0xC5BA3BBEL, 0xB2BD0B28L, 0x2BB45A92L, 0x5CB36A04L,
	0xC2D7FFA7L, 0xB5D0CF31L, 0x2CD99E8BL, 0x5BDEAE1DL,
	0x9B64C2B0L, 0xEC63F226L, 0x756AA39CL, 0x026D930AL,
	0x9C0906A9L, 0xEB0E363FL, 0x72076785L, 0x05005713L,
	0x95BF4A82L, 0xE2B87A14L, 0x7BB12BAEL, 0x0CB61B38L,
	0x92D28E9BL, 0xE5D5BE0DL, 0x7CDCEFB7L, 0x0BDBDF21L,
	0x86D3D2D4L, 0xF1D4E242L, 0x68DDB3F8L, 0x1FDA836EL,
	0x81BE16CDL, 0xF6B9265BL, 0x6FB077E1L, 0x18B74777L,
	0x88085AE6L, 0xFF0F6A70L, 0x66063BCAL, 0x11010B5CL,
	0x8F659EFFL, 0xF862AE69L, 0x616BFFD3L, 0x166CCF45L,
	0xA00AE278L, 0xD70DD2EEL, 0x4E048354L, 0x3903B3C2L,
	0xA7672661L, 0xD06016F7L, 0x4969474DL, 0x3E6E77DBL,
	0xAED16A4AL, 0xD9D65ADCL, 0x40DF0B66L, 0x37D83BF0L,
	0xA9BCAE53L, 0xDEBB9EC5L, 0x47B2CF7FL, 0x30B5FFE9L,
	0xBDBDF21CL, 0xCABAC28AL, 0x53B39330L, 0x24B4A3A6L,
	0xBAD03605L, 0xCDD70693L, 0x54DE5729L, 0x23D967BFL,
	0xB3667A2EL, 0xC4614AB8L, 0x5D681B02L, 0x2A6F2B94L,
	0xB40BBE37L, 0xC30C8EA1L, 0x5A05DF1BL, 0x2D02EF8DL
};


/*-------- prototypes of locals functions ----------------------------------*/
static void InterruptHandler(struct netif *netp);                                  
/*		static ErrorCode_t ETHER_phy_configure(void);                                     */
int ETHER_Open(struct netif *netp);
static void ETHER_setMulticast(struct netif *netp);                                      
static U32 ETHER_MacLoad(struct netif *netp);     	
#ifdef TASK_MODE
			static void ETHER_CopyData(struct netif *netp);                                       
#endif

ErrorCode_t set_PHY_mode(void);
static void dmfe_packet_receive(struct netif *netp);
static void dm9000_hash_table(struct netif *);/*added by anlow, 06-01-09*/



/*Spenser------------------------------------------------------*/
static ErrorCode_t init_dm9000(void);
static void phy_write(U8 reg, U16 value);
static U16 read_srom_word(int offset);
/*static unsigned long cal_CRC(unsigned char * Data, unsigned int Len, U8 flag);	*/
/*---------- FUNCTIONS IN THIS DERIVER -------------------------------------*/

void outb( U8 bRegvsData, U32 b4Addr)
{
	*((U8 *) b4Addr) = bRegvsData;
}

U8 inb( U32 b4Addr )
{
	U8 bRtn;
	bRtn = *(U8 *)b4Addr;
	return ( bRtn );
}

U16 inw ( U32 b4Addr )
{
	U16 bRtn;
	bRtn = *(U16 *)b4Addr;
	return ( bRtn );
}
	
U32 inl( U32 b4Addr )
{
	U32 bRtn;
	bRtn = *(U32 *)b4Addr;
	return ( bRtn );
}

U8 ior(U32 io_addr,U8 reg)
{
	outb(reg, io_addr);
	return ((U8) inb(io_addr+8));
}

void iow(U32 io_addr, U8 reg, U8 RegData)
{
	outb(reg, io_addr);
	outb(RegData, (io_addr+8));
}

void outw( U16 b2RegvsData, U32 b4Addr)
{
	*((U16 *) b4Addr) = b2RegvsData;
}

void outl(U32 b2RegvsData, U32 b4Addr)
{
	*((U32 *) b4Addr) = b2RegvsData;
}


static void Setup_Reset_GPIO(void)
{
	ErrorCode_t error;
	STPIO_OpenParams_t Reset_Params_PIO2;
  	memset(&Reset_Params_PIO2,0x00,sizeof(STPIO_OpenParams_t));
#if RPIO26	/*RST: PIO2.6*/	
	Reset_Params_PIO2.ReservedBits=PIO_BIT_6;
	Reset_Params_PIO2.BitConfigure[6] = STPIO_BIT_OUTPUT;
	error = STPIO_Open("PIO2", &Reset_Params_PIO2, &Reset_Handle) ;
#else			/*RST: PIO1.4*/	
	Reset_Params_PIO2.ReservedBits=PIO_BIT_4;
	Reset_Params_PIO2.BitConfigure[4] = STPIO_BIT_OUTPUT;
	error = STPIO_Open("PIO1", &Reset_Params_PIO2, &Reset_Handle) ;
#endif

	if ( error != NO_ERROR )
	{
	debugmessage("Error of init Setup_Reset_GPIO\n");
		return ;
	}
}

static void set_pio_high(void)
{
#if RPIO26	/*RST: PIO2.6*/	
	STPIO_Set(Reset_Handle,PIO_BIT_6);
#else			/*RST: PIO1.4*/	
	STPIO_Set(Reset_Handle,PIO_BIT_4);
#endif
}


static void clear_pio_low(void)
{
#if RPIO26	/*RST: PIO2.6*/
	STPIO_Clear(Reset_Handle,PIO_BIT_6);
#else			/*RST: PIO1.4*/	
	STPIO_Clear(Reset_Handle,PIO_BIT_4);
#endif


}
static void hardware_reset(void)
{
		Setup_Reset_GPIO();
		clear_pio_low();
		task_delay(GetClocksPerSecond());
		set_pio_high();		
		task_delay(GetClocksPerSecond());			
}


static void software_reset(void)
{
	/*interrupt_lock();		*/
	interrupt_disable_number(ETHER_DM9000_Interrupt);

	CopyGo->semaphore_count = 0;
	STSYS_WriteRegDev32(ILC_CLEAR_STATUS_2_RegAdr, 0x00010000);	/*clear interrupt status	*/

	
		/*dmfe_tx_done(0);		*/
		/*iow(db, 0xff, 0x83);		*/
		
		iow(iobase, 0xff, 0x80);	/* Stop INT request */
		iow(iobase, 0xfe, 0x3f);
		iow(iobase, 0x05, 0x00);	/* Stop Device */
	iow(iobase, 0, 3);
	task_delay(200);		/* wait 20us at least for software reset ok */
	iow(iobase, 0, 3);		/* NCR (reg_00h) bit[0] RST=1 & Loopback=1, reset on. Added by SPenser */
	task_delay(200);		/* wait 20us at least for software reset ok */


/*	iow(iobase, 0x00, 0x01);
	task_delay(GetClocksPerSecond()/10000);	*/
	
	//Configure PHY
	set_PHY_mode();
	
	/* Program operating register */
	iow(iobase, 0x00, 0);
	iow(iobase, 0x02, 0);		/* TX Polling clear */
	iow(iobase, 0x2f, 0);		/* Special Mode */
	iow(iobase, 0x01, 0x2c);	/* clear TX status */
	iow(iobase, 0xfe, 0x0f); 	/* Clear interrupt status */
	iow(iobase, 0x08, BACK_PRESSURE_THRESHOLD);
	iow(iobase, 0x09, FLOWCONTROL_THRESHOLD);	/* Flow control: High/Low water */
	iow(iobase, 0x0a, TX_RX_FLOWCONTROL);	/* flow control */
		
	/* Initial Global variable */
	tx_pkt_cnt = 0;

	/* Activate DM9000 */
	iow(iobase, 0x5, (RXCTL_DEFAULT | 1));	/* RX enable */

	/* enables IRQs */	
	iow(iobase, 0xFF, IMR_DEFAULT); 	/* Enable TX/RX interrupt mask */
	/*interrupt_unlock();	*/
	interrupt_enable_number(ETHER_DM9000_Interrupt);

}


/*===========================================================================
	Name 			:  STETEHR_Open
	Description : 	Open and initialise the card
						Set up everything, reset the card, etc ...						
	Return 		:  0 on success, 1 if an error occur.
  ==========================================================================*/
int ETHER_Open(struct netif *netp)
{
	static U32 err;
	U32 RegValue;
	
	//hardware_reset();					

	/*is interface already running?*/
	if((netp->flags)&NG_IFF_RUNNING)
	{
		return(1);
	}		
#ifdef TASK_MODE	
	CopyGo=(semaphore_t*)semaphore_create_fifo(0);	
	Task=(unsigned int *)task_create(( void (*) (void*))ETHER_CopyData,(void *)netp,8192, TASK_HARDWARE_RECEIVE_DATA_PRIORITY, "Copy data from chip", (task_flags_t)0); /* FC: added casting (task_flags_t) in the last parameter*/ 	
#endif	

#ifdef MUTEX_RD
	mutex_wr_dm9k =semaphore_create_fifo(1);	 //mutex semaphore for writing and reading of dm9000
#endif
	
	/*set the NGifnet flags*/
	/*netp->flags|=NG_IFF_RUNNING|NG_IFF_UP;		*/
	netp->flags|=NG_IFF_RUNNING;