ami4.txt

经典的BIOS端口开发代码

             Going to findout amount of memory below 1M memory.

  49         Amount of memory below 1M found and verified.	
             Going to findout amount of memory above 1M memory.

  4B         Amount of memory above 1M found and verified.
             Check for soft reset and going to clear memory below 1M for
             soft reset. (If power on, go to check point# 4Eh).

  4C         Memory below 1M cleared.       (SOFT RESET)
             Going to clear memory above 1M.

  4D         Memory above 1M cleared.       (SOFT RESET)
             Going to save the memory size. (Goto check point# 52h).

  4E         Memory test started.       (NOT SOFT RESET)
             About to display the first 64k memory size.

  4F         Memory size display started. This will be updated during
             memory test. Going for sequential and random memory test.

  50         Memory testing/initilisation below 1M complete.
             Going to adjust displayed memory size for relocation/ shadow.

  51         Memory size display adjusted due to relocation/ shadow.
             Memory test above 1M to follow.

  52         Memory testing/initialisation above 1M complete.
             Going to save memory size information.

  53         Memory size information is saved. CPU registers are saved.
             Going to enter in real mode.

  54         Shutdown successfull, CPU in real mode. Going to disable
             gate A20 line.

  57         A20 address line disable successful.
             Going to adjust memory size depending on relocation/shadow.

  58         Memory size adjusted for relocation/shadow.
                Going to clear Hit <DEL> message.

  59         Hit <DEL> message cleared. <WAIT...> message displayed.
             About to start DMA and interrupt controller test.

  60         DMA page register test passed.
             About to go for DMA #1 base register test.

  62         DMA #1 base register test passed.
             About to go for DMA #2 base register test.

  65         DMA #2 base register test passed.
             About to program DMA unit 1 and 2.

  66         DMA unit 1 and 2 programming over.
             About to initialize 8259 interrupt controller.

  67         8259 initialization over.
             About to start keyboard test.

  7F         Extended NMI sources enabling is in progress.         

  *************************************************************************
  **                     EISA BIOS CHECKPOINTS                           **
  **       The EISA BIOS checkpoints applies for EISA BIOS only          **
  *************************************************************************
  F4         Extended NMI sources enabling is in progress.
  *************************************************************************

  80         Keyboard test started. clearing output buffer, checking
             for stuck key, About to issue keyboard reset command.

  81         Keyboard reset error/stuck key found. About to
             issue keyboard controller interface test command.

  82         Keyboard controller interface test over.
             About to write command byte and init circular buffer.

  83         Command byte written, Global data init done.
             About to check for lock-key.

  84         Lock-key checking over.
             About to check for memory size mismatch with cmos.

  85         Memory size check done. About to display soft error
             and check for password or bypass setup.

  86         Password checked.
             About to do pogramming before setup.

  87         Programming before setup complete.
             Going to uncompress SETUP code and execute cmos setup.

  88         Returned from cmos setup program and screen is cleared.
             About to do programming after setup.

  89         Programming after setup complete.
             Going to display power on screen message.

  8B         First screen message displayed. <WAIT...> message displayed.
             About to do Main and Video BIOS shadow.

  8C         Main and Video BIOS shadow successful.
             Setup options programming after cmos setup about to start.

  8D         Setup options are programmed, mouse check and init
             to be done next. 

  8E         Mouse check and initialisation complete. 
             Going for hard disk controller reset.

  8F         Hard disk controller reset done. Floppy setup to be done next.

  91         Floppy setup complete. Hard disk setup to be done next.

  94         Hard disk setup complete.
             Going to set base and extended memory size.

  95         Memory size adjusted due to mouse support, hdisk type-47.
             Init of different BUSes optional ROMs from C800 to start.
             (Please see Appendix-I for details of different BUSes).

  96         Memory size adjusted due to mouse support, hdisk type-47.
             Going to do any init before C800h optional ROM control

  97         Any init before C800h optional ROM control is over.
             Optional ROM check and control will be done next.

  98         Optional ROM control is done. About to give control to do
             any required procesing after optional ROM returns control.

  99         Any initialization required after optional ROM test over.
             Going to setup timer data area and printer base address.

  9A         Return after setting timer and printer base address.
             Going to set the RS-232 base address.

  9B         Returned after RS-232 base address.
             Going to do any initialization before Co-processor test.

  9C         Required initialization before co-processor is over.
             Going to initialize the coprocessor next.
 
  9D         Coprocesor initialized.
             Going to do any initialization after Co-processor test.

  9E         Initialization after co-processor test is complete.
             Going to check extd keyboard, keyboard ID and num-lock.

  9F         Extended keyboard check is done, ID flag set. Num-lock on/off.
             Keyboard ID command to be issued.

  A0         Keyboard ID command issued.
             Keyboard ID flag to be reset.

  A1         Keyboard ID flag reset.
             Cache memory test to follow.

  A2         Cache memory test over.
             Going to display any soft errors.

  A3         Soft error display complete.
             Going to set the keyboard typematic rate.

  A4         Keyboard typematic rate set.
             Going to program memory wait states.

  A5         Memory wait states programming over.
             Going to clear the screen and enable parity/NMI.

  A7         NMI and parity enabled. Going to do any initialization
             required before giving control to optional ROM at E000h.

  A8         Initialization before E000h ROM control over.
             E000h ROM to get control next.

  A9         Returned from E000h ROM control. Going to do any
             initialization required after E000h optional ROM control.

  AA         Initialization after E000h optional ROM control is over.
             Going to display the system configuration.

  B0         System configuration is displayed.
             Going to uncompress SETUP code for hot-key setup.

  B1         Uncompressing of SETUP code is complete.
             Going to copy any code to specific area.

  00         Copying of code to specific area done.
             Going to give control to INT 19h boot loader.

**************************************************************************
**           APPENDIX-I                                                 **
**************************************************************************

The system BIOS gives control to the different BUSes at following 
checkpoints to do various tasks on the different BUSes.

POSTcode    TEST DESCRIPTION

  2A         Different BUSes init (system, static, output devices) to
             start if present.

  38         Different BUSes init (input, IPL, general devices) to 
             startif present.

  39         Display different BUSes initialisation error messages.

  95         Init of different BUSes optional ROMs from C800 to start.

While control is inside the different BUS routines, additional checkpoints
are output to port 80h as WORD to identify the routines under execution.
These are WORD checkpoints, the LOW BYTE of checkpoint is the system BIOS
checkpoint from where the control is passed to the different BUS routines 
and the HIGH BYTE of checkpoint is the indication of which routine is being
executed in different BUSes. The details of HIGH BYTE of these checkpoints
are as follows:

HIGH BYTE       XY

...where the upper nibble 'X' indicates the function# is being executed. 
'X' can be from 0 to 7:

                0 = func#0, disable all devices on the BUS concerned.
                1 = func#1, static  devices init on the BUS concerned.
                2 = func#2, output  device init on the BUS concerned.
                3 = func#3, input   device init on the BUS concerned.
                4 = func#4, IPL     device init on the BUS concerned.
                5 = func#5, general device init on the BUS concerned.
                6 = func#6, error reporting for the BUS concerned.
                7 = func#7, add-on ROM init for all BUSes.

...where the lower nibble 'Y' indicates the BUS on which the different
routines are being executed. 'Y' can be from 0 to 5:

                0 = Generic DIM (Device Initialization Manager).
                1 = On-board System devices.
                2 = ISA devices.
                3 = EISA devices.
                4 = ISA PnP devices.
                5 = PCI devices.