initfunc.s

sansumg s3c2443 bootload 的源码

			    MACRO
     			 MOV_PC_LR
     				mov pc,lr
   			    MEND

				GET		Option.inc
				GET		2443addr.inc


				EXPORT  WdDisable
				EXPORT  IntDisable

				;;;EXPORT  PortInit
				EXPORT  Delay
				EXPORT  ClearSdram
				;;;EXPORT  ZeroInit
				EXPORT  SetLockTime
				EXPORT  SetClkDiv
				EXPORT  SetPLL
				EXPORT 	GetHeapStart
				EXPORT	SuspendWakeUp
				
		
				IMPORT  |Image$$RO$$Limit|
				IMPORT  |Image$$RW$$Base|
				IMPORT  |Image$$ZI$$Base|	
				IMPORT  |Image$$ZI$$Limit|
				IMPORT  |Image$$RW$$Limit|							


				AREA	|C$$code|, CODE, READONLY


Delay			PROC
9   			subs    r0, r0, #1
    			bne     %B9

				MOV_PC_LR

				ENDP

			
GetHeapStart	PROC

				ldr 	r0,=|Image$$RW$$Limit|
				add 	r0,r0,#1				
				MOV_PC_LR

				ENDP
			
SuspendWakeUp	PROC

				ldr		r1, =RSTCON
				ldr		r0, [r1]
				str		r0, [r1]

				ldr	pc, =0x30000000								
				
				MOV_PC_LR
				
				EXPORT  SWReset;xyin0301 WDReset
WDReset			
SWReset;xyin0301
			cmp     r4,#0x99
        		beq     LDRPC  
   
        		ldr     r1,=0x30900000
        		ldr     r0,[r1]
        		ldr     r3,=0x89afbecd
        		cmp     r0,r3
        		beq     IBOOT_RESET
	       		;xyin0301 [
		        ldr	r3,=0x99afbecd;iboot by usb
			cmp	r0,r3
			beq	IBOOT_RESETUSB
			ldr	r3,=0x79acbdfe;after iboot , load image
			cmp	r0,r3
			beq	IBOOTO_RESETC
        		;xyin0301 ]
LDRPC      
				ldr	pc, =0x30000000
				b	.

				LTORG

	;xyin0301 [
IBOOT_RESETUSB
	ldr	r1,=0x00000ff0
	ldr	r0,=0xdb ;usb iboot flag
	str	r0,[r1]
	b	IBOOTO_RESETC
	;xyin0301 ]


				;Iboot_fax
IBOOT_RESET
        		ldr     r1,=0x00000ff0
        		ldr     r0,=0xca ;sd iboot flag
        		str     r0,[r1]
        ;xyin0301 [
IBOOTO_RESETC        
	ldr     r0,=0;
	ldr	r1,=(0x30900000)
	str     r0,[r1]
	;xyin0301 ]

				MOV_PC_LR

				ENDP

WdDisable		PROC
				
				ldr		r0,=WTCON			
				mov		r1,#0			;;;Disable WatchDog.
				str		r1,[r0]
				
				MOV_PC_LR

				ENDP

IntDisable		PROC
				
				ldr		r0,=INTMSK
				ldr		r1,=0xffffffff  ;all interrupt disable
				str		r1,[r0]

				ldr		r0,=INTSUBMSK
				str		r1,[r0]

        		ldr     r0, =INTMOD ;INTMOD
        		mov 	r1, #0x0             ; set all interrupt as IRQ (not FIQ)
        		str     r1, [r0]
				MOV_PC_LR

				ENDP
				
SetClkDiv		PROC

				ldr		r0,=CLKDIV0			;	Set Clock Divider
				ldr		r1,[r0]
				bic		r1,r1,#0x37		; clear HCLKDIV, PREDIV, PCLKDIV
				bic		r1,r1,#(0xf<<9) ; clear ARMCLKDIV
				ldr		r2,=((Startup_ARMCLKdiv<<9)|(Startup_PREdiv<<4)|(Startup_PCLKdiv<<2)|(Startup_HCLKdiv)) 
				orr		r1,r1,r2
				str		r1,[r0]	

				;;;test
				;;ldr		r0,=CLKDIV1			;	Set Clock Divider
				;;mov 	r1, #0x0			;;; Set All 1:1
				;;str		r1,[r0]	

				MOV_PC_LR

				ENDP

SetPLL			PROC

				ldr		r0,=MPLLCON			;	Set MPLL on
				ldr		r1,=((0<<24)|(Startup_Mdiv<<16)|(Startup_Pdiv<<8)|(Startup_Sdiv))
				str		r1,[r0]			

  				;;;;test
  				ldr		r0,=EPLLCON			;	Set EPLL
				ldr		r1,=((0<<24)+(Startup_EMdiv<<16)+(Startup_EPdiv<<8)+(Startup_ESdiv))
				str		r1,[r0]			


				ldr		r0,=CLKSRC			;	Select MPLL clock out for SYSCLK
				ldr		r1,[r0]
				;;;;test
				;;;;orr		r1,r1,#0x10
				orr		r1,r1,#0x50
				
				str		r1,[r0]		

				MOV_PC_LR

				ENDP

SetLockTime		PROC

				ldr		r0,=LOCKCON0		;	Set lock time of MPLL. added by junon
				ldr		r1,=0xffff			;	Fin = 12MHz - 0x800, 16.9844MHz - 0xA00
				str		r1,[r0]				

				ldr		r0,=LOCKCON1		;	Set lock time of EPLL. added by changes
				str		r1,[r0]	
				
				MOV_PC_LR

				ENDP
	

;;;ZeroInit		PROC
;;;
;;;				;Copy and paste RW data/zero initialized data
;;;				ldr		r0, =|Image$$RO$$Limit| ; Get pointer to ROM data
;;				ldr		r1, =|Image$$RW$$Base|  ; and RAM copy
;;				ldr		r3, =|Image$$ZI$$Base|
	
;;				;Zero init base => top of initialised data
;;				cmp		r0, r1      ; Check that they are different
;;				beq		%F2
;;1       
;;				cmp		r1, r3      ; Copy init data
;;				ldrcc	r2, [r0], #4    ;--> LDRCC r2, [r0] + ADD r0, r0, #4
;;				strcc	r2, [r1], #4    ;--> STRCC r2, [r1] + ADD r1, r1, #4
;;				bcc		%B1
;;2       
;;				ldr		r1, =|Image$$ZI$$Limit| ; Top of zero init segment
;;				mov		r2, #0
;;3       
;;				cmp		r3, r1      ; Zero init
;;				strcc	r2, [r3], #4
;;				bcc		%B3
;;
;;				MOV_PC_LR

				ENDP
			

ClearSdram		PROC

				mov 	r1,	#0
				mov 	r2,	#0
				mov 	r3,	#0
				mov 	r4,	#0
				mov 	r5,	#0
				mov 	r6,	#0
				mov 	r7,	#0
				mov 	r8,	#0
	
				ldr		r9,	=0x4000000   ;64MB
				ldr		r0,	=0x30000000
0	
				stmia	r0!,{r1-r8}
				subs	r9,r9,#32 
				bne		%B0

				MOV_PC_LR

				ENDP

			
				LTORG
			
				END