uart_tut.faq

汇编源代码大全

                      The Serial Hardware Tutorial
                By Yousuf J. Khan (FidoNet 1:163/215.4)
                         Revision: Jan 20, 1993

Serial communications on the IBM PC and compatible range of computers
conforms to the RS-232C serial port standard. The chip that implements
and controls the RS-232 serial port is the UART.

BIOS Data Segment
-----------------
The base port addresses of each UART can be pointed to by reading the
four memory words at offset 0, 2, 4, and 6 from the start of the BIOS
Data Segment (BDS), segment 40h. Each word points to the starting port
address of a UART assembly. These pointer words are known commonly as
COM1, COM2, COM3, and COM4.

Some standard base port locations to put the UART assemblies are at
ports 02E8h, 02F8h, 03E8h, and 03F8h, in no particular order. If one of
the port pointers is zero, then that indicates that a serial port does
not exist there.

Any code snippets in this tutorial are compatible with Tasm 2.0
assembler (but likely will work with many other versions of assemblers).
They may refer to a fictional memory location known as [COMX]. [COMX] is
a word variable representing anything from COM1 through COM4.

The UART
--------
There have been about four major functional revisions of the UART. The
first one in the series was the National Semiconductor 8250.

The next version was the NS 16450. There was also an 8250A, which was
functionally identical to the 16450, therefore is really just a 16450.
The addition of a scratch register is what distinguishes a 16450 from
the 8250.

After the 16450, came the 16550A. The 16550A added a 16 byte FIFO buffer
to the data register. The FIFOs insulate the serial communications from
disruptions caused by high interrupt latencies in the computer. There
was also a 16550 (non-A), but that one had disfunctional FIFOs, so it
looks and acts just like a 16450. From now on any references to a
"16550" assumes we are talking about the 16550A revision and later.

The most recent addition to the family are the Type 3 UARTs, found in
late model IBM PS/2's. The Type 3's can read and write data using the
DMA circuitry of the PC. There is also a new, switchable, higher speed
baud rate clock on the Type 3's, which raise maximum baud rates by 6
fold.

The Data register (offset 0)
----------------------------
The data register is at offset zero in the port addresses. If you read
from it, it becomes the Receive Data register, and if you write to it,
it becomes the Transmit Data register. The data register is eight bits
long, and is common to all revisions.

If you have an UART with FIFOs (ie. 16550+ only), and they are enabled,
then you do not have to stop reading or writing after doing just one.
You may simply keep reading until the receiver FIFO is empty. Or you may
simply keep writing until the transmitter FIFO is full. Each character
will get pushed up through the FIFO stack.

The Interrupt Enable register (offset 1)
----------------------------------------
At the port offset one is the Interrupt Enable register. This register
controls what sorts of change of state will cause the UART to interrupt
the CPU. You write to this port to set the states, and you read from
this port to get the states. Only the first four bits (bits 0-3) are
defined, the remainder are zero.

         7    4   3    2   1   0
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